JPH02247726A - System for deciding fast dyadic operation of decimal type data - Google Patents

Abstract

PURPOSE:To shorten the processing time by finding out the valid digits of an operated value and an operand, deciding whether the valid digits can be processed with an operational instruction included in a hardware or not, and in the possible case, using the operational instruction to execute the processing with one operational instruction without referring to invalid digits. CONSTITUTION:Operated value valid digit calculating processing 1 and operand valid digit calculating processing 2 respectively execute inspections up to the appearance of a valid value in each area constituting one digit from the upper digits of respectively applied operated value and operand. Invalid digits are respectively subtracted from the whole digits of the operated value and the operand to find out the valid digits of the operated value and the operand. Processing system deciding processing 3 decides whether the valid digits of the operated value and the operand respectively found out by the processing 1, 2 are the number of digits to be processed by a decimal data operational instruction included in the hardware or not. When the processing is possible, the step 3 is branched to instruction combining operation processing 5. The instruction processing 4 uses the decimal data operational instruction included in the hardware and the operational processing 5 executes respective dyadic operation processing by hardware instruction combining processing based upon the operated value and the operand.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a processing method for binary operations, and in particular, in the case of arithmetic instructions for decimal data in hardware, the number of digits of the operand or operand is large. This invention relates to a high-speed binary operation processing determination method for impossible decimal type data.

(Prior art) Conventionally, binary operations on decimal data that cannot be processed due to large digits of operands or operands using decimal data calculation instructions provided by hardware have been processed using all digits. Arithmetic processing was performed by combining target hardware instructions.

(Problems to be Solved by the Invention) In the conventional method described above that processes all digits, even if the hardware can actually use decimal type data operation instructions, the operand This method has the drawback of requiring arithmetic processing even for invalid digits of the arithmetic number, which takes a long processing time.

(Means for Solving the Problems) The high-speed binary arithmetic processing determination method for decimal data according to the present invention is characterized in that the specified operand or operand has a large digit, and the hardware has a decimal data arithmetic instruction. In the high-speed binary arithmetic processing determination method for decimal type data that cannot be processed by Processing by determining whether or not the significant digits of the operand calculated by the operand significant digit calculation means and the significant digits of the operand calculated by the operand significant digit calculation means can be processed by the arithmetic instruction of the hardware. A processing method determining means for separating the methods, and a hardware operation for performing an operation using the significant digits of the operand and the significant digits of the operand, if the processing method determining means determines that the processing can be performed using the arithmetic instructions of the hardware. an instruction means, a hardware operation instruction means for performing an operation using the significant digits of the operand and the significant digits of the operand when the processing method determination means determines that the process can be performed using an operation instruction of the hardware; If the method determining means determines that processing cannot be performed using the arithmetic instructions provided by the hardware, the method includes an instruction combination arithmetic means that performs an arithmetic operation using a designated operand and arithmetic number.

(Embodiment) Next, an embodiment of the high-speed binary operation processing method for decimal type data according to the present invention will be described with reference to the drawings.

Referring to FIG. 1, one embodiment of the present invention includes operand significant digit calculation processing 1, operation number significant digit calculation processing 2, processing method determination processing 3, hardware operation instruction processing 4, and instruction combination operation processing. It consists of 5.

In operand valid digit calculation process 1, a valid value is checked for each area constituting one digit from the high order of the given operand until a valid value appears, and the number of invalid digits is calculated from the number of digits of the entire operand. Find the significant digits of the subtract operand.

Valid digit calculation process 2 for arithmetic operations is performed by checking the upper part of the given operand until a valid value appears in each region that constitutes one digit, and then subtracting the number of invalid digits from the number of digits of the entire operand. Find the significant digits of a number.

Processing method determination processing 3 determines whether the significant digits of the operand calculated in operand significant digit calculation process 1 and the significant digits of the operand calculated in operand significant digit calculation process 2 are the decimal type data of the hardware. It is determined whether the number of digits can be processed by the arithmetic instruction, and if it can be processed, the process branches to hardware arithmetic instruction processing 4, and if it cannot be processed, it branches to instruction combination arithmetic processing 5.

The hardware arithmetic instruction processing 4 uses a decimal data arithmetic instruction possessed by the hardware as the lower significant digits of the operand as a new operand and the lower significant digits of the operand as a new operand. Performs binary operation processing.

The instruction combination arithmetic processing 5 performs binary arithmetic processing by combining hardware instructions using an operand and an arithmetic number.

(Effects of the Invention) As explained above, the present invention calculates the significant digits of the operand and the operand, determines whether it can be processed with the decimal type data operation instructions of the hardware, and if possible, uses the operation instructions. By using , invalid digits are not referenced, processing is performed with one operation instruction, and processing time can be reduced.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of a high-speed binary operation processing determination method for decimal type data according to the present invention. 1... Significant digits of operand calculation process, 2... Significant digits of operand calculation process, 3... Processing method determination process, 4... Hardware calculation instruction processing, 5... Instruction combination calculation process .

Claims (1)

[Claims] Find the significant digits of the operand in a high-speed binary arithmetic processing judgment method for decimal type data that cannot be processed by the hardware's decimal type data operation instructions because the digits of the specified operand or operand are large. an operand significant digits calculating means, an operand significant digits calculating means for calculating significant digits of the operand, and a significant digit of the operand calculated by the operand significant digits calculating means and the operand significant digits calculating means. The significant digits of the calculated number are
A processing method determining means that determines whether processing is possible with the arithmetic instructions of the hardware and divides the processing method; A hardware operation instruction means that performs an operation using the significant digits of the number and the significant digits of the operand, and a hardware operation instruction means that performs an operation using the significant digits of the operand if the processing method determining means determines that the processing can be performed using the operation instructions of the hardware. A hardware operation instruction means for performing an operation using the significant digits of a number, and when the processing method determining means determines that the operation cannot be processed using the operation instructions provided by the hardware, the operation is performed using a specified operand and arithmetic number. 1. A high-speed binary arithmetic processing determination method for decimal type data, characterized in that it comprises an instruction combination arithmetic means.