JPH02244655A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To make a buried layer small in both resistivity and thickness without the diffusion of impurity by a method wherein the buried layer between a base substrate and a semiconductor layer is formed of a high melting point metal film. CONSTITUTION:A poly-silicon film 4a is provided onto a first Si substrate 5, a tungsten film 3a of high melting point metal is formed thereon through a sputtering method, a buried layer 6a is composed of the films 4a and 3a. Then, an SiO2 film 2e is formed on the film 3a. On the other hand, an SiO2 film 2f is formed on a second Si substrate 1, and the first and the second substrate, 5 and 1, are pasted together through the intermediary of the films 2e and 2f. As the above pasting process is executed at a low temperature, As contained in the film 4a is prevented from diffusion into the Si substrate 5. As mentioned above, the buried layer 6a is formed of the film 3a of high melting point metal, whereby the buried layer 6a can be made small in resistivity and thickness.

Description

DETAILED DESCRIPTION OF THE INVENTION (Regarding the 4-H16 conductor device, more specifically, regarding the structure of the buried layer between the F ground plate and the LI provides a ``1'' conductor drying table having a buried filter layer and a method for making the same, and 11 points are provided for a ``1'' conductor device having a buried layer between a base substrate and a T conductor layer thereon. The buried layer includes one or more layers of a high melting point metal film or a polycrystalline 141 film.

[Industrial Field of Application] The present invention relates to a semiconductor device and a method of manufacturing the same, and more specifically, to a structure of a buried layer between a base substrate and a semiconductor layer and a method of manufacturing a semiconductor substrate having the buried layer.

[Conventional Technique (E'T)] FIGS. 5(a) and 5(b) are diagrams showing a conventional method for manufacturing a semiconductor substrate having a buried layer.

As shown in FIG. 5A, As or sb ions are first implanted into a P-type Si base substrate 14 made of short silicon crystals. Next, in order to activate the As or sh ions and to recover the crystallinity of the surface of the Si base substrate 14 which had been disturbed by the ion implantation, heat treatment was performed at 1100°C for 60 minutes to form the n° type diffusion layer 15. Form.

Next, as shown in FIG. 2B, an n-type epitaxial layer 17 having a thickness of 2.0 μm is grown on the Si base layer 14 at a temperature of 1100° C. for about 1 hour and 6 minutes.

At this time, during epitaxial growth, the ^S or Sb element of the diffused rf415 is diffused into the epitaxial layer 17 and the Si base substrate 14 by auto-doping and diffusion, respectively, and a buried layer 16 is formed to complete the V conductor substrate.

In step 7, when creating a multilayer circuit on the above semiconductor substrate, as shown in FIG. 6, in order to electrically isolate adjacent transistors from each other, at least the Si base substrate is Separation grooves are formed so as to reach 14 mm.

Next, as shown in No. 7 and 1, 5i02II9 for insulation
．． 19 is formed, and then a embedding material 20 made of polysilicon is embedded in the isolation trench 18.

[Problems to be Solved by the Invention] According to the conventional example, since the growth temperature of the epitaxial layer 17 is high, the thickness of the buried layer 16 increases. For this reason, the depth of the isolation trench 18 for element isolation needs to be correspondingly increased.

However, when the isolation trench 1B becomes deeper, N21 tends to occur in the polysilicon inside the isolation trench 18, as shown in FIG. When this #j21 moves to the surface of the separation trench 18 by heat treatment in a later step, a recess 22 is formed in -1- of the separation trench 18, and the wiring layer crossing the four parts is disconnected.
The wiring material remains along the four parts, causing a short circuit between the wiring.

Further, if the isolation groove 18 is deep, stress applied to the semiconductor substrate becomes large, causing crystal defects and junction leakage.

The present invention has been created in view of such conventional problems, and its objective is to propose a new buried layer that can make the buried layer thinner and a method for producing a cliff conductor substrate having the buried layer. It is.

[Means for Solving the Problem] Problem L is a semiconductor device having a buried layer between a base substrate and a semiconductor layer thereon, in which the buried layer is one or more high-melting point metal films or polycrystalline semiconductors. A semiconductor device characterized in that it has a film, and the buried layer is formed between an insulator constituting a lower 111Ji board and a semiconductor layer on the other side. 41 and further form a film including one or more polycrystalline semiconductor films or high melting point metal films on the main surface of the first semiconductor substrate.゛P-conductor substrate, the surface of the film formed on L or the second ゛1
As long as an insulating film is formed on at least one of the single parts of the conductor plate, the film formed on the first semiconductor substrate and the single part of the second semiconductor substrate face each other with the insulating film interposed therebetween. A step of bonding the first semiconductor substrate so that
The present invention is solved by a semiconductor device manufacturing method characterized by including a T culm for creating a conductor substrate.

[Function] According to the semiconductor device of the present invention, when the buried layer is a single layer of a high melting point metal film, the specific resistance of the buried layer is equal to that of a conventional single crystal semiconductor when impurities are introduced up to the solid solubility limit. Since it is one to two orders of magnitude smaller than the specific resistance of , the thickness of the buried layer can be made thinner.

Furthermore, even when the buried layer is made of a polycrystalline semiconductor film and a high melting point metal film of 2JM, the resistance of the buried layer is determined by the high melting point metal film with low specific resistance, so the collector extraction resistance can be made small and the buried layer Thickness can be reduced.

Furthermore, according to the manufacturing method of the present invention, the P conductor substrate having the buried layer as shown in E is formed by the bonding method, so unlike the conventional epitaxial growth method,
Excessive diffusion of impurities in the buried layer, such as auto-doping, is eliminated.

When the buried layer in contact with the semiconductor layer is a polycrystalline semiconductor layer, impurity diffusion from the polycrystalline semiconductor layer to the semiconductor layer is extremely small, and the implanted layer can be kept at the minimum necessary thickness.

In addition, if the buried layer in contact with the semiconductor layer is a high-melting point metal film, impurity diffusion will not occur, so the buried layer must be 5M.
Can be made as thin as possible.

Therefore, the depth of the separation groove should be made shallow i′1TIi!
becomes.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIGS. 1A to 1E are diagrams illustrating a method of manufacturing a semiconductor substrate having a buried layer according to an embodiment of the present invention.

First, as shown in FIG.
After forming a by CVD method, this polysilicon IJ
@4a with IIs ion dose 1×1, Q ” c
m, -'' to form an n-type.

Note that this n-type polysilicon film 4a is formed to reduce the contact resistance between the tungsten film formed thereon and the first Si substrate 5.

Next, as shown in FIG. 4B, tungsten n3a having a thickness L of 1000 mm is formed on top of the polysilicon film 4a by sputtering. As a result, 2000 to 3000 polysilicon films 4a, tungsten fJ3a or tungsten silicide films, and buried layers 6a are formed.

At this time, the specific resistance ρ of the tungsten film 3a is 70μΩ・
The sheet resistance of tungsten 1193a is about 1
7(ρ/j) is approximately 20Ω/mouth.

Next, in the case shown in FIG.
is formed on the tungsten film 3a. On the other hand, the surface of another second Si substrate 1 was coated with a layer of 5,000 thick S by the CVD method.
After forming the iO2 film 2c ((d) in the same figure), these S
The first Si substrate 5 and the second 5i75 plate] were heated at a temperature of 900'C and a pulse voltage of 500°C via the iO□ films 2b and 2c.
Laminate under the conditions of V. At this time, the temperature of lamination is 9
The A of the polysilicon film 4a can be as low as 00'C.
S is hardly diffused into the first Si substrate 5. Note that the formation of the 5i02 film was performed in 1. Only one of the first or second substrate is required.

Finally, the surface of the first Si substrate 5 is polished to a thickness of 2″ζ0.
．． A semiconductor layer 5a having a thickness of 6 to 1 μm is formed to complete a semiconductor substrate.

Next, N1) was created using this semiconductor substrate.
The type bipolar transistor will be explained with reference to FIG.

Note that the second Si substrate 1 in FIG. 1 is represented as an S1 base substrate 1a in FIG. 2.

This semiconductor substrate 1e is provided with an isolation groove 7a for element isolation having a depth of 1.0 to 2.37 zm so as to reach at least the Si film 2a. A 5il 198a for insulation is formed in this isolation groove 7a, and a embedding material 13a made of polysilicon is embedded therein.

Further, in the semiconductor layer 5a, an n° type collector contact region 9a is partially provided so as to reach the polysilicon film 4a, and in another region, a p° type base contact region 10a is connected thereto. A p-type base region 10b and an n'-type emitter region 11a are provided within the base region 10b.

Further, in the collector contact region 9a, the base contact region 10a, and the emitter region 11a, SiO□II
A collector electrode 12e, a base electrode 12b, and an emitter electrode 12a each made of polysilicon are provided through the opening of I 8 a.

At this point b, according to the embodiment described below, the embedded jN6 a(
D Because the thickness is thin, the depth of the separation groove 78 is set to 1.0 to 2.3.
It can be made as shallow as μm. Furthermore, since the sheet resistance R is as small as 20Ω/hole, the collector resistance can also be made small.

Next, another embodiment of the present invention will be described. FIG. 3(a) is a sectional view showing a semiconductor substrate according to another embodiment of the present invention. The difference from the semiconductor substrate in Figure 1(e) is that the thickness is 0.
．． The point is that a p-type semiconductor layer 15b having a thickness of 0.3 to 0.6 μm is used instead of the n-type semiconductor layer 5a having a thickness of 6 to 100 m. In this case, as in the case of FIG. 1(e), the buried layer 6a can be made thinner without increasing the sheet resistance, so the depth of the isolation trench can be made shallower.

FIG. 4 shows an example of a bipolar transistor fabricated using the semiconductor substrate of FIG. 3(a), which is characterized in that the buried i6b is used as the collector and the p-type semiconductor layer 5b is used as the base.

In addition, in the above embodiment, as embedded i6a and 6b,
Although two layers of tungsten PJ/polysilicon film were used, as shown in FIG. may also be used.

Furthermore, in the embodiment described in L, a tungsten film was used as the high melting point metal film of the buried layer, but a molybdenum film, a titanium film, a cobalt film, or a polycide film or silicide film thereof may also be used.

(Effects of the Invention) As described above, according to the buried layer structure of the present invention, the buried layer can be made thinner without increasing the sheet resistance, and the depth of the separation groove can be made shallower.

Further, according to the method of manufacturing a semiconductor substrate having the buried layer of the present invention, the semiconductor layer can be made as thin as necessary, so that
The depth of the isolation trench formed in the semiconductor substrate can be made shallow. Thereby, it is possible to suppress the tyI body substrate and the substrate tossing. In addition, 4. toughness in the separation groove. It is possible to prevent disconnections and short circuits in the wiring layer by preventing the formation of wires.

[Brief explanation of drawings]

1A to 1E are cross-sectional views showing a method for manufacturing a semiconductor substrate having a buried layer according to an embodiment of the present invention, and FIG. Cross-sectional view of a bipolar transistor, Fig. 3(a)-(discharge)
4 is a sectional view showing another embodiment of the semiconductor device of the present invention; FIG. 4 is a sectional view of a bipolar transistor formed on a T-conductor substrate according to another embodiment of the present invention; FIG. A cross-sectional view showing a method of manufacturing a semiconductor substrate having a buried layer in the conventional example. 6th leap is a cross-sectional view of an isolation groove created in a semiconductor substrate in the conventional example. 2. Figure 7 is a problem with the conventional example. FIG. [Explanation of symbols] 1... Second 31 substrate, la=ld, 14-5i base substrate, le...
semiconductor substrate, 2 a to 2 d, 8 a, 8 b, l
9=-5102 film, 38-3c...tungsten film, 4a, 4. b, 4d...polysilicon film, 58-5d
...semiconductor layer. 6 a, 6 b, 16・J'! ! Included layer, 7a
, 7b, 1B--Separation groove, 9a 9b... Collector contact] area, 10a
, 1. oe...Base contact area, tab...
Base region, tla, llb... Emitter region, +2a, 1.2d... Emitter electrode, 12b, 1.2
e...Base electrode, 12c,! 2f...Collector electrode, 1, 3a, 13b, 20-...Embedding material, 15...
Diffusion layer, 17...Epitaxial layer, 21...〃. 22... recess.

Claims (3)

[Claims] (1) A semiconductor device having a buried layer between a base substrate and a semiconductor layer thereon, wherein the buried layer has one or more layers of a high melting point metal film or a polycrystalline semiconductor film. (2) the buried layer is an insulator that constitutes a base substrate;
2. The semiconductor device according to claim 1, wherein the semiconductor device is formed between the semiconductor layer and a semiconductor layer thereon. (3) forming a film having one or more layers of a polycrystalline semiconductor film or a high melting point metal film on one main surface of a first semiconductor substrate, and a surface of the film formed on the first semiconductor substrate or Second
forming an insulating film on at least one of the main surfaces of the semiconductor substrate, the film formed on the first semiconductor substrate and the main surface of the second semiconductor substrate facing each other with the insulating film interposed therebetween; and a step of reducing the thickness of the first semiconductor substrate to create a semiconductor substrate comprising a buried layer having one or more high melting point metal films or polycrystalline semiconductor films. A method for manufacturing a semiconductor device, comprising: