JPH02242362A - Control circuit for one-way communication between two cpu's and moving body controller - Google Patents

Abstract

PURPOSE:To efficiently transmit information in one direction by controlling data communication between plural microcomputers at the time of data communication in one direction between these microcomputers. CONSTITUTION:When a master microcomputer 1 reads data of register files 3a and 3b, a read signal is sent to register files 3a and 3b by an address signal and a read signal (/RD) 10 outputted from the master microcomputer 1. Meanwhile, when a slave microcomputer 2 writes data in register files 3a and 3b, a write signal is sent to register files 3a and 3b by an address signal and a write signal (/WR) 11 outputted from the slave microcomputer 2 and the output signal from a read signal generating part 4. Thus, data is efficiently communicated in one direction between two microcomputers 1 and 2 without interrupting the processing.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to controlling data communication between microcomputers when unidirectional data communication is performed between the microcomputers in a circuit using two or more microcomputers. Things related to circuits and mobile object control using this circuit! This is related to the kJt position.

2. Description of the Related Art Conventionally, in a distributed processing system using a plurality of microcomputers, information exchange (communication) between the microcomputers was carried out by serial transmission as shown in FIG. In Fig. 3, 1 and 2 are microcomputers, 29 and 30 are serial transmission converters, and 3
1 and 32 are parallel transmission lines, and 33 is a serial transmission line. Further, 34 is a transmission control line. In serial transmission, as shown in FIG. 3, serial transmission is performed between the serial transmission converters 29 and 30 provided between the microcomputer 2, and control related to transmission is performed using the transmission control line 34. I am doing it. As shown in Fig. 4, for example, the transmitting side of the information issues a transmission request signal by lowering the transmission request signal to L, and the receiving side, which receives the information, lowers the transmission clear signal to L, allowing the information to be transmitted. send back a signal. The transmitting side, which has received the returned transmittable signal, issues a transmission start signal, which is, for example, an L pulse signal, and starts information transmission. Then, by receiving a reception completion signal, for example, an L pulse, which indicates that unit information ff1 (for example, 1 byte) has been received from the receiving side, the sending side clears the transmission request signal, and the receiving side clears the transmission ready signal. do. One transmission is completed with the above steps.

As another method, FIG. 5 shows a method in which the boats of the microcomputer 2 are directly connected and parallel transmission is performed using the parallel transmission line 31 and the electric transmission control line 34. Further, in FIG. 6, a shared memory 35 is used between two microcomputers 2, and each microcomputer
This shows a method in which the devices have a common storage location, write and read data to each other, and use data buses 7 and 9 to transmit information.

Problems to be Solved by the Invention The serial transmission means with the conventional configuration described above requires a serial transmission conversion section for each microcomputer, which increases the circuit configuration, and because it is serial transmission, it is difficult to transmit data per unit time. There is a problem with the lack of information. In order to solve this problem, there are methods of directly connecting microcomputers or performing parallel transmission using a shared memory, but each method has the following problems. In the method of directly connecting microcomputers, when data is being transmitted between microcomputers, both microcomputers perform processing for transmission at the same time, which interrupts each processing and reduces processing capacity. This will lead to a decrease in In addition, in a configuration using shared memory, two microcomputers can
When there is a write or read from the
The circuit space becomes thick. Also,
There is a shared memo J that has such a built-in circuit, but it only has a large capacity, and its use in a system that communicates a small amount of information is not very efficient due to the time spent on communication and the circuit space required. It's not good.

Furthermore, in a control device for a moving object that uses a plurality of microcomputers that mutually transmit data, delays in processing due to the data transmission affect the movement of the moving object.

The present invention solves these conventional problems, and has a simple configuration that requires only a small circuit space, and allows communication of a small amount of information to be performed with as little interruption time as possible, allowing for efficient one-way communication. The first object is to provide a communication control circuit that can transmit information. The second purpose is to quickly transmit data from the microcomputer in the judgment processing unit and the microcomputer in the obstacle detection means to the judgment processing unit without interrupting the processing of each microcomputer, and the data is spent on communication. It is an object of the present invention to provide a mobile body control device that shortens processing time and improves responsiveness of movement of a mobile body body.

Means for Solving the Problem The first means for achieving the first objective is to have a master microcomputer, a slave microcomputer, a read-only address port, and a write-only address port. register file and
a read signal generating section that sends a read signal to the register file using an address signal and a read signal output from the master microcomputer when the master microcomputer reads data in the register file; and a slave side When the microcomputer writes data to the previous register file, it writes to the register file using the address signal and write signal output from the slave microcomputer and the output signal from the read signal generator. This is a one-way communication control circuit between two CPUs having a configuration including a write signal generation section that sends a signal.

Further, a second means for achieving the second object includes an obstacle detection means for detecting obstacles in front of the main body and in the left and right directions, a traveling means and a steering means for moving the main body,
a position recognition means for detecting the traveling distance and traveling direction of the main body to recognize the position; a determination processing section for outputting a signal to the traveling means and the steering means; a storage device and a power source; This mobile object control device has a configuration in which a communication control circuit with the determination processing section is a one-way communication control circuit between two CPUs constituting the first means.

By adopting the configuration of the first means of action, it is possible to efficiently transmit one-way communication of a small amount of information between two microcomputers in a small circuit space without interrupting each process. .

According to the second means, data from the microcomputer in the obstacle detection means can be quickly transmitted to the microcomputer in the judgment processing section, and the responsiveness of the movement of the moving body can be improved. can do.

EXAMPLE Hereinafter, an example of the present invention will be described based on the accompanying drawings. FIG. 1 is a block diagram of a one-way communication I11 control circuit between two CPUs in an embodiment of the first means. 1 is a master side microcomputer, and 2 is a slave side microcomputer. In this embodiment, the microcomputer 1 on the master side is a multi-chip such as 8 bits (a type of microcomputer whose data lines and address lines are output to the outside), and the microcomputer 2 on the slave side is a 4-bit multi-chip. It is a one-chip microcomputer (a type of microcomputer that has multiple I10 ports without outputting the data line/parallel line to the outside). 3a and 3b are register files (for example, TTL LS67) that have both a read-only address port and a write-only address port.
0), and 4 is an address signal (signal on the address bus 6) output from the master side microcomputer 1 when the master side microcomputer 1 reads the data of the register files 3a and 3b, and a read signal. A read signal generating section 5 performs a logical product with the signal (/RD signal 10) and sends a read signal to the register files 3a and 3b. When writing, the address signal (signal on the address bus 8) and write signal (/WR signal 11) output from the slave side microcomputer 2, and the read signal generator 4
This is a write signal generating section that performs a logical product of the output signal of the output signal and an inverted signal of the output signal, and sends a write signal to the register files 3a and 3b. 6 is the microcomputer on the master side.
1 is an address bus, and 7 is a data bus of the microcomputer 1 on the master side. 8 is an address bus used when the slave microcomputer 2 writes data to the register files 3a and 3b, and 9 is a data bus of the slave microcomputer 2.

Regarding the one-way communication control circuit between the two CPUs configured as described above, the various operations and effects will be explained below. First of all
As shown in the figure, the direction of communication is from microcomputer 2 on the slave side to microcomputer 2 on the master side.
1 in one direction, and the register files 3a and 3b are configured as two, so that the microcomputer on the master side can
The amount of information in communication between microcomputer 1 and slave side microcomputer 2 is 4 bytes.

(This is due to the use of TTL's LS670 for the register file.) The microcomputer on the master side.
1 outputs the addresses of the register files 3a and 3b to the address node 6 and sends a read signal in order to read the data written in the register files 3a and 3b by the slave microcomputer 2. (/
The RD signal 10) is dropped from H to L, and the data on the data bus 7 (which is normally output at H) is input. During this read operation, the address signal (signal on the 7-dress bus 6) output from the master side microcomputer 1 and the read signal (/RD signal 10) are ANDed in the read signal generator 4. Take register file 3a
It is output to the read permission terminal (not shown) of #3b. From this, the data in the register files 3a and 3b will be output to the data block and input to the master microcomputer 1. From the slave microcomputer 2 to the master microcomputer 1. When transmitting data, the microcomputer 2 on the slave side outputs the 4] write data it wants to transmit to the register files 3a and 3b onto the data bus 9, and sets the address of the register files 3a and 3b to the address! and output the write signal (/WR signal 11
) from H to L. (Normally H+: Output.) At this time, the write signal generator 5 generates a write signal
The WR signal 11), the address of the register files 3a and 3b, and the inverted output of the read signal output by the read signal generator 4 are ANDed and output to the write enable terminal (not shown) of the register files 3a and 3b. . This is the register file 3a written by microcomputer 1 on the master side and microcomputer 2 on the slave side.
・The data is actually written to the register files 3a and 3b only when the slave side microcomputer 2 writes data to the register files 3a and 3b while the data read operation of the register file 3b is not being performed. That's why. This is a write signal (/WR signal 11) sent by microcomputer 2 on the slave side.
The time it takes for the microcomputer 1 on the master side to read the data in the register files 3a and 3b is longer than the time it takes to read the data in the register files 3a and 3b. That is, from the perspective of the master microcomputer 1, the data in the register files 3a and 3b can be read at any time regardless of the slave microcomputer 1.

FIG. 2 is a system block diagram of a moving object $ control device according to an embodiment of the second means. 12 (This is the motor for driving the main body, 13 is its drive circuit, and 14 is the travel motor 1.
This is a travel encoder that detects the rotation speed of 2. As described above, the slave-side microcomputer 2, travel encoder 14, drive circuit 13, travel motor 12, and slave-side microcomputer 2 constitute the traveling means 15. Similarly, 16 is a motor for the main body steering.

17 is a steering encoder that detects the rotational speed of the 18Gt steering motor 16. As described above, the steering encoder 18, drive circuit 17, steering motor 16 and slave side microcomputer 2 constitute the steering means 1.
9.

20 is a direction detection sensor attached to the main body, and in this embodiment, a rate gyro is used. The travel encoder 14 and the direction detection sensor 20 constitute a position recognition means 21 that recognizes the position of the main body. In other words, the rotational speed detected by the travel encoder 14 and the direction detection sensor 2
The position of the main body is recognized by detecting the running direction of the main body detected from zero. 22 is a distance measuring sensor such as an ultrasonic sensor or a photosensor provided around the main body to measure the distance to an obstacle. 23 is a contact sensor attached to the outer periphery of the main body, which detects when the main body comes into contact with an obstacle. The distance measuring sensor 22, the contact sensor 23, and the slave-side microcomputer 2 constitute an obstacle detection means 24. (2) is a master microcomputer that has a storage device 25 and constitutes a judgment processing section that outputs signals to the traveling and steering means. 26 is a one-way communication control circuit constituting the first means (excluding the microcomputer on the master side), and 27 is an operation switch for instructing movements such as starting and stopping the main body. As shown in the figure, information on the operation switches is inputted to the microcomputer 1 through the data bus 7 by the input port 28.

In the mobile object control device configured as described above, the master side microcomputer 1 and the obstacle detection means 24
By communicating with the slave microcomputer 2 during the process, data from the slave microcomputer 2 can be efficiently inputted from the master microcomputer 1 without stopping the processing.

Effects of the Invention As described above, according to the present invention, the information obtaining side can read the information of the register file at any time without requiring any special processing to obtain the information. Furthermore, by providing a register file with the amount of information required for communication, it is possible to minimize wasted time spent writing and reading data, and the required circuit space can be configured to a minimum, resulting in less waste.

According to the second means, a microcomputer on the master side of a mobile object control device that uses a plurality of microcomputers and controls a mobile object while performing one-way communication in a master-slave relationship. -By reducing the time spent on communication at This also contributes to the miniaturization of the main body.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a one-way communication control circuit between two CPUs according to an embodiment of the first means of the present invention, and FIG. 2 is a system block diagram of a mobile object control device according to an embodiment of the second means. Figure 3 is a diagram showing the state of communication using conventional serial transmission, Figure 4 is a simple explanatory diagram, and Figure 5 is a diagram showing a method of parallel transmission by directly connecting a microcomputer to a similar boat. , FIG. 6 is a diagram showing a method of transmitting information by providing a shared memory between microcomputers. 1...Master microcomputer-12...
Slave microcomputer 9-13a, 3b...
Register file, 4... Read signal generation section, 5...
Write signal generation section, 15... Traveling means, 19... Steering means, 21... Position detection means, 24... Harmful object detection means, 25... Storage device. Name of agent: Patent attorney Shigetaka Awano and 1 other person N l Figure 6.8- Apres bus bad diagram diagram compilation diagram diagram 1.2-7AriU

Claims (2)

[Claims] (1) A master microcomputer, a slave microcomputer, a register file that has both a read-only address port and a write-only address port, and when the master microcomputer reads data from the register file,
a read signal generation unit that sends a read signal to the register file based on an address signal and a read signal output from a master side microcomputer; a slave side microcomputer to the register file;
When writing data, an address signal and a write signal output from a slave side microcomputer, and a write signal generation section that sends a write signal to the register file using an output signal from the read signal generation section. One-way communication control circuit. (2) Obstacle detection means for detecting obstacles in front and left and right directions of the main body, traveling means and steering means for moving the main body, and a position for detecting the traveling distance and direction of the main body to recognize the position A communication control circuit between the obstacle detection means and the judgment processing section is provided with a recognition means, a judgment processing section for outputting a signal to the traveling means and the steering means, a storage device, and a power source, and the communication control circuit between the obstacle detection means and the judgment processing section is a 2 CPU according to claim 1. A mobile object control device configured with a one-way communication control circuit between.