JPH02241113A - Integrated circuit - Google Patents

Abstract

PURPOSE:To attain reset operation for a prescribed period after application of power by resetting based on the output of a voltage comparator outputted at a signal of H and L level for the result of comparison of voltage levels of 1st and 2nd voltage sources. CONSTITUTION:A voltage source 9 whose voltage is set to a setting voltage V2 lower than a setting voltage V1 of a voltage source 3 is provided in an analog logical hybrid device 10. The v source 9 is not connected to a capacitor and the leading time constant at application of power is sufficiently smaller than the time constant of the voltage source 3. When a positive input is higher than a negative input in a voltage comparator 11 and an H level (Vcc) and negative input are higher than the positive input, the L level (0) signal is outputted. In such a case, a reset means 2 compares the voltage level of 1st and 2nd voltage sources 3, 9, and resets based on an output of the voltage comparator 11 outputting the result of comparison with H, L level signals, then the 1st voltage level of the 1st voltage source 3 is not required to reach the H level. Thus, resetting is applied for a prescribed period after application of power.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit that is reset for a predetermined period after power is turned on.

[Prior Art] FIG. 3 is a block diagram showing a part of a conventional integrated analog/logic mixed device.

As shown in the figure, the reset means 2 in the analog/logic mixed device 1 is connected to a voltage source 4 which is a reset signal source in addition to a power supply (not shown), and the voltage level of the voltage source 4 is "L". At level, a reset operation (initialization of the logic section) is performed.

As described above, the voltage source 4 is a voltage source for outputting a reset signal, and its voltage level is the voltage level V of the power supply. It is set to C. Furthermore, as will be described later, due to its nature, it is necessary to slow down the rise time when the power is turned on, so the voltage source 4 is grounded via the capacitor 6, so that the rise time constant when the power is turned on is set to a large value. There is.

Further, the analog/logic mixed device 1 has a separate voltage source 3 as an analog bias reference voltage source. The voltage source 3 is connected to an analog circuit (not shown), and its set voltage is set to about half the voltage level Vcc of the power supply. Also, due to its nature, it is grounded in an alternating current manner (
Since it is necessary to output a voltage with an AC component of 0, the voltage source 3 is grounded via a capacitor 5.

Note that capacitors 5 and 6 are both large-capacity capacitors that are difficult to integrate, so the analog/logic mixed device 1
As shown in FIG. 3, it is provided outside the analog/logic mixed device 1 and connected to the voltage source 3.4 via external connection terminals 7 and 8, respectively. It turns out.

Figure 4 shows the analog/logic mixed device 1 shown in Figure 3.
FIG. 3 is a timing chart for explaining the reset operation of the FIG.

The reset operation will be explained below with reference to the same figure.

In the figure, SO indicates a change in the voltage level of the power supply immediately after the power is turned on, and S4 indicates a change in the voltage level of the voltage source 4 immediately after the power is turned on.

As shown in the figure, the power supply voltage rises to the "H" level (vcc) immediately after the power is turned on, but since the time constant of the voltage source 4 is set large by the capacitor 6,
Rise is slow.

Therefore, it takes an hour t1 after the power is turned on until the voltage level of the voltage source 4 exceeds the threshold value ■th and is recognized by the reset means 2 as being at the "H" level.

In other words, only during the time t1 after the power is turned on, the voltage level of the voltage source 4 is recognized as the 'L' level by the reset means 2. On the other hand, as mentioned above, the reset means 2 is recognized as the 'L' level by the voltage source 4. Since it is set to perform a reset operation when it receives the output of It takes a predetermined period of time to reset after the power is turned on.

[Problem to be solved by the invention]

The conventional analog/logic mixed device is configured as described above, and in order to output a reset signal to the reset means 2, a voltage source 4. capacitor 6
and an external connection terminal 8 were required.

Therefore, there was a problem in that an extra external connection terminal had to be provided.

Note that the analog bias voltage source 3 is also connected to the capacitor 5 for the purpose of outputting an AC grounded signal, so the rise after the power is turned on is slow, but the set voltage is set to the power supply voltage level (V cc ), which is about half of the threshold ■
Since it is lower than Lb, it is always “L” for the reset means 2.
” Since it is a signal source that outputs a level, it cannot be used as a signal source for a reset signal.

This invention was made in order to solve the above-mentioned problems, and its purpose is to obtain an integrated circuit that can perform a reset operation for a predetermined period after power is turned on without increasing the number of external terminals more than necessary. shall be.

[Means to solve the problem]

The integrated circuit according to the present invention is a circuit that is reset for a predetermined period after the power is turned on. a voltage source, and a time constant smaller than a rise time constant of the first voltage source upon power-on;
A second voltage source that rises to a second voltage level lower than the first voltage level is compared with the voltage levels of the first and second voltage sources, and the comparison result is set to "H". L”
The device includes a voltage comparator that outputs a level signal, and a reset means that performs a reset operation based on the output of the voltage comparator.

[Effect]

The reset means in this invention compares the voltage levels of the first and second voltage sources, and outputs the comparison results as "H" and "L".
“Based on the output of the voltage comparator which outputs a level signal,
In order to perform the reset operation, the first voltage level of the first voltage source does not need to reach the H level.

〔Example〕

FIG. 1 is a block diagram showing an analog/logic mixed device according to an embodiment of the present invention.

As shown in the figure, a voltage source 9 set to a set voltage V2, which is lower than the set voltage V1 of the voltage source 3, is newly provided in the analog/logic mixed device 10. This voltage source 9 is not connected to a capacitor, and its rise time constant at power-on is sufficiently smaller than that of the voltage source 3.

The output S9 of this voltage source 9 is input to the negative input of the voltage comparator 11,
Further, the output S3 of the voltage source 3 is connected to an analog circuit (not shown) and to the positive input of the voltage comparator 11.

The voltage comparator 11 becomes “H” when the positive input is higher than the negative input.
level vco), “L” when the negative input is higher than the positive input
Outputs a level (0) signal.

The output signal Sll of this voltage comparator 11 is inputted to the reset means 2 as a reset signal. Along with this, the voltage source 4. which was used as a conventional reset signal source. Capacitor 6 and external connection terminal 8 were removed. Note that the other configurations are the same as those of the prior art, so explanations will be omitted.

Figure 2 shows the analog/logic mixed device 1 shown in Figure 1.
FIG. 3 is a timing diagram showing a reset operation of 0; The reset operation will be explained below with reference to the same figure.

As soon as the power is turned on, the power supply voltage SO and the output S9 of the voltage source 9 are each at the set voltage V. Rise to Cv2.

On the other hand, since the rise time constant of the voltage source 3 is set large by the capacitor 5, the rise of the output S3 is slowed down.

Therefore, immediately after the power is turned on, the output S9 of the voltage source 9 is
The voltage level is higher than the output S3 of the voltage source 3.

Therefore, the output signal Sll of the voltage comparator 11 is “L”
level.

However, since the set voltage V1 of the voltage source 3 is higher than the set voltage 2 of the voltage source 9, when the output 3 of the voltage source 3 reaches the voltage v2 at the time t1 after the power is turned on, the voltage source 3 The voltage level of the output S3 of the voltage source 9 becomes higher than the voltage level of the output S9 of the voltage source 9. Therefore, the output signal S of the voltage comparator 11 after the elapse of time t1 after power-on
ll becomes "H" level.

As a result, the output signal Sll of the voltage comparator 11 is set to "L" by the reset means 2 only during the time t1 after the power is turned on.
Since it is recognized as the level, as in the conventional case, the reset means 2 performs the reset operation until time t1 has elapsed since the power is turned on, and thereafter does not perform the reset operation. In this way, the analog/logic mixed device 10 is reset for a predetermined period after power is turned on.

As described above, since the reset means 2 is configured to perform the reset operation based on "H" and "L" of the output signal S11 of the voltage comparator 11, the power of the voltage comparator 11 is smaller than the power supply rise time constant. A signal that rises to a first voltage level with a large time constant is input, and a second voltage that is lower than the first voltage level and has a smaller time constant than the rising time constant of the positive input signal is input as a negative input. All you have to do is input a signal that rises to the level.

Therefore, even if the set voltage is lower than the voltage level Vcc of the power supply in a signal source used for other purposes, such as voltage source 3, the rise time constant is sufficiently lower than the time constant of the power supply. If it is large, it can be used as the positive input of the voltage comparator 11. On the other hand, the voltage source 9, which is the negative input of the voltage comparator 11, does not need to have a large rise time constant, so there is no need to connect it to a capacitor, and there is no need to provide an external connection terminal. Even if it is newly provided, it can be integrated relatively easily.

As a result, there is no need to provide a separate external connection terminal to form a signal source for the reset signal, and the reset operation can be performed during a predetermined period after power is turned on while reducing the number of terminals.

Although this example shows an analog/logic mixed device, other integrated circuits may also be used as a signal source that is used for purposes other than outputting a reset signal and whose rise time constant is larger than the time constant of the power supply. If the circuit already has
This invention can be applied.

〔Effect of the invention〕

As explained above, according to the present invention, the voltage levels of the first and second voltage sources are compared, and the comparison result is set to "H",
Since the reset operation is performed based on the output of the voltage comparator which outputs the "L" level signal, the first voltage level of the first voltage source does not need to reach the H level.

Therefore, if it is a voltage source used for other purposes and rises with a time constant larger than the rise time constant of the power supply, the first voltage of the present invention can be applied regardless of its set voltage level. It can be used as a source.

As a result, there is an effect that the reset operation can be performed for a predetermined period after power is turned on without increasing the number of external terminals more than necessary.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram showing an analog/logic mixed device that is an embodiment of the present invention, FIG. 2 is a timing diagram showing a reset operation of the analog/logic mixed device shown in FIG. 1, and FIG. FIG. 4 is a block diagram showing a conventional analog/logic mixed device. FIG. 4 is a timing chart showing a reset operation of the analog/logic mixed device shown in FIG. In the figure, 2 is a reset means, 3 and 9 are voltage sources, and 10
1 is an analog/logic mixed device, and 11 is a voltage comparator. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) An integrated circuit that is reset for a predetermined period after power is turned on, and a first voltage source that rises to a first voltage level with a time constant that is larger than a rise time constant of the power supply when the power is turned on; a second voltage source that rises to a second voltage level lower than the first voltage level with a time constant smaller than a rise time constant of the first voltage source when the power is turned on; a voltage comparator that compares the voltage levels of the first and second voltage sources and outputs the comparison results as "H" and "L" level signals; and a reset that performs a reset operation based on the output of the voltage comparator. An integrated circuit comprising means.