JPH02239794A - Control start pulse generating circuit - Google Patents

Abstract

PURPOSE:To prevent mulfunction of a controlled device depending on the content of an erroneous control data even if the control data is switched by not generating a control start pulse the moment a selection signal is changed and the control data is switched. CONSTITUTION:Outputs 105, 106 of 1st and 2nd latch circuits 2, 3 are inputted to a coincidence detection circuit 4 and the coincidence detection circuit applies coincidence detection of the pulse outputs 105, 106 (in this case, L at coincidence, H at dissidence) and outputs a detection pulse 107. On the other hand, the detection pulse (coincidence detection circuit output) 107 is inputted to a pulse generating circuit 6 and when the detection pulse (coincidence detection circuit output) 107 represents coincidence, a delay pulse (delay circuit output) 108 is outputted as a control start pulse 109. When the control data is switched, the coincidence detection circuit output 107 is a noncoincidence signal, resulting that the delay circuit output 108 is stopped by the pulse generating circuit 6, then no control start pulse 109 is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pulse generation circuit that generates a pulse for starting control.

[Conventional technology]

In general, one piece of control data is selected and received from a plurality of pieces of control data that are made up of a plurality of frames and are transmitted continuously.
Control devices and the like that perform control according to the content K of the selected control data are known.

Such a control device includes a control start pulse generation circuit for generating a control start pulse for starting control.

In the case of a conventional control start pulse generation circuit, a control start/f pulse is generated even when the received control data is switched.

[Problem that the invention seeks to solve]

In the conventional control start pulse generation circuit described above, a control start pulse is generated when the received control data is switched, so at the instant K when the received control data is switched, erroneous control due to mismatch of control data is generated. Control may be performed depending on the content.

SUMMARY OF THE INVENTION An object of the present invention is to provide a control start pulse generation circuit that prevents control from being performed with incorrect control contents.

[Failure to solve the problem]

According to the present invention, there is provided a selection circuit that selects a reception end pulse corresponding to control data selected by a selection signal among a plurality of reception end pulses of control data; a first holding circuit that holds the signal; a second holding circuit that holds the first holding circuit output signal when the next control data is received; and the first holding circuit and the second holding circuit. a coincidence detection circuit for detecting coincidence of outputs; a timing circuit for timing the generation of a control start pulse based on the reception end pulse selected by the selection circuit; A control start/4' pulse generating circuit is obtained which is characterized by having a pulse generating circuit which generates a control pulse when a match is determined by the detection circuit.

〔Example〕

Next, the present invention will be explained with reference to examples.

In the following embodiment, a case will be described in which two pieces of control data are switched. Here, it is assumed that the reception end pulse is generated after each frame of control data is received, and that the selection of control data is selected by the selection signal 103.

The first reception end pulse 101 and the second reception end pulse 102 are selected by the selection circuit 1 based on the selection signal 103. End of selected reception/”Rus 104
(here, reception end pulse 101 is selected) is the first
is input to the holding circuit 2 and the second holding circuit 3. On the other hand, the selection signal 103 is held by the selected reception A'' pulse 104 in the first holding circuit 2 and sent out as a pulse output 105.

The output 105 of the first holding circuit 2 is held by the selected received pulse 104 in the second holding circuit 3 and sent out as a pulse output 106. The first holding circuit 2 and the second holding circuit
The outputs 105 and 106 of the holding circuit 3 are the coincidence detection circuit 4.
and the coincidence detection circuit outputs pulses 105 and 10.
6 match detection is performed (here, when a match is detected, "L' when no match" is detected)
The selected reception end/4' pulse 104 is delayed by a predetermined time by the delay circuit 5 and output as a delayed ! pulse 108.

On the other hand, the detection pulse (coincidence detection circuit output) 107 is input to the pulse generation circuit 6, and when the detection pulse (coincidence detection circuit output) 107 indicates a coincidence, the delay/pulse (delay circuit output) 108 is started to be controlled. or rus109.

By the way, when the control data is switched, the coincidence detection circuit output 107 becomes a mismatch signal, and as a result, the delay circuit output 108 is stopped by the pulse generation circuit 6, so that control starts A? If the signal 109 is not output and the control data received at the moment of switching is performed, control will not be started.

〔Effect of the invention〕

As explained above, in the present invention, when the selection signal changes and the control data is switched (instantaneous), the IJ start signal is not generated. This has the effect of preventing malfunctions of the controlled device due to the contents of erroneous control data even when the control data is switched.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a timing diagram for explaining the operation of the control start/arm pulse generation circuit shown in FIG. 1. 1... Selection circuit (SEL), 2... First holding circuit, 3... Second holding circuit, 4... Coincidence detection circuit, 5... Delay circuit (Delay) + 6. ...Pulse generation circuit.

Claims (1)

[Claims] 1. A selection circuit that selects the reception end pulse corresponding to the control data selected by the selection signal from among the plurality of control data reception end pulses, and a first holding circuit that holds the selection signal when the reception of the control data is completed. a second holding circuit that holds the first holding circuit output signal when the next control data has been received; and a match detection unit that detects a match between the outputs of the first holding circuit and the second holding circuit. a timing circuit that takes timing to generate a control start pulse based on the reception end pulse selected by the selection circuit; and a timing circuit that takes control when a match is determined by the match detection circuit based on the output of the timing circuit. A control start pulse generation circuit comprising a pulse generation circuit that generates a pulse.