JPH0222893A - Manufacture of multilayered printed wiring board - Google Patents

Manufacture of multilayered printed wiring board

Info

Publication number
JPH0222893A
JPH0222893A JP17324388A JP17324388A JPH0222893A JP H0222893 A JPH0222893 A JP H0222893A JP 17324388 A JP17324388 A JP 17324388A JP 17324388 A JP17324388 A JP 17324388A JP H0222893 A JPH0222893 A JP H0222893A
Authority
JP
Japan
Prior art keywords
printed wiring
forming
conductive
holes
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17324388A
Other languages
Japanese (ja)
Inventor
Kenji Kobayashi
健治 小林
Keisuke Okada
岡田 圭祐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17324388A priority Critical patent/JPH0222893A/en
Publication of JPH0222893A publication Critical patent/JPH0222893A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electroplating And Plating Baths Therefor (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To easily form a power supplying and grounding layer and, at the same time, to form no level difference in a conductive circuit so that a multilayered printed wiring board having no voids nor cracks can be formed by forming the layer from which a large current is supplied to components mounted on the circuit board by selectively performing copper plating to part of the board other than the part where through holes are formed so that the power supplying and grounding circuit can have no level deference with respect to its surrounding area. CONSTITUTION:A laminated plate 2 is coated with a photosensitive resist 3 and, after the resist 3 and a conductive layer 1 are successively removed from parts other than the parts 4 which are to be connected to through holes and a conductive circuit 6 is formed. Then the surface of the plate 2 is coated with a photosensitive plating resist 7 and the resist 7 is removed from parts other the parts 5 which are to be used for through holes. Then the plate 2 is dipped in a chemical copper plating solution and copper plating 8 is performed to the parts other than the parts 5 and a laminated body 10 is formed. Then, after such laminated bodies 10 are subjected to heating and pressure bonding with both-side printed wiring boards 11 provided with through holes and surface circuits with prepregs 12 in between, with a copper plate 13 being provided on the outside, through holes 14 are formed in the parts 5 which are to be used for through holes. Thereafter, a multilayered printed wiring board 20 having a smooth surface is obtained by forming through holes 16 and surface circuits 17.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は多層印刷配線板の製造方法に関し、特に搭載部
品に大電流を供給する等の目的から電源・グランド層に
厚い導体回路を有する多層印刷配線板の電源グランド層
の製造方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a multilayer printed wiring board, and in particular, the present invention relates to a method for manufacturing a multilayer printed wiring board, in particular a multilayer printed wiring board having a thick conductor circuit in the power supply/ground layer for the purpose of supplying a large current to mounted components. The present invention relates to a method of manufacturing a power supply ground layer of a printed wiring board.

〔従来の技術〕[Conventional technology]

従来、多層印刷配線板の製造方法としては、表面に導電
層を有する絶縁板の導電層のスルホール形成予定部のス
ルホールとの接続予定部以外の部分をエツチング除去し
、導電回路を形成し、電源・グランド回路用両面印刷配
線板の作成を行ない、このようにして得られた複数の電
源・グランド回路用両面印刷配線板と、あらかじめ両面
に信号回路用に導電回路を形成した複数の印刷配線板を
、片面に導電層を有する2枚の絶縁板あるいは2枚の導
電板を外側に配し、複数のプリプレグを介し、加熱圧着
し、積層体を形成し、前記積層体に貫通孔を設け、スル
ホールめっきを施した後表面回路をエツチングにより形
成し、多層印刷配線板を得ていた。
Conventionally, a method for producing a multilayer printed wiring board involves etching away the portions of the conductive layer of an insulating plate having a conductive layer on the surface other than the portions where through holes are planned to be connected to the through holes to form conductive circuits, and・Double-sided printed wiring boards for ground circuits were created, and multiple double-sided printed wiring boards for power/ground circuits obtained in this way and multiple printed wiring boards with conductive circuits for signal circuits formed on both sides in advance. are placed on the outside with two insulating plates or two conductive plates having a conductive layer on one side, heated and pressed together via a plurality of prepregs to form a laminate, and a through hole is provided in the laminate, After through-hole plating, a surface circuit was formed by etching to obtain a multilayer printed wiring board.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、上述した従来の多層印刷配線板の製造方法は、
特に搭載部品に大電流を供給する必要のある多層印刷配
線板に於いては電源・グランド層に導体厚の厚い導電回
路を形成する必要があるため、次のような製造上の問題
点を有していた。
However, the above-mentioned conventional method for manufacturing multilayer printed wiring boards,
In particular, in multilayer printed wiring boards that need to supply large currents to mounted components, it is necessary to form conductive circuits with thick conductors in the power supply and ground layers, which causes the following manufacturing problems. Was.

(1)電源・グランド層の導電回路形成時に従来の印刷
−エツチング法ではエツチングに時間がかかり、均一な
回路形状が得られない。
(1) When forming a conductive circuit in a power supply/ground layer, the conventional printing-etching method takes a long time to perform etching, and a uniform circuit shape cannot be obtained.

(2)積層体を形成した後の貫通孔形成工程に於いて貫
通孔のうちスルホールと電源グランド層との接続のある
貫通孔では例えばドリル穴あけの際、ドリルが厚い導体
部を切削するためドリル折れやドリルの摩滅が著しく、
貫通孔の形成が困難である。
(2) In the through-hole forming process after forming the laminate, in the through-hole where the through-hole is connected to the power supply ground layer, for example, when drilling, the drill is used to cut a thick conductor part. There are significant bends and drill wear,
It is difficult to form through holes.

(3)電源・グランド層の導電回路の段差が著しく大き
くなるため、積層体形成時に樹脂が完全に埋め込まれず
、ボイドやクラック等を生じる。
(3) Since the level difference in the conductive circuit of the power supply/ground layer becomes significantly large, the resin is not completely filled in when forming the laminate, resulting in voids, cracks, etc.

本発明の目的は、従来の欠点を除去し、電源・グランド
層の形成が導体厚の厚みの大きい導体回路が容易に均一
に得られ、かつ導電回路の段差を。
The purpose of the present invention is to eliminate the drawbacks of the conventional method, to easily and uniformly form a conductor circuit with a large conductor thickness in the formation of a power supply/ground layer, and to eliminate steps in the conductive circuit.

なくすとともに、ボイドやクラックのない多層印刷配線
板の製造方法を提供することにある。
It is an object of the present invention to provide a method for manufacturing a multilayer printed wiring board that is free from voids and cracks.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の第1の発明の多層印刷配線板の製造方法は、表
面に導電層を有する絶縁板の導電層のスルホール形成予
定部のスルホールとの接続予定部以外の部分をエツチン
グ除去して導電回路を形成する工程と、前記絶縁板のス
ルホール形成予定部にめっきレジスト層を形成し、前記
導電回路のスルホール形成予定部以外の部分に銅めっき
を施し導電回路の厚みを部分的に増加し電源・グランド
回路用両面印刷配線板を作成する工程と、前記得られた
複数の電源・グランド回路用両面印刷配線板とあらかじ
め両面に信号回路用に導電回路を形成した複数の印刷配
線板とを片面に導電層を有する2枚の絶縁板あるいは2
枚の導電板を外側に配し、複数のプリプレグを介し加熱
圧着し、M屠体を形成する工程と、前記積層体に貫通孔
を設け、スルホールめっきを施した後表面回路をエツチ
ングにより形成する工程とを含んで構成される。
The method for manufacturing a multilayer printed wiring board according to the first aspect of the present invention includes etching away portions of the conductive layer of an insulating plate having a conductive layer on the surface thereof, other than the portions to be connected to the through holes, to form a conductive circuit. forming a plating resist layer on the portion of the insulating plate where through-holes are to be formed, and applying copper plating to a portion of the conductive circuit other than the portion where through-holes are expected to be formed to partially increase the thickness of the conductive circuit; A step of creating a double-sided printed wiring board for ground circuits, and a step of combining the obtained double-sided printed wiring boards for power supply/ground circuits and a plurality of printed wiring boards with conductive circuits for signal circuits formed on both sides in advance on one side. Two insulating plates with conductive layers or two
A process of arranging two conductive plates on the outside and heat-pressing them through a plurality of prepregs to form an M carcass, and forming through holes in the laminated body, performing through-hole plating, and then forming a surface circuit by etching. It consists of a process.

また、本発明の第2の発明の多層印刷配線板の製造方法
は、表面に導電層を有する絶縁板の導電層のスルホール
形成予定部のスルホールとの接続予定部以外の部分をエ
ツチング除去して導電回路を形成する工程と、前記絶縁
板のスルホール形成予定部にめっきレジスト層を形成し
、前記導電回路のスルホール形成予定部以外の部分に銅
めっきを施し導電回路の厚みを部分的に増加する工程と
、前記めっきレジスト層を除去し、前記絶縁板表面に絶
縁層を設け、電源・グランド回路用両面印刷配線板を作
成する工程と、前記得られた複数の電源・グランド回路
用両面印刷配線板とあらかじめ両面に信号回路用に導電
回路を形成した複数の印刷配線板とを片面に導電層を有
する2枚の絶縁板あるいは2枚の導電板を外(uすに配
し、複数のプリプレグを介し加熱圧着し、積層体を形成
する工程と、前記積層体に貫通孔を設け、スルホールめ
っきを施した後表面回路をエツチングにより形成する工
程とを含むことを特徴として構成される。
Further, the method for manufacturing a multilayer printed wiring board according to the second aspect of the present invention includes etching and removing a portion of the conductive layer of an insulating plate having a conductive layer on the surface thereof, other than the portion where the through hole is to be formed, other than the portion where the through hole is to be connected. a step of forming a conductive circuit, forming a plating resist layer on the portion of the insulating plate where through holes are to be formed, and applying copper plating to a portion of the conductive circuit other than the portion where through holes are to be formed to partially increase the thickness of the conductive circuit; a step of removing the plating resist layer and providing an insulating layer on the surface of the insulating plate to create a double-sided printed wiring board for power supply/ground circuits; and a step of creating a double-sided printed wiring board for power supply/ground circuits obtained above. A board and a plurality of printed wiring boards on which conductive circuits for signal circuits have been formed on both sides in advance, and two insulating plates or two conductive plates having a conductive layer on one side are placed on the outside (U), and a plurality of prepregs are placed on the outside. The method is characterized by comprising the steps of: forming a laminate by heat-pressing the laminate; and forming through-holes in the laminate, performing through-hole plating, and then forming a surface circuit by etching.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
(a)〜(h)は本発明の一実施例を説明するために工
程順に示した多層印刷配線板の断面図である。
Next, the present invention will be explained with reference to the drawings. FIGS. 1(a) to 1(h) are cross-sectional views of a multilayer printed wiring board shown in the order of steps to explain an embodiment of the present invention.

まず、第1図(a>に示すように両面に厚さ18μの導
電層1を形成したガラスファイバー入りポリイミド樹脂
より成るM層板2を用窓する。
First, as shown in FIG. 1(a), an M-layer plate 2 made of glass fiber-containing polyimide resin and having a conductive layer 1 of 18 μm thick on both sides is prepared.

次に、第1図(b)に示すように、全面に感光性のエツ
チングレジスト3をラミネートし、スルホール予定部5
のスルホール接続予定部4以外の部分のエツチングレジ
スト3を露光後現像し、除去する。次に、第1図(c)
に示すように、積層板2をエツチング液にスプレー浸漬
し、スルホール予定部5のスルホール接続予定部4以外
の部分の導電層1をエツチング除去した後、第1図(d
)に示すように、エツチングレジスト3を剥離し、導電
回路6を形成する。
Next, as shown in FIG. 1(b), a photosensitive etching resist 3 is laminated on the entire surface, and through-hole planned areas 5 are
After exposure, the etching resist 3 in the area other than the planned through-hole connection area 4 is developed and removed. Next, Figure 1(c)
As shown in FIG.
), the etching resist 3 is removed and a conductive circuit 6 is formed.

次いで、第1図(e)に示すように、前記積層板2の表
面に、200μの厚みの感光性のめつきレジスト7をラ
ミネートした後、露光・現像することによりスルホール
形成予定部5以外の部分のめっきレジスト7を除去する
。次に、第1図(f)に示すように、積層板2を無電解
銅めっき液に浸漬し、スルホール形成予定部5以外の部
分に銅めっき8を180μ施し、電源・クランド回路用
積層体10を形成する。次に、第1図(g)に示すよう
に、あらかじめスルホールと表面回路を形成した両面印
刷配線板11と上記電源・グランド回路用積層体10を
プリプレグ12を介し、外側に銅板13を配し、加熱圧
着した後、スルホール形成予定部5に貫通孔14をドリ
ルを用いて形成する0次いで、第1図(h)に示すよう
に、表面及び貫通孔壁面に銅めっき15を施し、通常の
印刷エツチング法を用いてスルホール16及び表面回路
17を形成すると本発明の一実施例により形成された多
層印刷配線20が得られる。
Next, as shown in FIG. 1(e), a photosensitive plating resist 7 with a thickness of 200 μm is laminated on the surface of the laminate 2, and then exposed and developed to remove areas other than the areas 5 where through holes are to be formed. Partial plating resist 7 is removed. Next, as shown in FIG. 1(f), the laminate 2 is immersed in an electroless copper plating solution, and 180 μm of copper plating 8 is applied to the portions other than the portions 5 where through holes are to be formed. form 10. Next, as shown in FIG. 1(g), the double-sided printed wiring board 11 on which through-holes and surface circuits have been formed in advance and the power supply/ground circuit laminate 10 are placed with a prepreg 12 in between, and a copper plate 13 is placed on the outside. After heat-pressing, a through-hole 14 is formed in the through-hole formation area 5 using a drill.Next, as shown in FIG. Forming the through-holes 16 and surface circuits 17 using a print-etching method results in a multilayer printed wiring 20 formed according to an embodiment of the present invention.

このようにして得られた多層印刷配線板は、形状の均一
な厚い電源・グランド回路を多層印刷配線板内に有し、
しかも、途中製造工程に於ける貫通孔の形成が容易であ
り、しかも厚い電源グランド回路形成・時のめつきレジ
ストをそのまま残しているので表面が平滑化されボイド
、クラックのないものか得られた。
The multilayer printed wiring board thus obtained has a thick power supply/ground circuit with a uniform shape within the multilayer printed wiring board,
Moreover, it is easy to form through holes during the manufacturing process, and since the thick power supply ground circuit formation and plating resist are left intact, the surface is smooth and free of voids and cracks. .

なお、上記実施例では積層板2に銅めっきを施し、導電
回路の厚みを増すなめに無電解銅めっき法を用いたが電
気銅めっきを用いても同様の効果が得られる。
In the above embodiment, the laminate 2 was copper plated using electroless copper plating in order to increase the thickness of the conductive circuit, but the same effect can be obtained by using electrolytic copper plating.

第2図(a)〜(、j)は本発明の他の実施例を説明す
るために工程順に示した多層印刷配線板の断面図である
FIGS. 2(a) to 2(j) are cross-sectional views of a multilayer printed wiring board shown in the order of steps for explaining another embodiment of the present invention.

本実施例は第2図(a)〜(、j)から明らかなように
第2図(a)より第2図(f)までの工程は第1図(a
)より第1図(f)の工程と同じであるので説明を省略
する。
As is clear from FIGS. 2(a) to 2(j), the process from FIG. 2(a) to FIG. 2(f) is similar to that shown in FIG. 1(a).
), the process is the same as that shown in FIG. 1(f), so the explanation will be omitted.

次に、第1図(g)に示すように、めっきレジスト7を
除去する。次いで、第2図(h)に示すように、表面に
ポリイミド樹脂を主成分とする絶縁N9をスクリーン印
刷により形成し、表面が絶縁層で覆われ平坦化された電
源・グランド回路用積層体10を得る。
Next, as shown in FIG. 1(g), the plating resist 7 is removed. Next, as shown in FIG. 2(h), an insulating layer N9 mainly composed of polyimide resin is formed on the surface by screen printing, and the surface is covered with an insulating layer and flattened to form a power/ground circuit laminate 10. get.

次に、第2図(i)および第2図(j)の工程を経るこ
とにより本発明の第2の発明による多層印刷配線板が得
られるが、この工程は電源・グランド回路用積層体が異
なるのみのため詳細説明は省略する。
Next, a multilayer printed wiring board according to the second invention of the present invention is obtained by going through the steps shown in FIG. 2(i) and FIG. Detailed explanations will be omitted since they are only different.

なお、第1の発明と同様、銅めっきは無電解銅めっきに
かえ電気銅めっきによってもよい。
Note that, similar to the first invention, the copper plating may be performed by electrolytic copper plating instead of electroless copper plating.

本実施例によれば第1の実施例に比べ電源・グランド回
路用積層体はめつきレジストを除去しポリイミド樹脂を
主成分とする絶縁層が形成されているのでより表面が平
坦化され、信頼性のすぐれた多層印刷配線板を得ること
ができる。
According to this embodiment, compared to the first embodiment, the plating resist of the power/ground circuit laminate is removed and an insulating layer mainly composed of polyimide resin is formed, resulting in a more flat surface and improved reliability. An excellent multilayer printed wiring board can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、特に搭載部品に大電流を
供給する多層印刷配線板の電源・グランド層の形成をス
ルホール以外の部分に選択的に銅めっきを施すこと、及
び電源・グランド回路の段差を埋めることにより、ボイ
ド、クラックのない多層印刷配線板を容易に製造できる
効果がある。
As explained above, the present invention particularly relates to the formation of a power supply/ground layer of a multilayer printed wiring board that supplies a large current to mounted components by selectively applying copper plating to areas other than through holes, and of forming a power supply/ground circuit. By filling in the steps, it is possible to easily manufacture a multilayer printed wiring board without voids or cracks.

多層印刷配線板。Multilayer printed wiring board.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(h)は本発明の一実施例を説明するた
めに工程順に示した多層印刷配線板の断面図、第2図(
a)〜(j)は本発明の他の実施例を説明するために工
程順に示した多層印刷配線板の断面図である。 1・・・導電層、2・・・櫃層板(絶縁板)、3・・・
エツチングレジスト、4・・・スルホール接続予定部、
5・・・スルホール予定部、6・・・導電回路、7・・
・めっきレジスト、8・・・銅めっき、10・・・電源
・グランド回路用積層体(電源・グランド回路用両面印
刷配線板)、11・・・両面印刷配線板、12・・・プ
リプレグ、13・・・銅板、14・・・貫通孔、15・
・・銅めっき、16・・・スルホール、17・・・表面
回路、20・・・茅 房
FIGS. 1(a) to (h) are cross-sectional views of a multilayer printed wiring board shown in the order of steps for explaining one embodiment of the present invention, and FIG.
a) to (j) are cross-sectional views of a multilayer printed wiring board shown in the order of steps to explain other embodiments of the present invention. DESCRIPTION OF SYMBOLS 1... Conductive layer, 2... Box layer board (insulating board), 3...
Etching resist, 4...Through hole connection planned area,
5... Through hole planned portion, 6... Conductive circuit, 7...
- Plating resist, 8... Copper plating, 10... Laminate for power supply/ground circuit (double-sided printed wiring board for power/ground circuit), 11... Double-sided printed wiring board, 12... Prepreg, 13 ...Copper plate, 14...Through hole, 15.
...Copper plating, 16...Through hole, 17...Surface circuit, 20...Kayabou

Claims (2)

【特許請求の範囲】[Claims] (1)表面に導電層を有する絶縁板の導電層のスルホー
ル形成予定部のスルホールとの接続予定部以外の部分を
エッチング除去して導電回路を形成する工程と、前記絶
縁板のスルホール形成予定部にめっきレジスト層を形成
し、前記導電回路のスルホール形成予定部以外の部分に
銅めつきを施し導電回路の厚みを部分的に増加し電源・
グランド回路用両面印刷配線板を作成する工程と、前記
得られた複数の電源グランド回路用両面印刷配線板とあ
らかじめ両面に信号回路用に導電回路を形成した複数の
印刷配線板とを片面に導電層を有する2枚の絶縁板ある
いは2枚の導電板を外側に配し、複数のプリプレグを介
し加熱圧着し、積層体を形成する工程と、前記積層体に
貫通孔を設け、スルホールめっきを施した後表面回路を
エッチングにより形成する工程とを含むことを特徴とす
る多層印刷配線板の製造方法。
(1) A step of forming a conductive circuit by etching away a portion of the conductive layer of an insulating plate having a conductive layer on its surface, other than a portion to be connected to the through hole, and a portion of the insulating plate where the through hole is to be formed. A plating resist layer is formed on the conductive circuit, and copper plating is applied to the portions of the conductive circuit other than the portions where through holes are planned to be formed to partially increase the thickness of the conductive circuit.
A process of creating double-sided printed wiring boards for ground circuits, and a process of forming a plurality of double-sided printed wiring boards for power ground circuits obtained above and a plurality of printed wiring boards on which conductive circuits for signal circuits have been formed on both sides in advance to conductive circuits on one side. A process of arranging two insulating plates or two conductive plates having layers on the outside and heat-pressing them through a plurality of prepregs to form a laminate, and forming a through hole in the laminate and performing through-hole plating. 1. A method for producing a multilayer printed wiring board, comprising the step of forming a surface circuit by etching after the step of forming a surface circuit.
(2)表面に導電層を有する絶縁板の導電層のスルホー
ル形成予定部のスルホールとの接続予定部以外の部分を
エッチング除去して導電回路を形成する工程と、前記絶
縁板のスルホール形成予定部にめっきレジスト層を形成
し、前記導電回路のスルホール形成予定部以外の部分に
銅めっきを施し導電回路の厚みを部分的に増加する工程
と、前記めっきレジスト層を除去し、前記絶縁板表面に
絶縁層を設け、電源・グランド回路用両面印刷配線板を
作成する工程と、前記得られた複数の電源・グランド回
路用両面印刷配線板とあらかじめ両面に信号回路用に導
電回路を形成した複数の印刷配線板とを片面に導電層を
有する2枚の絶縁板あるいは2枚の導電板を外側に配し
、複数のプリプレグを介し加熱圧着し、積層体を形成す
る工程と、前記積層体に貫通孔を設け、スルホールめっ
きを施した後表面回路をエッチングにより形成する工程
とを含むことを特徴とする多層印刷配線板の製造方法。
(2) forming a conductive circuit by etching away a portion of the conductive layer of the insulating plate having a conductive layer on its surface, other than the portion to be connected to the through hole; and a step of forming a conductive circuit in the through hole planned portion of the insulating plate a step of forming a plating resist layer on the surface of the insulating plate, and applying copper plating to a portion of the conductive circuit other than the portion where through holes are to be formed to partially increase the thickness of the conductive circuit; A step of providing an insulating layer and creating a double-sided printed wiring board for power supply/ground circuits, and a plurality of double-sided printed wiring boards for power supply/ground circuits obtained above and a plurality of double-sided printed wiring boards for signal circuits on both sides of which are formed in advance. A process of forming a laminate by placing two insulating plates having a conductive layer on one side or two conductive plates on the outside of the printed wiring board and bonding them under heat through a plurality of prepregs, and forming a laminate through the laminate. 1. A method for producing a multilayer printed wiring board, comprising the steps of forming holes, performing through-hole plating, and then forming a surface circuit by etching.
JP17324388A 1988-07-11 1988-07-11 Manufacture of multilayered printed wiring board Pending JPH0222893A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17324388A JPH0222893A (en) 1988-07-11 1988-07-11 Manufacture of multilayered printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17324388A JPH0222893A (en) 1988-07-11 1988-07-11 Manufacture of multilayered printed wiring board

Publications (1)

Publication Number Publication Date
JPH0222893A true JPH0222893A (en) 1990-01-25

Family

ID=15956813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17324388A Pending JPH0222893A (en) 1988-07-11 1988-07-11 Manufacture of multilayered printed wiring board

Country Status (1)

Country Link
JP (1) JPH0222893A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013005451A1 (en) * 2011-07-06 2013-01-10 株式会社 豊田自動織機 Multi-layer wiring board and method for producing multi-layer wiring board
WO2017183146A1 (en) * 2016-04-21 2017-10-26 富士通株式会社 Circuit board, method for manufacturing circuit board, and electronic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013005451A1 (en) * 2011-07-06 2013-01-10 株式会社 豊田自動織機 Multi-layer wiring board and method for producing multi-layer wiring board
JP5672381B2 (en) * 2011-07-06 2015-02-18 株式会社豊田自動織機 Multilayer wiring board
WO2017183146A1 (en) * 2016-04-21 2017-10-26 富士通株式会社 Circuit board, method for manufacturing circuit board, and electronic device
US11317520B2 (en) 2016-04-21 2022-04-26 Fujitsu Interconnect Technologies Limited Circuit board, method of manufacturing circuit board, and electronic device

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