JPH02228745A - 入出力キヤツシユ - Google Patents
入出力キヤツシユInfo
- Publication number
- JPH02228745A JPH02228745A JP2006052A JP605290A JPH02228745A JP H02228745 A JPH02228745 A JP H02228745A JP 2006052 A JP2006052 A JP 2006052A JP 605290 A JP605290 A JP 605290A JP H02228745 A JPH02228745 A JP H02228745A
- Authority
- JP
- Japan
- Prior art keywords
- cache
- memory
- line
- buffer
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000872 buffer Substances 0.000 claims abstract description 69
- 238000012546 transfer Methods 0.000 abstract description 30
- 238000012360 testing method Methods 0.000 description 15
- 238000000034 method Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000013519 translation Methods 0.000 description 4
- 230000014616 translation Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000007246 mechanism Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000006399 behavior Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Storage Device Security (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US297779 | 1979-01-12 | ||
US29777989A | 1989-01-13 | 1989-01-13 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02228745A true JPH02228745A (ja) | 1990-09-11 |
JPH0526217B2 JPH0526217B2 (US07902200-20110308-C00004.png) | 1993-04-15 |
Family
ID=23147708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006052A Granted JPH02228745A (ja) | 1989-01-13 | 1990-01-13 | 入出力キヤツシユ |
Country Status (4)
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04182845A (ja) * | 1990-11-19 | 1992-06-30 | Pfu Ltd | 入出力バスのキャッシュ・タグ検索方式 |
JPH08249229A (ja) * | 1995-03-13 | 1996-09-27 | Nec Corp | 入出力制御装置 |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5469555A (en) * | 1991-12-19 | 1995-11-21 | Opti, Inc. | Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system |
US5551000A (en) * | 1993-03-18 | 1996-08-27 | Sun Microsystems, Inc. | I/O cache with dual tag arrays |
US5748922A (en) * | 1993-04-05 | 1998-05-05 | Packard Bell Nec | Method and apparatus for reading data from a write only port |
US5526512A (en) * | 1993-09-20 | 1996-06-11 | International Business Machines Corporation | Dynamic management of snoop granularity for a coherent asynchronous DMA cache |
US5619673A (en) * | 1994-06-29 | 1997-04-08 | Intel Corporation | Virtual access cache protection bits handling method and apparatus |
US5687347A (en) * | 1994-09-19 | 1997-11-11 | Matsushita Electric Industrial Co., Ltd. | Data providing device, file server device, and data transfer control method |
US5893147A (en) * | 1994-12-22 | 1999-04-06 | Intel Corporation | Method and apparatus for distinguishing system memory data from alternative memory data in a shared cache memory |
US5712991A (en) * | 1995-01-18 | 1998-01-27 | Texas Instrument Incorporated | Buffer memory for I/O writes programmable selective |
US5805930A (en) * | 1995-05-15 | 1998-09-08 | Nvidia Corporation | System for FIFO informing the availability of stages to store commands which include data and virtual address sent directly from application programs |
US5640591A (en) * | 1995-05-15 | 1997-06-17 | Nvidia Corporation | Method and apparatus for naming input/output devices in a computer system |
US5623692A (en) * | 1995-05-15 | 1997-04-22 | Nvidia Corporation | Architecture for providing input/output operations in a computer system |
US5860138A (en) * | 1995-10-02 | 1999-01-12 | International Business Machines Corporation | Processor with compiler-allocated, variable length intermediate storage |
US5862316A (en) * | 1996-07-01 | 1999-01-19 | Sun Microsystems, Inc. | Multiprocessing system having coherency-related error logging capabilities |
US5802564A (en) * | 1996-07-08 | 1998-09-01 | International Business Machines Corp. | Method and apparatus for increasing processor performance |
US6065100A (en) * | 1996-11-12 | 2000-05-16 | Micro-Design International | Caching apparatus and method for enhancing retrieval of data from an optical storage device |
US5896544A (en) | 1996-12-26 | 1999-04-20 | Intel Corporation | Software device for supporting a new class of PC peripherals |
US5974497A (en) * | 1997-05-22 | 1999-10-26 | Dell Computer Corporation | Computer with cache-line buffers for storing prefetched data for a misaligned memory access |
US6195730B1 (en) | 1998-07-24 | 2001-02-27 | Storage Technology Corporation | Computer system with storage device mapping input/output processor |
US6536000B1 (en) | 1999-10-15 | 2003-03-18 | Sun Microsystems, Inc. | Communication error reporting mechanism in a multiprocessing computer system |
DE10143556A1 (de) * | 2001-09-06 | 2003-03-27 | Daimler Chrysler Ag | Fahrzeugmanagementsystem |
US8108692B1 (en) | 2006-06-27 | 2012-01-31 | Siliconsystems, Inc. | Solid-state storage subsystem security solution |
US8719807B2 (en) | 2006-12-28 | 2014-05-06 | Intel Corporation | Handling precompiled binaries in a hardware accelerated software transactional memory system |
JP5157424B2 (ja) * | 2007-12-26 | 2013-03-06 | 富士通セミコンダクター株式会社 | キャッシュメモリシステム及びキャッシュメモリの制御方法 |
US8356184B1 (en) | 2009-06-25 | 2013-01-15 | Western Digital Technologies, Inc. | Data storage device comprising a secure processor for maintaining plaintext access to an LBA table |
US9305142B1 (en) | 2011-12-19 | 2016-04-05 | Western Digital Technologies, Inc. | Buffer memory protection unit |
Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3723976A (en) * | 1972-01-20 | 1973-03-27 | Ibm | Memory system with logical and real addressing |
US3713107A (en) * | 1972-04-03 | 1973-01-23 | Ncr | Firmware sort processor system |
US3848234A (en) * | 1973-04-04 | 1974-11-12 | Sperry Rand Corp | Multi-processor system with multiple cache memories |
US4070706A (en) * | 1976-09-20 | 1978-01-24 | Sperry Rand Corporation | Parallel requestor priority determination and requestor address matching in a cache memory system |
US4084225A (en) * | 1976-09-24 | 1978-04-11 | Sperry Rand Corporation | Virtual address translator |
US4071890A (en) * | 1976-11-29 | 1978-01-31 | Data General Corporation | CPU-Synchronous parallel data processor apparatus |
US4293910A (en) * | 1979-07-02 | 1981-10-06 | International Business Machines Corporation | Reconfigurable key-in-storage means for protecting interleaved main storage |
US4527237A (en) * | 1979-10-11 | 1985-07-02 | Nanodata Computer Corporation | Data processing system |
US4395758A (en) * | 1979-12-10 | 1983-07-26 | Digital Equipment Corporation | Accelerator processor for a data processing system |
US4399506A (en) * | 1980-10-06 | 1983-08-16 | International Business Machines Corporation | Store-in-cache processor means for clearing main storage |
US4394731A (en) * | 1980-11-10 | 1983-07-19 | International Business Machines Corporation | Cache storage line shareability control for a multiprocessor system |
US4463424A (en) * | 1981-02-19 | 1984-07-31 | International Business Machines Corporation | Method for dynamically allocating LRU/MRU managed memory among concurrent sequential processes |
DE3175351D1 (en) * | 1981-10-28 | 1986-10-23 | Ibm | Scanning device for communication lines, adapted for a communication controller |
US4484267A (en) * | 1981-12-30 | 1984-11-20 | International Business Machines Corporation | Cache sharing control in a multiprocessor |
IT1151351B (it) * | 1982-01-19 | 1986-12-17 | Italtel Spa | Disposizione circuitale atta a realizzare lo scambio di dati tra una coppia di elaboratori operanti secondo il principio master-slave |
US4451884A (en) * | 1982-02-02 | 1984-05-29 | International Business Machines Corporation | Cycle stealing I/O controller with programmable offline mode of operation |
US4509116A (en) * | 1982-04-21 | 1985-04-02 | Digital Equipment Corporation | Special instruction processing unit for data processing system |
US4471430A (en) * | 1982-09-27 | 1984-09-11 | Data General Corp. | Encachement apparatus |
EP0114944B1 (en) * | 1982-12-28 | 1989-09-27 | International Business Machines Corporation | Method and apparatus for controlling a single physical cache memory to provide multiple virtual caches |
US4586133A (en) * | 1983-04-05 | 1986-04-29 | Burroughs Corporation | Multilevel controller for a cache memory interface in a multiprocessing system |
US4729094A (en) * | 1983-04-18 | 1988-03-01 | Motorola, Inc. | Method and apparatus for coordinating execution of an instruction by a coprocessor |
US4667288A (en) * | 1983-06-30 | 1987-05-19 | Honeywell Information Systems Inc. | Enable/disable control checking apparatus |
JPS6093563A (ja) * | 1983-10-27 | 1985-05-25 | Hitachi Ltd | バツフア記憶制御方式 |
US4669043A (en) * | 1984-02-17 | 1987-05-26 | Signetics Corporation | Memory access controller |
JPS617967A (ja) * | 1984-06-15 | 1986-01-14 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | I/oコントロ−ラ |
US4654778A (en) * | 1984-06-27 | 1987-03-31 | International Business Machines Corporation | Direct parallel path for storage accesses unloading common system path |
US4677546A (en) * | 1984-08-17 | 1987-06-30 | Signetics | Guarded regions for controlling memory access |
US4794521A (en) * | 1985-07-22 | 1988-12-27 | Alliant Computer Systems Corporation | Digital computer with cache capable of concurrently handling multiple accesses from parallel processors |
US4775955A (en) * | 1985-10-30 | 1988-10-04 | International Business Machines Corporation | Cache coherence mechanism based on locking |
JPS62145340A (ja) * | 1985-12-20 | 1987-06-29 | Toshiba Corp | キヤツシユメモリ制御方式 |
US4885680A (en) * | 1986-07-25 | 1989-12-05 | International Business Machines Corporation | Method and apparatus for efficiently handling temporarily cacheable data |
US5091846A (en) * | 1986-10-03 | 1992-02-25 | Intergraph Corporation | Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency |
US5029070A (en) * | 1988-08-25 | 1991-07-02 | Edge Computer Corporation | Coherent cache structures and methods |
US4928225A (en) * | 1988-08-25 | 1990-05-22 | Edgcore Technology, Inc. | Coherent cache structures and methods |
-
1989
- 1989-12-11 DE DE68923863T patent/DE68923863T2/de not_active Expired - Fee Related
- 1989-12-11 EP EP89312896A patent/EP0377970B1/en not_active Expired - Lifetime
-
1990
- 1990-01-13 JP JP2006052A patent/JPH02228745A/ja active Granted
-
1992
- 1992-12-23 US US07/996,501 patent/US5418927A/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04182845A (ja) * | 1990-11-19 | 1992-06-30 | Pfu Ltd | 入出力バスのキャッシュ・タグ検索方式 |
JPH08249229A (ja) * | 1995-03-13 | 1996-09-27 | Nec Corp | 入出力制御装置 |
Also Published As
Publication number | Publication date |
---|---|
EP0377970A3 (en) | 1991-03-20 |
EP0377970B1 (en) | 1995-08-16 |
JPH0526217B2 (US07902200-20110308-C00004.png) | 1993-04-15 |
EP0377970A2 (en) | 1990-07-18 |
US5418927A (en) | 1995-05-23 |
DE68923863T2 (de) | 1996-03-28 |
DE68923863D1 (de) | 1995-09-21 |
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