JPH02224576A - Screen display device - Google Patents

Abstract

PURPOSE:To decrease malfunction of a display data memory by providing a protection circuit moving an address signal on an address signal lie to a memory space not in use when no access is applied to the display data memory. CONSTITUTION:A protection circuit 51C provided between an address control circuit 5 and a display data memory 7 acts like moving an address signal outputted to an address signal line 5A extended from the circuit 5 to a memory space not in use in the memory when no access to the memory 7 is applied. That is, when an address control circuit 12 does not access the memory 7, the output of a decoder 51A is always logical 1 and even when a value of the most significant bit signal A15 of the line 5A is 0, since an output of an OR circuit 51B is logical 1, the address is moved to the memory space not in use in the memory space of the memory 7. Thus, the rewrite of the data in the memory 7 in error is prevented, then malfunction of the memory 7 is decreased.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a screen display device that displays characters and patterns such as channel numbers in broadcast images displayed on a display device such as a cathode ray tube. .

[Prior Art] Figure 3 shows an example of the configuration of a conventional screen display device of this type.
In FIG. 3, 1 is a display oscillation circuit to which the oscillation output of the π-type LC oscillation circuit 1a is supplied, 2 is a timing generator that generates various timings using the signal oscillated by the display oscillation circuit 1, and 3 are input terminals 3a to 3 from an external control circuit such as a microcomputer (not shown) for controlling the output of the timing generator 2 and the screen display device.
an input control circuit for inputting control data (commands and character codes for display on/off, etc.) input to c;
5 is a data control circuit, 5 is an address control circuit, and 7 is a display data memory for storing control data, which is composed of a RAM. A display character memory 8 stores characters and patterns to be displayed in the font structure shown in FIG. 4, and is composed of a ROM. 6 is a display control register that latches commands such as display control among the outputs of the input control circuit 3; 9 is a terminal 9a;
a synchronization signal switching circuit that selectively outputs either a horizontal or vertical synchronization signal of the image signal supplied to b or a horizontal or vertical synchronization signal generated internally; 11 is a character in the display device; 1 is a display position detection circuit for detecting the display position of a pattern, etc.; 13 is a display control circuit;
The display of the output of the display character memory 8 is controlled in accordance with the display command of the display control register 6. This screen display device is composed of the above-mentioned circuits, and the output of the display control circuit 13 is supplied to the video mixer 17.

A composite video signal is output from this video mixer 17 via a CVIDEO terminal 17a. Further, from the display control circuit 13, R, G, H color signals, etc. are sent to the terminal 13a.
~13f. 10 is H counter, 14
1 is a shift register, 15 is an oscillation circuit for generating a synchronizing signal to which the oscillation output of the oscillation element circuit 15a is supplied, 16 is a timing generator for generating a synchronizing signal, and 21 is a blinking circuit.

Next, the operation will be explained. The input control circuit 3 processes control data input from a microcomputer or the like through terminals 3a to 3c, causes a display control register 6 to latch commands such as display control, and displays character codes and the like as display contents. It is stored in the data memory 7. During display, the character code stored in the display data memory 7 accesses the display character memory 8 as output data, and the display character font output from the display character memory 8 is input to the display control circuit 13. Here, the display data memory 7 is composed of a total of (a + b)·C bits, where one word is (a+b) bits and the number of characters to be displayed is C. On the other hand, it is assumed that one display character memory 8 has one font composed of (J!Xm) bits, and there are n characters of the types. In addition, the timing at the time of display is determined by inputting a synchronization signal from the image signal to the synchronization signal switching circuit 9, counting this synchronization signal with the H counter 10, and based on this count value, display position detection circuit 11
The position of the displayed character on the display device is determined by

The display control circuit 13 synchronizes the display character output with an external video signal, controls the display according to the contents of the display control register 6, outputs it, and supplies it to the video mixer 17.

Note that the synchronizing signal generation oscillation circuit 15 is the oscillation element circuit 1
5a, it is possible to generate a synchronization signal of the NTSC system or PAL system, and this switching is performed by the signal from the N/P terminal 15b, thereby outputting 4fsc or 2fsc oscillation, and the timing generator 16 for generating the synchronization signal outputs oscillation of 4fsc or 2fsc. Since a synchronizing signal is generated, display on the TV screen is possible even when there is no signal. However, fsc is the color subcarrier,
3.58MHz for NTSC system, 4 for PAL system
．． It is 43MIIz.

In addition, the video mixer 17 allows NTSC and P
It is possible to generate an AL type composite video signal and to superimpose it onto an external composite video signal. The composite video signal has character level (LECHA), external composite video input (CV I N), and blanking level (LEBK).
), background carrier color signal input (R8IN), color burst input (CBIN), and sync chip level are switched and synthesized by an analog switch and output from the CVIDEO terminal 17a.

[Problems to be Solved by the Invention] In the conventional screen display device, an arbitrary address signal is applied to the address signal line even when the display data memory is not accessed. There is a problem that when a control signal such as a read signal or a write signal is output due to some kind of noise signal, the data in the display data memory may be erroneously rewritten. This invention solves the above problem. The purpose of this invention is to provide a screen display device that can reduce malfunctions of display data memory.

[Means for Solving the Problems] The screen display device according to the present invention stores the value of the address signal applied to the display data memory in unused memory of the display data memory except when accessing the display data memory. It is characterized by a separate protection circuit that allows it to fly into space.

[Function] When the display data memory is accessed, the address in the used memory space is placed on the address signal line, and the read signal, write signal, and chip select signal are output to the control signal line to access the display data memory. Read and write data via the data signal line.

Here, when the display data memory is not accessed, the protection circuit skips the address signal on the address signal line from the used memory space to the unused memory space.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. Note that the same components as those in the prior art are given the same numbers and their explanations are omitted. Figure 1.

FIGS. 2(a) and 2(b) are block diagrams showing an embodiment of the present invention. In the figures, 51 is a protection circuit interposed between the address control circuit 5 and the display data memory 7; The protection circuit 51 connects the address signal line 5 extending from the address control circuit 5 when the display data memory 7 is not accessed.
An operation is performed to transfer the address signal output to A to an unused memory space in the memory space of the display data memory 7.

FIG. 2(a) is a detailed block diagram of this protection circuit 51. In the figure, 51A is the read address control circuit 1.
The decoder 51B that decodes the address signal No. 2 is an OR circuit that takes the logical sum of the output of the decoder 51A and the most significant bit signal A15 of the address signal line 5A output from the address control circuit 5.

In such a configuration, the read address control circuit 12
When the display data memory 7 is not accessed, the output of the decoder 51A is always 1', and for example, even if the value of 0 to the most significant bit signal of the address signal line 5A is dOl, the output of the OR circuit 51B is The output will be 1', so
The address will jump to an unused memory space in the display data memory 7.

This will be explained in more detail based on FIG. 2(b). In FIG. 2(b), the entire memory space of the display data memory 7 is 0000h-ffffh,
oooo h~7fff Memory space used where h is actually used as a data area, 8000 h~f
If fffh is an unused memory space, the most significant bit signal A of address signal line 5A
When the value of 1g is 0', the address indicated by the address signal line 5A is within the usable memory space of the display data memory 7, and when the value of the most significant bit signal A, , is 11', the address indicated by the address signal line 5A is within the memory space used by the display data memory 7. The address will be in unused memory space. Therefore, by setting the value of the most significant bit signal AH to 1', the data is moved out of the used memory space, that is, to an unused memory space.

[Effects of the Invention] As explained above, according to the present invention, a protection circuit that skips the value of the address signal applied to the display data memory to an unused memory space except when accessing the display data memory is provided. This has the effect of reducing malfunctions of the display data memory.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing one embodiment of the present invention, and FIG. 2 (a
) is a detailed configuration diagram of a specific example of the protection circuit in Figure 1,
FIG. 2(b) is an explanatory diagram of its operation, FIG. 3 is a diagram of the configuration of a conventional screen display device, and FIG. 4 is a diagram of the configuration of fonts in a conventional display character memory. DESCRIPTION OF SYMBOLS 1... Display oscillation circuit, 2... Timing generator, 3... Input control circuit, 4... Data control circuit, 5... Address control circuit, 6... Display control register, 7... ... Display data memory, 8... Display character memory, 9... Synchronization signal switching circuit, 11... Display position detection circuit, 13... Display control circuit, 17...
Video mixer 51...protection circuit, 51A...decoder, 51B...OR circuit. In the drawings, the same reference numerals indicate the same or corresponding components. Agent Masuo Oiwa (2 idiots) Figure 2 (a) Figure 2 (b) Figure 4 procedural amendment (voluntary) February 22, 1998 ■ ↑,'? Office Director's Palace 2, Name of invention screen display device 3, Person making the amendment Relationship with the case 17+f Patent applicant representative Moriya Shiki 4, agent name (7375) Patent attorney Masuo Oiwa (contact information + 1: ((213) 3421 ↑, +f 茑) a
Details of the amendment (1) The phrase "any address" in the first line of page 7 of the specification is amended to read "any or specific address."that's all

Claims (1)

[Scope of Claims] A screen display device that displays characters or patterns on a display device such as a cathode ray tube includes an oscillation circuit that generates signals that serve as reference for various timings, and various timings based on the oscillation signals of the oscillation circuit. A timing generator that generates a signal, an input control circuit that accepts and processes a control signal from an external control circuit such as a microcomputer, a synchronization signal switching circuit that inputs a synchronization signal for a video signal to be displayed on the display device, and A display position detection circuit that counts synchronization signals to detect the display position of the display device, and control data such as characters, pattern codes, blinking information, etc. that are processed by the input control circuit and are to be displayed on the display device. a display data memory for storing; a display character memory for storing fonts of characters displayed as the display contents;
A video mixer that mixes a predetermined display signal with the video signal in order to display display contents at a predetermined position of the display device using a position detection signal from the display position detection circuit; When the display control register that holds input data and the display data memory are not accessed, the value of the address signal applied to the display data memory is set to the unused display data memory. 1. A screen display device comprising: a protection circuit for skipping data to a memory space of the screen.