JPH02220468A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPH02220468A
JPH02220468A JP3932089A JP3932089A JPH02220468A JP H02220468 A JPH02220468 A JP H02220468A JP 3932089 A JP3932089 A JP 3932089A JP 3932089 A JP3932089 A JP 3932089A JP H02220468 A JPH02220468 A JP H02220468A
Authority
JP
Japan
Prior art keywords
output terminals
dam
number
bar
identical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3932089A
Inventor
Kazuhiko Sera
Original Assignee
Oki Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Ind Co Ltd filed Critical Oki Electric Ind Co Ltd
Priority to JP3932089A priority Critical patent/JPH02220468A/en
Publication of JPH02220468A publication Critical patent/JPH02220468A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To reduce a cost and to enhance an operation efficiency by a method wherein dummy outer leads are formed in such a way that a shape from a dam bar to a part coming into contact with a part punched with a metal mold for dam-bar cutting use is identical and that the number of output terminals is identical to the maximum number of output terminals.
CONSTITUTION: In a lead frame for semiconductor device use in which a size of a resin-sealed package and a width and a pitch of output terminals 3 are identical and the number of output terminals is smaller than the maximum number, dummy outer leads 7 are formed in the same parts as those of the maximum number of output terminals. Accordingly, cut chips of a dum bar can be removed simultaneously when the outer leads are cut off or can be removed easily when a metal mold for dam-bar cutting use is cleaned by means of air. Thereby, it is not necessary to prepare metal molds for dam-bar cutting use corresponding to the number of the output terminals whenever they are required; it is possible to comply with this operation only by one kind of metal mold for dam-bar cutting use; a cost can be reduced and an operation efficiency can be enhanced.
COPYRIGHT: (C)1990,JPO&Japio
JP3932089A 1989-02-21 1989-02-21 Lead frame for semiconductor device Pending JPH02220468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3932089A JPH02220468A (en) 1989-02-21 1989-02-21 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3932089A JPH02220468A (en) 1989-02-21 1989-02-21 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPH02220468A true JPH02220468A (en) 1990-09-03

Family

ID=12549815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3932089A Pending JPH02220468A (en) 1989-02-21 1989-02-21 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPH02220468A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04162760A (en) * 1990-10-26 1992-06-08 Yamaha Corp Lead frame
EP0683518A3 (en) * 1994-05-16 1998-09-09 Hitachi, Ltd. Lead frame and semiconductor device
US6897090B2 (en) * 1994-12-29 2005-05-24 Tessera, Inc. Method of making a compliant integrated circuit package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04162760A (en) * 1990-10-26 1992-06-08 Yamaha Corp Lead frame
EP0683518A3 (en) * 1994-05-16 1998-09-09 Hitachi, Ltd. Lead frame and semiconductor device
US5837567A (en) * 1994-05-16 1998-11-17 Hitachi, Ltd. Lead frame and semiconductor device
US6897090B2 (en) * 1994-12-29 2005-05-24 Tessera, Inc. Method of making a compliant integrated circuit package

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