JPH02219279A - Manufacture of hyperabrupt junction diode - Google Patents

Abstract

PURPOSE:To manufacture a hyperabrupt junction diode having high reverse voltage resistance in one photographic step by forming a second conductivity type ion implanted layer covering a first conductivity type ion implanted layer by using a mask to be used when the first conductivity type ion implanted layer is formed. CONSTITUTION:A first conductivity type low concentration layer 2 is formed on a first conductivity type semiconductor substrate 1, and an ion implanting mask 3 is formed on the layer 2. Then, with the mask 3 an ion beam is irradiated at a first incident angle, the substrate 1 is relatively rotated, and ion implanted to form a first conductivity type ion implanted layer 4. With the mask 3 the beam is radiated at a second incident angle larger than the first angle, the substrate 1 is relatively rotated, and ion implanted to form a second connectivity type ion implanted layer 5 covering a first conductivity type ion implanted layer 4. Thus, a hyperabrupt junction diode having high reverse voltage resistance can be manufactured without increasing a photolithography step.

Description

[Detailed description of the invention] (b) Industrial application field The present invention relates to a method for manufacturing a super-stepped junction diode.

(b) Conventional technology Hyper-stepped junction diodes are essential as variable capacitance elements for frequency modulation and tuning in communication systems.

In recent years, the need for tuning varactors has increased, particularly in the ultra-high frequency range, and high-performance varactor diodes made of GaA are being actively developed.

A conventional method for manufacturing a super-step junction diode will be explained based on FIGS. 2(a) to 2(e).

First, a low concentration n-GaAs epitaxial layer (12) is grown on the Si-doped n←GaAS semiconductor substrate (11) (Fig. 2(a)), and a photoresist for selective ion implantation is deposited on the nucleus layer (12). 13) (Fig. 2(b))
. Then, using the photoresist (13) as a mask, S
i ions are implanted to form n″1 ion implantation layer (14)
(Fig. 2 (C)), and then implant Zn ions using the photoresist (13) as a mask.
An ion implantation layer (15) is formed (FIG. 2(d)). Finally, after removing the photoresist (13) and etching the substrate (11) from the back side, the ohmic electrode (16) is etched.
(17) is formed (Fig. 2(e)).

In this method, the carrier concentration profile of the n'V ion-implanted layer (14) becomes a Gaussian distribution with a peak at a predetermined depth inside the substrate (11), and the n-type carrier concentration near the surface of the substrate (11) becomes low. However, when trying to increase the capacitance change ratio, n'r
It is necessary to increase the n-type carrier concentration in the ion implantation layer (14). Increasing the n-type carrier concentration in the n+ ion-implanted layer (14) increases the n-type carrier concentration near the surface of the substrate (11), leading to deterioration of reverse breakdown voltage.

Next, based on FIGS. 3(a) to (f), other conventional methods...
A method for manufacturing a super-stepped junction diode will be explained.

First, a low concentration n-GaAs epitaxial layer (22) is grown on a Si-doped n''GaAs semiconductor substrate (21) (Fig. 3(a)), and a photoresist for selective ion implantation is deposited on the nucleus layer (22). 23) (Figure 3(b))
. Then, using the photoresist (23) as a mask, S
i ions are ion-implanted to form an ion-implanted layer (24)
3(c)) and photoresist (Fig. 3(c)).
23) is removed and a new photoresist (23°) having openings larger than those of the 7-photoresist (23) is formed (FIG. 3(d)). Next, using the photoresist (23') as a mask, Zn ions are implanted to form a pl'' ion implantation layer (25) (see FIG. 3(e)).
)).

Finally, after removing the photoresist (23') and etching the substrate from the back side, ohmic electrodes (27) (2
8) (Fig. 3(f)).

According to this method, the reverse breakdown voltage can be increased because the n+ ion implantation layer (24) is completely covered with the p← ion implantation layer (25), but two photolithography steps are required. Become.

(c) Problems to be solved by the invention As mentioned above, when manufacturing a super-step junction diode with a large capacitance change ratio using conventional technology, if one photolithography process is required, the reverse breakdown voltage is low. ,
Furthermore, in order to increase the reverse breakdown voltage, two photolithography steps were required.

(d) Means for Solving the Problems The present invention includes a step of forming a low concentration layer of a first conductivity type on a semiconductor substrate of a first conductivity type, and forming a mask for ion implantation on the low concentration layer. a step of forming an ion-implanted layer of a first conductivity type by using the mask to set the ion beam at a first incident angle and relatively rotating the substrate to form an ion-implanted layer of a first conductivity type; The ion beam is set at a second incident angle larger than the first incident angle, and the ion implantation is performed by rotating the substrate relatively.
A method for manufacturing a super-step junction diode, comprising the step of forming an ion implantation layer of a second conductivity type that can cover an ion implantation layer of a conductivity type.

(e) Operation Since the ion implantation layer of the second conductivity type that can cover the ion implantation layer of the first conductivity type is formed using the mask used when forming the ion implantation layer of the first conductivity type, the ion implantation layer of the second conductivity type is formed. A super-step junction diode with high reverse breakdown voltage can be fabricated using the photolithography process.

(F) Embodiment A method for manufacturing a super-step junction diode according to an embodiment of the present invention will be described with reference to FIGS. 1(a) to 1(d).

First, a low concentration n- epitaxial layer (2) is grown on a Si-doped n+'') GaAs semiconductor substrate (1).
A photoresist (3) for selective ion implantation is formed on the nucleus layer (2) (FIG. 1(b)). and,
Using the photoresist (3) as a mask, an n+ ion implantation layer (4) is selectively formed (FIG. 1(C)). The ion implantation conditions at this time were: implantation ion S1, implantation energy 160 KeV, and implantation amount 3×10"cm.sup.-".

Also, during ion implantation, the incident angle (first incident angle) of the ion beam (angle from the perpendicular direction to the substrate surface) is 7°.
The substrate (1) was tilted and rotated so that In addition, when forming the n1 ion implantation layer (4) by ion implantation, in order to avoid channeling, the ion beam is not incident perpendicularly to the substrate, but is incident at an angle of 7 to 10 degrees from the vertical direction of the substrate. is common. Subsequently, a p++ ion implantation layer (5) is selectively formed using the photoresist (3) as a mask (FIG. 1(d)). The conditions for ion implantation at this time are that the implanted ions Z
n, implantation energy 50KeV, implantation amount 1×1015cm
-2. Also, the incident angle of the ion beam during ion implantation (
The substrate (1) was tilted and rotated so that the second incident angle) was 60°.

Since the incident angle of the ion beam when forming the p++ ion implantation layer (5) was made larger than that when forming the n+ ion implantation layer (4), the width of the p0 ion implantation layer (5) was changed to the width of the n+ ion implantation layer (4). 4), and the n+ ion implantation layer (4) can be made wider than that of the p44 ion implantation layer (5).
) can be completely covered. Therefore, the reverse breakdown voltage can be increased. However, since the photoresist (3) is used in two ion implantation steps, only one photolithography step is required.

Finally, remove the board (1) so that the board thickness is approximately 100 μm from the back side.
Ohmic electrodes made of AuGe/Ni/Au are etched on the back side of the substrate (1) until the thickness of
7) and heat-treated at 450°C for 90 seconds, and then an ohmic electrode (6) made of Ti/Pt/Au is formed on the surface side of the substrate (1) (Fig. 1(e)).
.

In this example, the ion implantation was performed by fixing the ion beam and rotating the substrate with the substrate tilted, but ion implantation may also be performed by rotating the substrate with the ion beam tilted, or by fixing the substrate. Ion implantation may also be performed by rotating the ion beam in a tilted state.

Further, Si can also be used as the substrate. In this case, if an opening is formed in the 5102 film obtained by thermally oxidizing the n←Si substrate on which the n-3i pittaxial layer is formed, and the Si film is used as a mask for two ion implantation steps. good.

(G) Effects of the Invention As is clear from the above description, the present invention can produce a super-step junction diode with a high reverse breakdown voltage without increasing the number of photolithography steps.

[Brief explanation of the drawing]

FIGS. 1(a) to (e) are diagrams for explaining a method of manufacturing a super-step junction diode according to an embodiment of the present invention, FIGS. 2(a) to (e), and FIG. 3(a). 7(f) are diagrams for explaining a conventional method for manufacturing a super-step junction diode. (1)...n'' GaAs semiconductor substrate, (2)...n
-Epitaxial layer, (3)...7 Otoresist, (
4)...n''1 ion implantation layer, (5)...p+4 ion implantation layer.

Claims (1)

[Claims] 1. A step of forming a first conductivity type low concentration layer on a first conductivity type semiconductor substrate, a step of forming an ion implantation mask on the low concentration layer, and an ion beam injection step using the mask. forming an ion-implanted layer of a first conductivity type by performing ion implantation at a first incident angle and by relatively rotating the substrate;
ion implantation at a second incident angle that is larger than the incident angle, and by relatively rotating the substrate to form an ion implantation layer of a second conductivity type capable of covering the ion implantation layer of the first conductivity type. A method of manufacturing a super-step junction diode, comprising the steps of: