JPH02218239A - Speech path testing device - Google Patents

Abstract

PURPOSE:To execute a test with satisfactory efficiency in a short time by successively changing the value of an outgoing line address and the value of an incoming line address for a test packet, transmitting the packet to the incoming line of a speech path switch to be tested, investigating the test packet to be sent from an n-th outgoing line of the channel switch to be tested in a fixed time and deciding propriety. CONSTITUTION:A speech path testing device is composed of a test packet insertion circuit, (n-1) outgoing line address increment circuit, test end detection circuit, outgoing line address reset circuit, incoming line address increment circuit, (n) first address exchange circuits, speed path switch SW1, for which normality is confirmed with constitution the same as a speech path switch SW2 to be tested, and (n) second address exchange circuits. The first test packet, for which both the value of the outgoing line address and the value of the incoming line address are set to '0', is transmitted to the first incoming line of the channel switch SW2 to be tested, which is equipped When the (n) incoming lines and the (n) outgoing lines. After this test packet is transmitted, within the fixed time, when the second packet, for which the value of the outgoing line address and the value of the incoming line address are set to the value of (n-1) is received from the n-th outgoing line of the speed path switch SW2 to be tested, it is decided that the test is normally finished.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a communication path tester, and more particularly to a communication path tester for testing a self-routing type communication path switch used in an exchange.

[Prior Art] Conventional call path testers include a call path tester that tests crosspoints, which are the call paths of a space division switch, and a call path tester that tests time switches, which are the call paths of a time division multiplex switch. It has been known.

These call path testers use a processor or the like to control the setting of a predetermined call path from the outside to the call path switch under test, and then supply a signal from a predetermined incoming line terminal and transfer the signal to a predetermined outgoing line terminal. By detecting this, continuity between the incoming and outgoing lines was confirmed, and the correctness or failure of the communication path switch under test was determined.

In addition to the above-mentioned crosspoints and time switches, the communication paths of modern exchanges include self-routing type communication path switches (for information on self-routing type communication path switches, please refer to the January 11, 1988 issue of Kuchigaru Electronics Magazine, 132~
(See page 137) was also used, and the trial grade of this communication path switch was the same as described above.

[Problem to be solved by the invention]

To test all communication buses between the outgoing line terminals of the communication path switch under test using the conventional communication path tester described above,
It is necessary to control the setting of communication paths that are equal to the square of the number of terminals. Therefore, if the communication bus is configured externally one by one to check continuity between incoming and outgoing lines, there is a problem in that the more the number of terminals is, the longer the testing time is, and the more troublesome and time-consuming it becomes.

[Means to solve the problem]

In order to solve such problems, the communication path tester of the present invention sets the value of the outgoing line address and the value of the incoming line address to the first incoming line of the communication path switch under test, which has n incoming lines and n outgoing lines. transmit a first test packet with both set to O;
A second test is performed in which the value of the outgoing line address and the value of the incoming line address from the nth outgoing line of the communication path switch under test are both input to the value n-1 within a certain period of time after transmitting this test packet. A communication path tester that determines that the test has completed successfully when a packet is received, the test packet insertion circuit transmitting a first test packet to a first input line of the communication path switch under test, and a communication path switch under test. n-1 outgoing line address increments that are connected to the first to n-1th outgoing lines, respectively, receive test packets from these outgoing lines, increase the value of the outgoing line address by one, and send it. It is connected to the nth output line of the circuit and the communication path switch under test, and outputs a test normal completion signal when the test packet received from this output line within the above fixed time is the second test packet. and a test end detection circuit that transmits the test packet as it is when it is not the second test packet, and outputs a test abnormal end signal when the second test packet cannot be received even after a certain period of time has elapsed; An outgoing address reset circuit that is connected to the test end detection circuit and sets the outgoing address of the received test packet to 0 and transmits it; and an outgoing address reset circuit that is connected to this outgoing address reset circuit and sets the incoming address of the received test packet to 1. An incoming address increment circuit that increments the received test packet by one and then transmits the outgoing address is connected to the n-1 outgoing address increment circuit and the outgoing address increment circuit, respectively. n first address switching circuits that exchange and transmit the test packets, and n incoming lines are respectively connected to the n first address switching circuits, and the connection route is determined based on the outgoing address of the received test packet. Select a communication path switch that has the same configuration as the communication path switch under test and is confirmed to be normal and sends this test bag to one of the n output lines, and the n outputs of this communication path switch. each connected to a line,
The test packet is composed of n second address switching circuits that exchange the value of the outgoing address and the value of the incoming line address of the received test packet and transmit the same to each of the n communication path switches under test.

[For production]

The channel tester first transmits a first test packet to the first incoming line of the channel switch under test.

After that, the outgoing address value and the incoming address value of this test packet are sequentially changed and sent to the incoming line of the communication path switch under test. The test packet sent from the n-th outgoing line of the path switch is received, and when this is the second test packet, a test normal end signal is output.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

Fig. 1 is a block diagram showing an embodiment of the communication path tester of the present invention, Fig. 2 is the format of the test packet used for this communication path test, and Fig. 3 is a block diagram showing an example of the communication path tester of the present invention. test packet A and test packet B, respectively.
FIG. 3 is a routing explanatory diagram illustrating the connection route selection operation of the communication path switch when input to the communication path switch as follows.

First, explanation will be given from FIG. The format of the test packet in the same figure is that the outgoing address is 50 at the beginning, then the incoming address is 6.
It consists of header information indicated by 0 and other information 70. The test packets are then transmitted in the direction of the arrow, that is, in order from the outgoing line address.

Next, FIG. 3 will be explained. The communication path switch SW2 tested in the figure is a self-routing type communication path switch called a Banyan switch described in the above-mentioned document. This switch SW2 is used to select an outgoing line and set a call bus based on the outgoing line address 50, and is also an incoming line terminal.

Switch 5W21 to switch L, input terminal "2+L"
3 Switch SW for switching, , 2, outgoing terminal To
.

TI switching switch 5Wzs, output terminal 'r2.
It consists of a switch 5W24 that switches T3.

Then, the data of the test packt shown in FIG. 2, that is, the value of the outgoing line address 50, is set to 1. The case where the value of the incoming line address 60 is set to 0 corresponds to the test packet A in Fig. 3. At this time, the test packet A input to the incoming line terminal of the channel switch SW2 is the outgoing line address. Since the value of address 50 is set to 1, switch 5W21
, 5W23, and is output from the outgoing line section T+. Next, set the value of the outgoing line address 50 to 2. The case where the value of the incoming line address 60 is set to 2 corresponds to test packet B. At this time, the test packet B input to the incoming line terminal L2 of the communication path switch SW2 has the value of the outgoing line address set to 2. , and is output from the output terminal T2 via the switches 5W22° and 5w24.

In this way, the communication path switch SW2 selects the output line terminal To according to the contents of the output line address 50 of the input test packet.
=T3 is selected, and a call path can be set by this.

Next, FIG. 1 will be explained. In this figure, parts corresponding to those in FIG. 3 are designated by the same reference numerals, and their explanation will be omitted. In Figure 1, 1 is a tester, 2 is a test input terminal T
A test packet insertion circuit 3 inputs a test packet from IN and instructs to start a test, and 3 inputs a test start signal TRG from the test packet insertion circuit 2, outputs a test end signal, and outputs it to terminal T. A test end detection circuit outputs a test end signal from the UT, 4 is an outgoing address reset circuit that resets the value of the outgoing address 50 of the test packet, and 5 is an incoming line that increases the value of the incoming address 60 of the test packet by one. Address increment circuits 6-8 each increment the value of the outgoing address one by one; 9-16 each exchange the value of the outgoing address 50 with the value of the incoming address 6° This is a 7" dress switching circuit. And a communication path switch SW is built into the tester 1.

has been confirmed to have positive conductivity, and its internal configuration is the same as the tested phone name SW2, and has switches 5W11, 5W12 + 5Wls, and 5WI4 inside, and incoming terminals P o - P 3 + outgoing terminals. It is composed of Qo-Q,s.

The operation of the fc channel tester constructed as described above will be explained. Value of outgoing address 50 and incoming line address 6
When the first test packet whose values are both set to 0 is input to the test input terminal TIN, the test packet insertion circuit 2 transfers this first test packet to the communication path switch 5W20.
Send to input terminal Lo. The communication path switch SW2 is set to L.
Since the value of the output line address of the test packet input from the o terminal is incremented by 0, this packet is routed to the output line terminal To, and the value of the output line address 50 is set by the output line address increment circuit 6 connected to this. The address is incremented to 1, and the address exchange circuit 9 exchanges the addresses so that the value of the outgoing address 50 is 0° and the value of the incoming line address 60 is 1.
After that, this packet is sent to the incoming terminal PO of the communication path switch SW1. Since the value of the outgoing line address 50 of this packet is 0, the communication path switch SWl selects the outgoing line terminal Q.

Address switching circuit 1 that is routed to and connected to this
3, the addresses are exchanged and the value of the outgoing address 50 is set to 1.
After setting the value of the incoming line address 60 to 0, the test packet is again sent to the incoming line terminal Lo of the call path switch SW2 via the test packet insertion circuit 2. Communication path switch SW
2 is routed to the output line terminal TI because the value of the output line address 50 is 1.

In this way, the communication path switch SW is connected to the output line terminal T3.
When the routine has been performed up to this point, the test completion detection circuit 3 connected thereto determines whether the test has ended or not. In other words, the outgoing address 50 of this test packet
It is determined whether the value is equal to the value of the incoming line address 60, and whether the value is 3 in the case of the communication path switch SW2. At this time, the value of the outgoing line address is 3. Since the value of the incoming line address is O, it is determined that the test has not ended, and the outgoing line address reset circuit 4 sets the value of the outgoing line address 50 to O and 1-1.Then, the incoming line address increment circuit 5 sets the value of the incoming line address 60. After incrementing i to set it to 1, the address switching circuit 12 connected to this converts the address, setting the value of the outgoing address 50 to 1 and the value of the incoming line address 60 to 0,
This packet is sent to input terminal P3 of communication path switch SW+.
Send to. Since the value of the outgoing line address is 1, the communication path switch SW routes this packet to the outgoing line terminal Ql, performs address exchange in the address switching circuit 14 connected to this, and changes the value of the outgoing line address. 0. After setting the value of the incoming line address to 1, it is sent to the incoming line terminal Ll of the communication path switch SW2.

In this way, this test packet is finally sent to the incoming line terminal L3 of the communication path switch SW2, and this test packet is sent to the outgoing line terminal T.
3, this test packet is sent to the test end detection circuit 3, and as a result, the test end detection circuit 3 detects that the value of the outgoing line address 50 and the value of the incoming line address 60 of this test packet are both 3. Since they are equal, it is assumed that the test of all communication paths of the communication path switch SW2 has been successfully completed, and the test termination terminal T is connected. A test normal completion signal is output from the LIT.

Note that the test end detection circuit 3 starts a timer for a certain period of time when receiving the test start signal TRG. This fixed time corresponds to the time when the test of the communication path switch SW2 is normally completed, and the value of the outgoing line address 50 and the incoming line address 6 of the test packet sent from the outgoing line terminal T3 within this fixed time are
When both values of 0 and 0 become equal to 3, the test ends output terminal T. Even after the test normal completion signal is output to the UT and the above specified period of time has elapsed, the value of the outgoing address 50 and the incoming line address 6 remain unchanged.
When both values of 0 are equal and do not exceed 3, a test abnormal end signal is output.

Further, in the case of the communication path tester of this embodiment, the communication path switch SW2 to be tested has a number of input lines of 4. Although a communication path switch with four outgoing lines is used, it is clear that the present invention can also be applied to a communication path switch with n incoming lines and n outgoing lines.

〔Effect of the invention〕

As is clear from the above explanation, the communication path tester according to the present invention is capable of setting the value of the outgoing line address to the first incoming line of the first communication path switch where the number of incoming lines and outgoing lines is n. A test packet whose address values are both set to 0 is transmitted, and within a certain period of time after transmitting this test packet, a test packet arriving from the n-th outgoing line of the first channel switch is received. The configuration is such that the test is judged to have completed normally when the value of the outgoing line address and the value of the incoming line address of the received test packet both become the value n-1, so the processor etc. This eliminates the troublesome effort of setting paths and checking continuity between incoming and outgoing lines, and has the effect of allowing efficient testing of communication path switches in a short period of time.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the communication path tester of the present invention, FIG. 2 is a format of a test packet used in this communication path test, and FIG. 3 is an explanatory diagram of routing of a communication path switch. . 1...Test device, 2...Test packet insertion circuit,
3... Test end detection circuit, 4... Outgoing line address reset circuit, 5... Incoming line address increment circuit, 6-8... Outgoing line address increment circuit, 9-16... Meeting Fist address switching circuit, SWI, S
W2...φ communication path switch. Patent applicant: NEC Corporation

Claims (1)

[Scope of Claims] A first communication path in which the number of incoming lines and the number of outgoing lines are both n, and the connection route between the incoming line and the outgoing line is uniquely determined according to the outgoing line address of an input packet. A switch is the target to be tested, and the output line address is changed from the output line to the input line within a certain period of time after the first test packet in which the value of the output line address and the value of the input line address are both set to 0 is sent to the input line. The communication path tester determines whether the first communication path switch is normal when receiving a second test packet in which both the value of the address and the value of the incoming line address are n-1, the communication path tester a test packet insertion circuit that transmits the first test packet to a first input line of the communication path switch; and a test packet insertion circuit that is connected to the first to n-1th output lines of the first communication path switch, and n-, which receives a test packet from the line, increments the value of the outgoing line address by one, and transmits it;
one outgoing line address increment circuit; connected to the nth outgoing line of the first communication path switch, and the test packet received from this outgoing line within the certain period of time is the second test packet; A test end detection circuit that outputs a test normal end signal, transmits the test packet as it is when it is not the second test packet, and outputs a test abnormal end signal when the second test packet cannot be received after a certain period of time has elapsed. an outgoing address reset circuit connected to this test end detection circuit and configured to set the outgoing address of the received test packet to 0 and transmit it; an incoming line address increment circuit that increments the incoming line address by one and transmits the incoming line address; and an incoming line address increment circuit that is connected to the n-1 outgoing address increment circuits and the incoming line address increment circuit, respectively, and increases the outgoing address of the received test packet. n first address switching circuits that exchange the value of the received test packet with the value of the incoming line address and transmit the data, and each of the n incoming lines is connected to the n first address switching circuits, and A second communication path that is confirmed to be normal and has the same configuration as the first communication path switch that selects a connection route based on the value of the outgoing line address and sends this test packet to one of the n outgoing lines. is connected to each of the n outgoing lines of the first communication path switch and the second communication path switch, and exchanges the values of the outgoing line address and the incoming line address of the received test packet, and A communication path tester comprising n second address switching circuits that respectively send data to n incoming lines.