JPH02215128A - Formation of insulating film on semiconductor crystal substrate - Google Patents

Formation of insulating film on semiconductor crystal substrate

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Publication number
JPH02215128A
JPH02215128A JP3505089A JP3505089A JPH02215128A JP H02215128 A JPH02215128 A JP H02215128A JP 3505089 A JP3505089 A JP 3505089A JP 3505089 A JP3505089 A JP 3505089A JP H02215128 A JPH02215128 A JP H02215128A
Authority
JP
Japan
Prior art keywords
insulating film
film
semiconductor crystal
crystal substrate
inp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3505089A
Other languages
Japanese (ja)
Inventor
Hiroshi Ishimura
石村 浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP3505089A priority Critical patent/JPH02215128A/en
Publication of JPH02215128A publication Critical patent/JPH02215128A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To form an insulating film having excellent breakdown strength at the temperature not exceeding 150 deg.C with less variation with time in the film quality by a method wherein N radical produced in a different chamber is led in a reaction chamber together with PH3 so as to form a PxNy film. CONSTITUTION:An InP substrate 3 is mounted on a susceptor 4; a reaction chamber 2 is exhausted down to 10<-3>Torr; and the substrate 3 is heated at 100 deg.C. Specified amount of N2 and PH3 are led in from gas leading-in pipes 5, 7. Next, a producer 1 is actuated; N radical is led in fro another pipe 6 for reaction to PH3 so as to form a PN film 9 on the substrate 3. This film 9 in the thickness of 50nm, resistivity of 10<14>OMEGA.cm and having breakdown strength of 6X10<6>V/cm can be used as a gate insulating film of a FET. Furthermore, this insulating film 9 is hardly subjected to any variation with time in the film quantity due to moisture absorption.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、半導体結晶基体上への絶縁膜の形成方法に関
し、特に燐(P)を少なくともその構成元素として含む
化合物半導体、特にInPを用いた高周波、高出力絶縁
ゲート型電界効果トランジスタのゲート絶縁膜に用いて
好適な絶縁膜の形成方法に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for forming an insulating film on a semiconductor crystal substrate, and in particular to a method for forming an insulating film on a semiconductor crystal substrate. In particular, the present invention relates to a method of forming an insulating film suitable for use as a gate insulating film of a high frequency, high output insulated gate field effect transistor using InP.

(従来の技術) InPは、現在マイクロ波半導体素子用材料の主流を占
めているGaAsに比べても、電子飽和速度が大きく、
また熱伝導率が大きいといった特性を有しているため、
GaAsを上回る高周波動作が期待される半導体素子用
材料として注目を集めている。
(Prior art) InP has a higher electron saturation speed than GaAs, which is currently the mainstream material for microwave semiconductor devices.
It also has the property of high thermal conductivity, so
It is attracting attention as a material for semiconductor devices, which is expected to have higher frequency operation than GaAs.

InPでは、GaAsのように逆方向リーク電流の小さ
い良好なショットキ接合を形成することが難しいため、
  InPを用いた素子の構造としては、金属/絶縁体
/半導体(以下MISと略称する)構造をゲートとする
絶縁ゲート型電界効果トランジスタ(以下にl5FET
と略称する)が主に開発されてきた。
With InP, it is difficult to form a good Schottky junction with low reverse leakage current as with GaAs.
The structure of an element using InP is an insulated gate field effect transistor (hereinafter referred to as 15FET) whose gate is a metal/insulator/semiconductor (hereinafter referred to as MIS) structure.
) has been mainly developed.

InP Nl5FETを実用化するに当たっての最も大
きな問題点の一つは、ドレイン電流が時間と共に変動す
る所謂電流ドリフトが生ずることである。電流ドリフト
の原因については現在のところ不明な点も多いが、絶縁
膜/InP(以下IS界面と略称する)に存在する界面
準位への電子の充放電により、動作チャネル中の電子濃
度が時間と共に変動することが主な原因の一つと考えら
れている。従ってIS界面の界面準位密度を極力低減さ
せることが、電流ドリフトを低減させるための必要条件
となる。
One of the biggest problems in putting InP Nl5FET into practical use is the occurrence of so-called current drift, in which the drain current fluctuates over time. Although there are currently many unknowns about the causes of current drift, the electron concentration in the operating channel changes over time due to charging and discharging of electrons to the interface level existing in the insulating film/InP (hereinafter abbreviated as IS interface). It is thought that one of the main causes is the fluctuation with the Therefore, reducing the interface state density at the IS interface as much as possible is a necessary condition for reducing current drift.

このために、従来種々の絶縁膜形成方法、例えば熱酸化
法、陽極酸化法、化学的気相堆積(CVD)法等により
、種々の絶縁膜、例えば、In、Oa膜、陽極酸化膜、
二酸化珪素(SiO□)膜、窒化珪素膜(Si)N4)
等を形成することが試みられてきた。
For this purpose, various insulating films such as In, Oa films, anodic oxide films,
Silicon dioxide (SiO□) film, silicon nitride film (Si)N4)
Attempts have been made to form .

しかしながら、InPの様な■−■族化合物半導体にお
いては、一般に■族元素の蒸気圧が高いため、400℃
以上の温度で絶縁膜を堆積しようとすると、■族元素で
ある燐(P)の解離が進みInP表面(IS界面)に欠
陥が発生し、このことが高密度の界面準位の生成につな
がる。従って、良好なIS界面を形成するためには、出
来るだけ低温下において絶縁膜を形成することが必要と
考えられ、低温で堆積が可能な、低温CVD法、光Cv
D法、プラズマCVD法等の方法を用いて、堆積温度2
50〜300℃で絶縁膜を形成することが試みられてい
る。事実これらの方法により形成した、Sin、、 5
iaN4膜等で比較的良好な界面特性が報告されている
。さらに最近は、より積極的に燐を堆積雰囲気中に導入
し、燐ドープ5in2膜(以下PSG膜と略称する)や
、さらには膜の構成元素として燐を含む窒化燐膜等の絶
縁膜を堆積させることが、InP基板表面からの燐の解
離を防止するうえで有効であることが見いだされ、界面
準位密度が1×10″L c m−2・ev−1以下と
いう良好な界面特性も報告されている。
However, in group ■-■ compound semiconductors such as InP, the vapor pressure of group ■ elements is generally high, so
If an insulating film is deposited at a temperature above this temperature, phosphorus (P), a group III element, will dissociate and defects will occur on the InP surface (IS interface), which will lead to the creation of a high density of interface states. . Therefore, in order to form a good IS interface, it is considered necessary to form an insulating film at as low a temperature as possible.
Deposition temperature 2 using methods such as D method and plasma CVD method
Attempts have been made to form an insulating film at a temperature of 50 to 300°C. In fact, Sin, formed by these methods, 5
Relatively good interfacial properties have been reported for iaN4 films and the like. Furthermore, recently, phosphorus has been more actively introduced into the deposition atmosphere, and insulating films such as phosphorus-doped 5in2 films (hereinafter referred to as PSG films) and phosphorous nitride films containing phosphorus as a constituent element of the film have been deposited. It was found that this is effective in preventing the dissociation of phosphorus from the InP substrate surface, and it also has good interface properties with an interface state density of 1×10″L cm−2·ev−1 or less. It has been reported.

しかしながら、これら低温堆積法によって形成された絶
縁膜には、膜の電気抵抗や絶縁耐圧といった電気的特性
に問題があるうえ、低温化を図るために用いられるプラ
ズマや光のエネルギによってInP基板表面が損傷を受
け、これが新たな界面準位を発生させてしまうといった
問題があった。
However, insulating films formed by these low-temperature deposition methods have problems with electrical properties such as electrical resistance and dielectric strength of the film, and the InP substrate surface is damaged by the plasma and light energy used to lower the temperature. There was a problem in that the damage caused caused new interface states to be generated.

加えて、低温堆積膜、特に、上述の燐を含ませた改良さ
れた絶縁膜には、吸湿性により膜の特性が経時変化する
という信頼性上の問題もあった。
In addition, low temperature deposited films, particularly the improved phosphorous-containing insulating films described above, have had reliability problems in that the properties of the film change over time due to hygroscopicity.

このように、InP MIS界面特性の向上を1指して
行なわれる堆積温度の低温化と、堆積された絶縁膜その
ものの特性、特に吸湿性等の、信頼性に関する特性との
間には背反的な要素が強かった。
In this way, there is a trade-off between lowering the deposition temperature, which is aimed at improving the InP MIS interface properties, and the properties of the deposited insulating film itself, especially the reliability-related properties such as hygroscopicity. The elements were strong.

そのため、界面特性としては優れた、窒化燐膜やPSG
膜等の燐を含んだ絶縁膜では、その実質的な膜形成温度
の下限、すなわち、吸湿性に問題がないと考えられる膜
を形成することが出来る最低温度は、150〜200℃
程度であった。
Therefore, phosphorus nitride film and PSG film have excellent interface properties.
For insulating films containing phosphorus, such as films, the lower limit of the practical film formation temperature, that is, the lowest temperature at which a film can be formed without any problems in hygroscopicity is 150 to 200°C.
It was about.

本発明者の実験によると1例えば上記PSG膜をゲート
絶縁膜とするInP MISFETにおいても30分間
でドレイン電流が約10%程度変動した。燐をドープし
ないSiO□膜を用いたInP MISFETにおいて
は、約50〜100%の電流変動が観測されたことと比
較すると、大幅にドリフト量は低減するものの、未だ改
善の効果は不充分であると言わざるを得なかった。この
ため実用に供し得るInP MISFETを製造するこ
とができないのが実情であった。
According to experiments conducted by the present inventors, for example, even in an InP MISFET using the PSG film as a gate insulating film, the drain current fluctuated by about 10% in 30 minutes. In an InP MISFET using a SiO□ film that is not doped with phosphorus, a current fluctuation of approximately 50 to 100% was observed.Although the amount of drift is significantly reduced, the improvement effect is still insufficient. I had to say. For this reason, the actual situation is that it is not possible to manufacture InP MISFETs that can be put to practical use.

(発明が解決しようとする課題) 以上述べたように、従来の堆積方法によって。(Problem to be solved by the invention) As mentioned above, by conventional deposition methods.

界面準位密度の小さな、良好な特性を有するIS界面を
形成すべく、絶縁膜堆積温度の低温化を図ると、吸湿性
による信頼性の低下等の問題に直面した。このため、電
流ドリフトが生じない良好な特性のMISFETを実現
し、信頼性にも優れた絶縁膜を形成し得る堆積方法が見
いだせていなかった。
When attempting to lower the insulating film deposition temperature in order to form an IS interface with low interface state density and good characteristics, problems such as a decrease in reliability due to hygroscopicity were encountered. For this reason, a deposition method capable of realizing a MISFET with good characteristics without causing current drift and forming an insulating film with excellent reliability has not been found.

本発明は、上記問題点を解決すべくなされたもので、燐
をその構成元素とする化合物半導体結晶、とりわけIn
Pを用いたにl5FETのゲート絶縁膜に用いて好適な
絶縁膜の形成方法を提供することを目的とする。
The present invention has been made to solve the above-mentioned problems.
It is an object of the present invention to provide a method for forming an insulating film suitable for use in a gate insulating film of a 15FET using P.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 上記目的を達成するために本発明では、絶縁膜を形成す
る反応室とは異なる室で、窒素ガスを励起し、生成され
た窒素ラジカルをホスフィン(PH3)と共に前記反応
室に導入し、該反応室に設置された少なくとも燐(P)
を構成元素として含む半導体結晶基体に窒化燐(PN)
絶縁膜を形成する工程において、前記半導体結晶基体温
度を150℃以下に保持して堆積を行なうことをその特
徴としており、半導体結晶基体はInPであることを実
施態様としている。
(Means for Solving the Problems) In order to achieve the above object, the present invention excites nitrogen gas in a chamber different from the reaction chamber in which the insulating film is formed, and generates nitrogen radicals together with phosphine (PH3). At least phosphorus (P) introduced into the reaction chamber and installed in the reaction chamber.
Phosphorous nitride (PN) in a semiconductor crystal substrate containing as a constituent element
In the process of forming an insulating film, the temperature of the semiconductor crystal substrate is maintained at 150° C. or less during deposition, and the semiconductor crystal substrate is made of InP.

(作 用) 本発明は、本発明者が種々検討、実験を重ねた結果、窒
素ラジカルを絶縁膜を堆積する反応室とは異なる室で生
成することにより、半導体結晶基体表面が直接ラジカル
に晒されて損傷を受けることを防止しつつ、ここで生成
された窒素ラジカルを反応容器中にPH,ガスと共に導
入して窒化燐膜(PH膜)を形成することにより、堆積
中の基体温度が従来の下限であった150℃以下でも良
好な絶縁耐圧を有し、しかも吸湿性による膜質経時変化
のない窒化燐膜を形成できることを見いだしてなされた
ものである。本発明の堆積方法を用いて窒化燐絶縁膜を
形成することにより、界面準位密度が著しく低減された
良好なIS界面を形成できる。
(Function) As a result of various studies and experiments conducted by the present inventor, the present invention has been developed by generating nitrogen radicals in a chamber different from the reaction chamber in which the insulating film is deposited, so that the surface of the semiconductor crystal substrate is directly exposed to the radicals. By introducing the nitrogen radicals generated here together with PH and gas into the reaction vessel to form a phosphorous nitride film (PH film), the substrate temperature during deposition can be lowered to a level lower than that of the conventional one. This was made based on the discovery that it was possible to form a phosphorous nitride film that had good dielectric strength even at temperatures below 150° C., which was the lower limit of 150° C., and that did not change its quality over time due to hygroscopicity. By forming a phosphorus nitride insulating film using the deposition method of the present invention, a good IS interface with significantly reduced interface state density can be formed.

尚、上記窒化燐(PN)と称するものは、一般的に化学
式PxNy (X及びyは整数)で表される化学量論的
組成比からずれた化合物をも含めた総称である。
Note that the above-mentioned phosphorus nitride (PN) is a general term that includes compounds generally deviating from the stoichiometric composition represented by the chemical formula PxNy (X and y are integers).

(実施例) 以下1本発明の一実施例につき図面を参照して説明する
(Embodiment) An embodiment of the present invention will be described below with reference to the drawings.

第1図は一実施例の絶縁膜形成装置用を示し。FIG. 1 shows an example of an insulating film forming apparatus.

その要部はマイクロ波励起のラジカル生成器1゜反応室
2*InP基板3.およびInP基板3を保持するサセ
プタ4からなっている。
The main parts are: microwave excitation radical generator 1° reaction chamber 2*InP substrate 3. and a susceptor 4 that holds the InP substrate 3.

前記ラジカル生成器1におけるラジカル発生部は反応室
2と空間的に分離されている。また、サセプタ4にはヒ
ータが埋込内装されており、保持するInP基板3を所
望の温度に加熱できるようになっている。さらに、反応
室2の下方にはガス排出口8が設けられ、その先は排気
ポンプ(図示せず)に連なり反応室2内を1O−3To
rr程度の減圧状態にすることが可能な構成になってい
る。
A radical generating section in the radical generator 1 is spatially separated from the reaction chamber 2. Further, a heater is embedded in the susceptor 4, so that the InP substrate 3 held therein can be heated to a desired temperature. Further, a gas exhaust port 8 is provided below the reaction chamber 2, and the end thereof is connected to an exhaust pump (not shown), and the inside of the reaction chamber 2 is 1O-3To.
The structure is such that it is possible to create a reduced pressure state of about rr.

このような構成の装置を用いてInP基板上にPH膜を
形成する工程については以下に説明する。先ず、InP
基板3をサセプタ4上に載置し、排出口8より反応室2
中を約lO″″” Torrにまで排気する。
The process of forming a PH film on an InP substrate using an apparatus having such a configuration will be described below. First, InP
The substrate 3 is placed on the susceptor 4, and the reaction chamber 2 is discharged from the discharge port 8.
Evacuate the inside to about 10'''' Torr.

次にサセプタ4に埋込まれたヒータに通電し、InP基
板3を所定の温度、例えば100℃に加熱する。
Next, the heater embedded in the susceptor 4 is energized to heat the InP substrate 3 to a predetermined temperature, for example, 100°C.

基板温度が定常値に達した時点で、導入管5,7より所
定量の窒素及びPH,を反応室2中にそれぞれ流入させ
る0次にラジカル生成器1を作動させ窒素ラジカルを発
生させる。この窒素ラジカルは管6を通して反応室2に
導入され、  PR,から供給される燐(P)と反応し
て、PNNO3InP基板3上に堆積される。
When the substrate temperature reaches a steady value, a predetermined amount of nitrogen and PH are introduced into the reaction chamber 2 through the introduction pipes 5 and 7, and the radical generator 1 is activated to generate nitrogen radicals. These nitrogen radicals are introduced into the reaction chamber 2 through the tube 6, react with phosphorus (P) supplied from PR, and are deposited on the PNNO3InP substrate 3.

このようにして形成したPH膜の比抵抗及び絶縁破壊電
界強度は、膜厚が50n鳳の場合で各々1×1014Ω
・c+a、 6X10″V/ci+であった。これはM
ISFET用のゲート絶縁膜として充分に実用に供しう
るちのである。また、このPH膜では吸湿性による膜質
の経時変化は観測されなかった。
The resistivity and dielectric breakdown field strength of the PH film formed in this way are each 1×1014Ω when the film thickness is 50n.
・c+a, 6X10″V/ci+.This is M
It can be put to practical use as a gate insulating film for ISFET. Furthermore, no change in membrane quality over time due to hygroscopicity was observed in this PH membrane.

尚、上記実施例においては堆積温度が100℃の場合に
ついて説明したが、実施例において説明した方法を用い
れば、堆積温度が室温であっても吸湿特性の良好な膜質
のPH膜が堆積可能であり、このようなにl5FE!τ
のゲート絶縁膜を堆積する場合には、上記実施例の10
0℃にこだわる必要はなく、従って本発明は何ら堆積時
の温度、流量等の堆積条件に拘束されるものでもない。
In the above example, the case where the deposition temperature was 100°C was explained, but if the method described in the example is used, a PH film with good moisture absorption properties can be deposited even if the deposition temperature is room temperature. Yes, there is such a l5FE! τ
When depositing a gate insulating film of
There is no need to be particular about 0° C., and therefore, the present invention is not restricted to deposition conditions such as temperature and flow rate during deposition.

本発明による方法で形成された膜をゲート絶縁膜とする
InP MISFHTを作成し、ドレイン電流ドリフト
を測定したところ、第2図に実線で示すごとく、ドリフ
ト量は3%以内と極めて小さなものであった。尚、第2
図は、ソース、ドレイン間に5vを印加し、ゲートバイ
アス電圧を、時刻(t)=OでOvから一4vまでステ
ップ状に変化させた場合のドレイン電流の時間変化を、
ドレイン電流の初期値で正規化して示したものである。
When we fabricated an InP MISFHT using the film formed by the method of the present invention as a gate insulating film and measured the drain current drift, we found that the amount of drift was extremely small, within 3%, as shown by the solid line in Figure 2. Ta. Furthermore, the second
The figure shows the time change in drain current when 5V is applied between the source and drain and the gate bias voltage is changed stepwise from Ov to -4V at time (t) = O.
It is shown normalized by the initial value of the drain current.

尚、第2図には本発明の効果を明確にするために、同一
構造で、堆積温度250℃のPSG膜をゲート絶縁膜と
するInP MISFETを作成し、同一バイアス条件
でドリフトを測定した結果を破線で併せて示しである。
In order to clarify the effects of the present invention, Figure 2 shows the results of creating an InP MISFET with the same structure and using a PSG film deposited at 250°C as the gate insulating film, and measuring the drift under the same bias conditions. are also shown by broken lines.

 PSG膜では30分で9%のドリフトが生じており、
本発明に係る方法で堆積したゲート絶縁膜を用いたIn
P MISFETでは電流ドリフトが大幅に低減してい
ることが分かる。
In the PSG film, a drift of 9% occurs in 30 minutes,
In using a gate insulating film deposited by the method according to the present invention
It can be seen that the current drift is significantly reduced in the P MISFET.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、従来150〜200
℃が実質的な下限であったPN[の堆積温度を、150
℃以下室温にまで吸湿性の問題もなく下げられるため、
  MIS界面の界面準位密度が大幅に低減し、この方
法による絶縁膜をにl5FtET用のゲート絶縁膜に適
用した場合、ドレイン電流のドリフト量も従来に比べて
大幅に低減することが出来る。
As described above, according to the present invention, the conventional 150 to 200
The deposition temperature of PN, whose practical lower limit was 150 °C, was
Because it can be lowered to room temperature below ℃ without any hygroscopic problems,
The interface state density at the MIS interface is significantly reduced, and when the insulating film made by this method is applied to the gate insulating film for 15FtET, the amount of drift of the drain current can also be significantly reduced compared to the conventional method.

尚、本文中においては本発明をその半導体結晶基体3が
InPである場合の実施例につき説明したが、GaP等
燐を含む半導体に本発明を適用しても優れた効果を得る
ことが出来る。
In this text, the present invention has been described with reference to an embodiment in which the semiconductor crystal substrate 3 is InP, but excellent effects can be obtained even when the present invention is applied to a semiconductor containing phosphorus such as GaP.

【図面の簡単な説明】 第1図は、本発明に係る絶縁膜形成のための装置を示す
模式図、第2図は、本発明の方法によって形成した絶縁
膜をゲート絶縁膜として用いたMISFETのドレイン
電流の時間変化について従来の方法によるゲート絶縁膜
と比較した結果を示す図である。 l         ラジカル生成柵 反応室 InP基板(半導体結晶基体) サセプタ 7−−−一−−−−ガス導入管
[Brief Description of the Drawings] Fig. 1 is a schematic diagram showing an apparatus for forming an insulating film according to the present invention, and Fig. 2 is a MISFET using an insulating film formed by the method of the present invention as a gate insulating film. FIG. 3 is a diagram showing the results of comparison with a gate insulating film formed by a conventional method regarding the time change in drain current of the gate insulating film. l Radical generation fence reaction chamber InP substrate (semiconductor crystal substrate) Susceptor 7---1---Gas introduction pipe

Claims (2)

【特許請求の範囲】[Claims] (1)構成元素に燐を含む半導体結晶基体上に窒化燐の
絶縁膜を形成するにあたり、反応室内に燐を含む半導体
結晶基体を配置しかつ、この半導体結晶基体を150℃
以下に加熱し、前記反応室とは異なる室で窒素を励起し
生成された窒素ラジカルをホスフィンと共にこの反応室
内に導入し、前記半導体結晶基体上に絶縁膜を形成する
半導体結晶基体上への絶縁膜の形成方法。
(1) When forming an insulating film of phosphorus nitride on a semiconductor crystal substrate containing phosphorus as a constituent element, the semiconductor crystal substrate containing phosphorus is placed in a reaction chamber, and the semiconductor crystal substrate is heated to 150°C.
The nitrogen radicals generated by exciting nitrogen in a chamber different from the reaction chamber are introduced into the reaction chamber together with phosphine to form an insulating film on the semiconductor crystal substrate. How to form a film.
(2)構成元素に燐を半導体結晶基体がInPでなるこ
とを特徴とする特許請求の範囲第1項記載の半導体結晶
基体上への絶縁膜の形成方法。
(2) A method for forming an insulating film on a semiconductor crystal substrate according to claim 1, characterized in that the constituent element is phosphorus and the semiconductor crystal substrate is made of InP.
JP3505089A 1989-02-16 1989-02-16 Formation of insulating film on semiconductor crystal substrate Pending JPH02215128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3505089A JPH02215128A (en) 1989-02-16 1989-02-16 Formation of insulating film on semiconductor crystal substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3505089A JPH02215128A (en) 1989-02-16 1989-02-16 Formation of insulating film on semiconductor crystal substrate

Publications (1)

Publication Number Publication Date
JPH02215128A true JPH02215128A (en) 1990-08-28

Family

ID=12431212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3505089A Pending JPH02215128A (en) 1989-02-16 1989-02-16 Formation of insulating film on semiconductor crystal substrate

Country Status (1)

Country Link
JP (1) JPH02215128A (en)

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