JPH02211677A - Superconductor element - Google Patents

Superconductor element

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Publication number
JPH02211677A
JPH02211677A JP1031036A JP3103689A JPH02211677A JP H02211677 A JPH02211677 A JP H02211677A JP 1031036 A JP1031036 A JP 1031036A JP 3103689 A JP3103689 A JP 3103689A JP H02211677 A JPH02211677 A JP H02211677A
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JP
Japan
Prior art keywords
semiconductor
superconducting
junction
superconducting element
plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1031036A
Other languages
Japanese (ja)
Inventor
Haruhiro Hasegawa
晴弘 長谷川
Juichi Nishino
西野 壽一
Mutsuko Hatano
睦子 波多野
Hideaki Nakane
中根 英章
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Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1031036A priority Critical patent/JPH02211677A/en
Publication of JPH02211677A publication Critical patent/JPH02211677A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve Nb-semiconductor junction interface characteristics by forming the joint surface of a semiconductor in a (110) face in the junction structure of Nb-semiconductor. CONSTITUTION:Nb shows (110) natural orientation growth, and the formation energy of the orientation growth is reduced maximally. Consequently, the joint surface of a semiconductor is formed in a (100) face, the joint surface of the semiconductor is shaped in a (110) face rather than the (100) growth of Nb, and the (110) growth of Nb is advantageous in the lattice consistency of both the semiconductor and Nb in the junction structure of the semiconductor and Nb, thus improving Nb-semiconductor junction interface characteristics. Accordingly, the discontinuous quantity of anti-potential ¦DELTA(r)¦ on the interface of Nb-Si is reduced, a superconductive wave function is easy to leak and a superconducting element having a large amplification factor can be realized in the superconducting element using Si as the semiconductor and including the junction structure of Nb and Si.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は超電導材料であるNbと半導体とが接合する構
造の超電導素子に係り、特にこれらの接合界面特性の向
上に好適な超電導素子の構成に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a superconducting element having a structure in which Nb, which is a superconducting material, and a semiconductor are bonded, and in particular, to a structure of a superconducting element suitable for improving these bonding interface characteristics. Regarding.

〔従来の技術〕[Conventional technology]

従来、NbとSiとの接合構造を含む超電導素子につい
ては、電波新聞昭和63年8月6日(土)第1面におい
て論じられている。この超電導素子は第2図に示すよう
にSi半導体基板3上に形成されたNbからなる互いに
離れた一対のソース超電導電極l、ドレイン超電導電極
2と、これらの間に位置するゲート電極4.ゲート絶縁
膜5、及び絶縁膜6とから構成される。ソース超電導電
極1、ドレイン超電導電極2が超電導状態では、これら
から半導体基板3へ超電導波動関数がしみ出す。しみ出
し量については、固体物理23巻(1988年)第15
3頁から第162頁において論じられている。第4図に
N b −S i接合における対ポテンシャル1Δ(r
)1の空間変化を示す。
Conventionally, superconducting elements including a bonded structure of Nb and Si have been discussed on the front page of the Dempa Shimbun on Saturday, August 6, 1988. As shown in FIG. 2, this superconducting element consists of a pair of Nb source superconducting electrodes 1 and a drain superconducting electrode 2 formed on a Si semiconductor substrate 3, which are separated from each other, and a gate electrode 4 located between them. It is composed of a gate insulating film 5 and an insulating film 6. When the source superconducting electrode 1 and the drain superconducting electrode 2 are in a superconducting state, a superconducting wave function leaks from them to the semiconductor substrate 3. Regarding the amount of seepage, see Solid State Physics, Volume 23 (1988), No. 15.
Discussed on pages 3 to 162. Figure 4 shows the pair potential 1Δ(r
) indicates the spatial change of 1.

しみ出し量は半導体中のコヒーレンス長ξ。の程度であ
り、1Δ(r)lはNb−Si界面で不連続に変化する
。ξ。は3次元系ではキャリア濃度の1/3乗に比例す
る。従って第2図においてゲート電極4に適当なゲート
電圧を印加することによりチャネル部のキャリア濃度を
変化させればξ。を制御できることになる。ξ。が大き
く、ソース超電導電極]、ドレイン超電導電極2からし
み出した超電導波動関数が重なると両電極間には超電導
電流が流れる。ξ。が小さく、超電導波動関数が重なら
なければ両電極間には超電導電流は流れない。すなわち
ゲート電圧により、チャネルを流れる超電導電流が制御
できることになる。
The amount of seepage is the coherence length ξ in the semiconductor. 1Δ(r)l changes discontinuously at the Nb-Si interface. ξ. is proportional to the 1/3 power of the carrier concentration in a three-dimensional system. Therefore, in FIG. 2, if the carrier concentration in the channel portion is changed by applying an appropriate gate voltage to the gate electrode 4, ξ. can be controlled. ξ. is large, and when the superconducting wave functions seeping out from the source superconducting electrode and the drain superconducting electrode 2 overlap, a superconducting current flows between the two electrodes. ξ. If the superconducting wave functions are small and the superconducting wave functions do not overlap, no superconducting current will flow between the two electrodes. In other words, the superconducting current flowing through the channel can be controlled by the gate voltage.

また従来、NbとInSbとの接合構造を含む超電導素
子については、アイ・イー・イー・イートランザクショ
ン オン マグネチツクス、エムニー ジー21. 、
  (1985年)第721頁から(:3) 第724頁(IEEE、Trans、 Magneti
cs、 MAG 21゜(1985)pp721−72
4)において論じられている。この超電導素子は第3図
に示すようにMBE (分子線エピタキシ)法により形
成するInSb半導体8の上にNb超電導ベース7を成
膜する。超電導ベース7、コレクタ9の間に適当な電圧
VORを印加し、半導体8のエネルギーバンドを曲げ、
さらに超電導ベース7、エミッタ10の間に適当な電圧
VERを印加することにより、エミッタ10からトンネ
ル障壁膜12を介して超電導ベース7へ準粒子を注入す
るものである。
Conventionally, regarding superconducting elements including a junction structure of Nb and InSb, IE Transactions on Magnetics, MNG21. ,
(1985) pp. 721-(:3) p. 724 (IEEE, Trans, Magneti
cs, MAG 21° (1985) pp721-72
4). In this superconducting element, as shown in FIG. 3, a Nb superconducting base 7 is formed on an InSb semiconductor 8 formed by MBE (molecular beam epitaxy). Applying an appropriate voltage VOR between the superconducting base 7 and the collector 9 bends the energy band of the semiconductor 8,
Further, by applying an appropriate voltage VER between the superconducting base 7 and the emitter 10, quasiparticles are injected from the emitter 10 into the superconducting base 7 via the tunnel barrier film 12.

また従来、GaAs(100)面方位基板上のNb (
100)配向のエピタキシャル成長については、電子通
信学会技術研究報告5CE8638、(1987年)第
35頁から第40頁において論じられている。
Furthermore, conventionally, Nb (
100) oriented epitaxial growth is discussed in IEICE Technical Report 5CE8638, (1987) pages 35 to 40.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記NbとSiとの接合構造を含む超電導素子及びNb
とInSbとの接合構造を含む超電導素子については、
いずれもNbとSi、NbとIn5bの接合界面特性に
ついて配慮がされておらず、前者の超電導素子について
はSiへの超電導波動関数のしみ出し量が少ない、すな
わちゲート電圧変化量に対するドレイン電流変化量、増
幅率が小さいという問題があった。これはN b −S
 i接合における格子の不整合性が大きく、第4図にお
いて、N b −S i界面における対ポテンシャル1
Δ(r)の不連続量が大きいためと考えられる。
A superconducting element including the above-mentioned Nb and Si junction structure and Nb
Regarding superconducting elements including a junction structure of and InSb,
In both cases, no consideration is given to the junction interface characteristics between Nb and Si and Nb and In5b, and in the case of the former superconducting element, the amount of superconducting wave function seeping into Si is small, that is, the amount of change in drain current relative to the amount of change in gate voltage. , there was a problem that the amplification factor was small. This is N b −S
The lattice mismatch at the i junction is large, and in Fig. 4, the pair potential 1 at the N b -S i interface
This is thought to be due to the large amount of discontinuity in Δ(r).

また、後者の超電導素子においては、Nbからなる超電
導ベース7を通ってInSbからなる半導体8へ準粒子
が流入するが、この流入量はNbとInSbの界面特性
に敏感である。素子特性を向上させるためには流入量が
大きいことが望ましく、従ってNb、InSb両者の格
子の不整合性は小さい方が望ましい。
In the latter superconducting element, quasiparticles flow into the semiconductor 8 made of InSb through the superconducting base 7 made of Nb, but the amount of this inflow is sensitive to the interface characteristics between Nb and InSb. In order to improve device characteristics, it is desirable that the amount of inflow be large, and therefore it is desirable that the lattice mismatch between both Nb and InSb be small.

また従来、GaAs(100)面方位基板上のNb (
100)配向のエピタキシャル成長については論じられ
ている。
Furthermore, conventionally, Nb (
100) oriented epitaxial growth has been discussed.

本発明の目的は、Nbと半導体とが接合する構造におい
て、半導体の接合面方位を最適化することにより、Nb
−半導体接合界面特性を向上させることにある。
An object of the present invention is to optimize the junction plane orientation of the semiconductor in a structure in which Nb and a semiconductor are joined.
- To improve semiconductor junction interface characteristics.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的はNb−半導体の接合構造において、半導体の
接合面を(110)面とすることにより達成される。
The above object is achieved by making the junction surface of the semiconductor a (110) plane in the Nb-semiconductor junction structure.

上記半導体としては、Si、GaAsまたはInSb等
を用いることができる。
As the semiconductor, Si, GaAs, InSb, or the like can be used.

また、上記Nbとの接合面が(110)面である半導体
と、これに接するNbからなる互いに離れた一対のソー
ス、ドレイン超電導電極と、これらの間に位置しドレイ
ン電流を制御するゲート電極と、ゲート絶縁膜とから構
成される超電導素子、あるいは、コレクタと、上記半導
体と上記Nbからなる超電導ベースと、トンネル障壁膜
と、エミッタとから構成される超電導素子を形成するこ
とができる。
In addition, a semiconductor whose junction surface with Nb is the (110) plane, a pair of mutually separated source and drain superconducting electrodes made of Nb in contact with the semiconductor, and a gate electrode located between these and controlling the drain current. , a gate insulating film, or a superconducting element including a collector, a superconducting base made of the semiconductor and Nb, a tunnel barrier film, and an emitter.

〔作用〕[Effect]

Nbは(110)自然配向成長を示し、この配向成長が
最も形成エネルギーが小さい。従って半導体とNbの接
合構造において、半導体の接合面を(100)面とし、
Nbを(100)成長させるよりも、半導体の接合面を
(l i O)血とし、Nbを(110)成長させた方
が両者の格子整合性は有利でありNb−半導体接合界面
特性は向上することになる。
Nb exhibits (110) natural oriented growth, and this oriented growth has the smallest formation energy. Therefore, in the junction structure of semiconductor and Nb, the junction plane of the semiconductor is set as the (100) plane,
Rather than growing Nb (100), growing Nb (110) with (l i O) on the semiconductor junction surface is more advantageous in terms of lattice matching between the two, and the characteristics of the Nb-semiconductor junction interface are improved. I will do it.

これにより、例えば半導体としてSiを用い、NbとS
iとの接合構造を含む超電導素子においては、第4図に
おけるNb−8i界面における対ポテンシャルIΔ(r
)1の不連続量が小さくなり、超電導波動関数はしみ出
しやすくなり、増幅率の大きい超電導素子が実現可能と
なる。
As a result, for example, Si is used as a semiconductor, and Nb and S
In a superconducting element including a junction structure with i, the pair potential IΔ(r
) 1 becomes smaller, the superconducting wave function easily leaks out, and a superconducting element with a large amplification factor can be realized.

また、半導体としてInSbを用い、NbとInSbと
の接合構造を含む超電導素子においては、NbからIn
Sbへの準粒子の流入量が大きくなり、コレクタ電流の
大きい超電導素子が実現可能となる。
In addition, in a superconducting element that uses InSb as a semiconductor and includes a junction structure of Nb and InSb,
The amount of quasiparticles flowing into Sb becomes large, and a superconducting element with a large collector current can be realized.

半導体の結晶構造がダイヤモンド型結晶構造または閃亜
鉛鉱型結晶構造であれば、格子位置が相似であるので、
最適な半導体の接合面はいずれについても同様で(11
0)面となる。すなわち半導体はSlやInSbには限
定されない。
If the crystal structure of a semiconductor is a diamond type crystal structure or a zinc blende type crystal structure, the lattice positions are similar, so
The optimal semiconductor junction surface is the same for both (11
0) side. That is, the semiconductor is not limited to Sl or InSb.

〔実施例〕〔Example〕

以下、本発明を実施例を参照して詳細に説明する。第1
図を用いて本発明の第1の実施例を説明する。本実施例
はS i (110)基板上にNbを成膜する方法に関
するものである。
Hereinafter, the present invention will be explained in detail with reference to Examples. 1st
A first embodiment of the present invention will be described with reference to the drawings. This example relates to a method of forming a Nb film on a Si (110) substrate.

Si表面は通常、数十人のSi自然酸化膜により覆われ
ている。Nb−8i間の介在物を取り除きNb−8i接
合界面特性を向上させるためには、Nbの成膜前にSi
表面からこのSi自然酸化膜をエツチングしなければな
らない。さらに通常のHFによるエツチングでは炭素な
どの汚染物がSi表面に付着し、十分な接合界面特性が
得られない可能性があり、洗浄方法としては不十分であ
る。そこで以下に示す加熱清浄化法を採用し、これによ
り炭素、酸素などの汚染のない清浄なSi表面を得た。
The Si surface is usually covered with several tens of Si natural oxide films. In order to remove inclusions between Nb-8i and improve the Nb-8i bonding interface characteristics, it is necessary to deposit Si before forming the Nb film.
This Si natural oxide film must be etched from the surface. Furthermore, ordinary HF etching is insufficient as a cleaning method because contaminants such as carbon may adhere to the Si surface and sufficient bonding interface properties may not be obtained. Therefore, the heating cleaning method described below was adopted, thereby obtaining a clean Si surface free from contamination with carbon, oxygen, and the like.

ます、Si基板を約120℃の硝酸中で10分間煮沸処
理した。5分間純水で水洗した後、2%HFに1分間浸
し、S1酸化膜をエラチングした。5分間純水で水洗し
、再び硝酸により煮沸処理した。これを3回繰り返した
。次にアンモニア水、過酸化水素水の混合液中で90℃
10分間煮沸処理した。10分間純水で水洗後、2%H
FによりSi酸化膜をエツチングした。次に塩酸、過酸
化水素水の混合液中で90℃10分間煮沸処理し、最後
に10分間純水で水洗した。
First, the Si substrate was boiled in nitric acid at about 120° C. for 10 minutes. After washing with pure water for 5 minutes, the S1 oxide film was etched by immersing it in 2% HF for 1 minute. It was washed with pure water for 5 minutes and boiled again with nitric acid. This was repeated three times. Next, in a mixture of ammonia water and hydrogen peroxide water at 90°C.
It was boiled for 10 minutes. After washing with pure water for 10 minutes, 2% H
The Si oxide film was etched with F. Next, it was boiled at 90° C. for 10 minutes in a mixture of hydrochloric acid and hydrogen peroxide, and finally washed with pure water for 10 minutes.

以上の処理によりSi基板表面は厚さ数人のSi酸化膜
で覆われ、炭素等の汚染物は付着していないと考えられ
る。次にこのSi基板を約1xio−工0Torrの超
高真空中で850℃30分間加熱し、Si基板表面の数
人のSi酸化膜を除去、清浄なSi表面を得た。このよ
うにして上記加熱清浄化法により清浄なSi表面を得た
As a result of the above processing, the surface of the Si substrate is covered with a Si oxide film several times thicker, and it is considered that no contaminants such as carbon are attached thereto. Next, this Si substrate was heated at 850° C. for 30 minutes in an ultra-high vacuum of about 1xio-0 Torr to remove some Si oxide films on the surface of the Si substrate to obtain a clean Si surface. In this way, a clean Si surface was obtained by the heating cleaning method described above.

次にこの基板に約1− X 10 工0Torrの超高
真空を保ったまま、Nbを蒸着した。基板加熱温度は約
300’l:以下にすることが必要である。それ以上の
加熱温度ではNbSixが形成され、N b −S i
接合界面特性は劣化する。SEM (SEMは走査型電
子顯微鏡の略である。)tR祭により、Nbの粒形は長
軸方向が約2000人の楕円状であり、基板加熱温度の
上昇に伴い粒形が増大することが確認できた。
Next, Nb was evaporated onto this substrate while maintaining an ultra-high vacuum of 0 Torr for about 1-×10 min. The substrate heating temperature needs to be about 300'l: or less. At a heating temperature higher than that, NbSix is formed, and Nb −S i
The bonding interface properties deteriorate. SEM (SEM is an abbreviation for scanning electronic microscopy.) The tR festival revealed that the grain shape of Nb is approximately 2000 ellipsoidal in the long axis direction, and that the grain shape increases as the substrate heating temperature increases. It could be confirmed.

第1図に示すようにNbは格子定数a=3.300人、
Siはa=5.420人であり不整合性は14%、G 
a A sはa =5.653人であり不整合性は18
%、InSbはa=6.479人であり不整合性は1.
9%である。従って格子整合性の観点では、I n S
 b 、 S j、 G a A sの順で有利である
が、それぞれについてその(110)面をNbとの接合
面とすることにより最適なNb−半導体接合界面特性が
得られる。
As shown in Figure 1, Nb has a lattice constant a=3.300,
Si is a = 5.420 people, inconsistency is 14%, G
a A s is a = 5.653 people and the inconsistency is 18
%, InSb is a=6.479 people, and the inconsistency is 1.
It is 9%. Therefore, from the perspective of lattice matching, I n S
b, Sj, and GaAs are advantageous in this order, but optimal Nb-semiconductor junction interface characteristics can be obtained by setting the (110) plane of each as the bonding surface with Nb.

次に第5図及び第6図を用いて本発明の第2の実施例を
説明する。面方位(111)のPを濃度約IX1.01
8印−8ドープしたSi半心体基板3にレジスト塗布後
、電子ビーム描画法によりバターニングし、次にCF4
と02の混合気体中で反応性エツチングを行い第6図(
a)を得る。Sjの凸状の薄膜部は厚みが約0.1μm
、高さが約0.2μmであり、(110)面が対向する
ように形成する。次に本発明の第1の実施例に記述した
加熱清浄化法により表面処理を行い清浄表面を得たのち
、約I X 10−” Torrの超高真空中、基板加
熱温度約240℃の条件下でNbを約2人/Sの成膜速
度で約1500人蒸着し、ソース超電導電極1、ドレイ
ン超電導電極2を形成し、第6図(b)を得る。AZ系
のレジスト約1000人塗布後、CF4と02の混合気
体中で反応性エツチングを行い、凸状薄膜部上部のNb
をエッチバックにより取り除く。
Next, a second embodiment of the present invention will be described using FIGS. 5 and 6. The concentration of P with plane orientation (111) is approximately IX1.01
After applying a resist to the 8 mark-8 doped Si half-center substrate 3, patterning was performed by electron beam lithography, and then CF4
Reactive etching was carried out in a gas mixture of
obtain a). The thickness of the convex thin film portion of Sj is approximately 0.1 μm.
, have a height of about 0.2 μm, and are formed so that the (110) planes face each other. Next, after surface treatment was performed by the heating cleaning method described in the first embodiment of the present invention to obtain a clean surface, the substrate was heated at a temperature of about 240° C. in an ultra-high vacuum of about I x 10-” Torr. Nb is deposited by about 1,500 people at a deposition rate of about 2 people/S to form a source superconducting electrode 1 and a drain superconducting electrode 2, as shown in FIG. 6(b). About 1,000 people apply AZ-based resist. After that, reactive etching is performed in a mixed gas of CF4 and 02 to remove Nb on the upper part of the convex thin film.
is removed by etching back.

次にCVD法により約20人の5108ゲー1〜絶縁膜
5を形成し、さらにPSGによりゲート電極4を形成、
第6図(c)の超電導素子を得る。
Next, about 20 5108 gates 1 to 5 are formed by CVD, and the gate electrode 4 is formed by PSG.
The superconducting element shown in FIG. 6(c) is obtained.

超電導状態ではソース超電導電極1、及びドレイン超電
導電極2から半導体3へ超電導波動関数がしみ出す。し
み出し意はゲート電極4に印加するゲート電圧により制
御され、両者のしみ出した超電導波動関数が重なり合っ
た時、ソース超電導電極1.ドレイン超電導電極2間に
トレイン電流が超電導電流となって流れる。従ってゲー
ト電圧により制御される超電導波動関数のしみ出し位置
は、S i (111)面の部位よりもSi凸部薄膜部
の対向面の部位が支配的となる。今、この対向面はS 
i (110)面であるので、Nb−Si接合界面特性
は最適であり、超電導波動関数は最もしみ出しやすい。
In the superconducting state, a superconducting wave function seeps into the semiconductor 3 from the source superconducting electrode 1 and the drain superconducting electrode 2. The tendency to seep out is controlled by the gate voltage applied to the gate electrode 4, and when the two seeped superconducting wave functions overlap, the source superconducting electrode 1. A train current flows between the drain superconducting electrodes 2 as a superconducting current. Therefore, the position where the superconducting wave function seeps out, which is controlled by the gate voltage, is dominated by the area on the opposing surface of the Si convex thin film part rather than the area on the S i (111) plane. Now, this facing surface is S
Since it is an i (110) plane, the Nb-Si junction interface characteristics are optimal, and the superconducting wave function is most likely to seep out.

従ってゲート電圧によるトレイン電流の変化量も増大し
、増幅率の大きい超電導素子が実現できる。
Therefore, the amount of change in train current due to gate voltage also increases, and a superconducting element with a large amplification factor can be realized.

Si凸状薄膜部の形状は、厚さが超電導近接効果が起こ
る程度、すなわち約0.3μm以下、高さはゲート電圧
によるSi半導体のバンドの曲がりが生じる程度、すな
わち空乏層の長さ程度にする必要がある。
The shape of the Si convex thin film part is such that the thickness is such that the superconducting proximity effect occurs, that is, approximately 0.3 μm or less, and the height is such that the band bending of the Si semiconductor due to the gate voltage occurs, that is, approximately the length of the depletion layer. There is a need to.

尚本実施例では半導体3としてSiを用いたがNbとの
格子不整合性の小さいInSbを用いても同様の効果が
得られることは言うまでもない。
Although Si is used as the semiconductor 3 in this embodiment, it goes without saying that the same effect can be obtained by using InSb, which has a small lattice mismatch with Nb.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、Nbとダイヤモ
ンド型結晶構造または閃亜鉛鉱型結晶構造を有す半導体
との接合構造において、この半導体の接合面を(110
)面とすることにより、Nb−半導体接合界面特性が向
上するので、特性の優れた超電導素子が実現可能となる
As explained above, according to the present invention, in a junction structure between Nb and a semiconductor having a diamond-type crystal structure or a zinc blende-type crystal structure, the junction surface of the semiconductor is (110
) plane improves the Nb-semiconductor junction interface characteristics, making it possible to realize a superconducting element with excellent characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はNb、Si、GaAs、In5b(110)面
の原子位置図である。第2図、第3図はそれぞれNbと
Si、NbとInSbの接合構造を含む従来の超電導素
子の断面図である。第4図はNb−Si接合における対
ポテンシャルの空間変化を示した図である。第5図は本
発明の第2の実施例の超電導素子の断面図である。第6
図は本発明の第2の実施例の超電導素子の作製工程を示
した図である。 1・・・ソース超電導電極、2・・・ドレイン超電導電
極、3・・・半導体基板、4・・・ゲート電極、5・・
・ゲート絶縁膜、6・・・絶縁膜、7・・・超電導ベー
ス、8・・・半導体、9・・・コレクタ、10・・・エ
ミッタ、11・・・ベース電極、12・・・トンネル障
壁膜、13・・・半導体基Nb (//θ)面 S’t(//ρ)面 CIL As (//θ)面 兎
FIG. 1 is an atomic position diagram of Nb, Si, GaAs, and In5b (110) plane. FIGS. 2 and 3 are cross-sectional views of conventional superconducting elements including junction structures of Nb and Si and Nb and InSb, respectively. FIG. 4 is a diagram showing spatial changes in the pair potential in the Nb-Si junction. FIG. 5 is a sectional view of a superconducting element according to a second embodiment of the present invention. 6th
The figure is a diagram showing the manufacturing process of a superconducting element according to a second embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Source superconducting electrode, 2... Drain superconducting electrode, 3... Semiconductor substrate, 4... Gate electrode, 5...
・Gate insulating film, 6... Insulating film, 7... Superconducting base, 8... Semiconductor, 9... Collector, 10... Emitter, 11... Base electrode, 12... Tunnel barrier Film, 13... Semiconductor base Nb (//θ) plane S't (//ρ) plane CIL As (//θ) plane Rabbit

Claims (1)

【特許請求の範囲】 1、Nbと、ダイヤモンド型結晶構造または閃亜鉛鉱型
結晶構造を有す半導体との接合構造を有する超電導素子
において、上記半導体の接合面が(110)面であるこ
とを特徴とする超電導素子。 2、上記半導体がSi、GaAsまたはInSbである
ことを特徴とする請求項1記載の超電導素子。 3、上記Nbとの接合面が(110)面である半導体と
、これに接するNbからなる互いに離れた一対のソース
、ドレイン超電導電極と、これらの間に位置しドレイン
電流を制御するゲート電極と、ゲート絶縁膜とから構成
されることを特徴とする請求項1または2記載の超電導
素子。 4、コレクタと、上記半導体と上記Nbからなる超電導
ベースと、トンネル障壁膜と、エミッタとから構成され
ることを特徴とする請求項1または2記載の超電導素子
[Claims] 1. In a superconducting element having a junction structure of Nb and a semiconductor having a diamond-type crystal structure or a zinc blende-type crystal structure, the junction plane of the semiconductor is a (110) plane. Features of superconducting elements. 2. The superconducting element according to claim 1, wherein the semiconductor is Si, GaAs or InSb. 3. A semiconductor whose junction surface with Nb is the (110) plane, a pair of mutually separated source and drain superconducting electrodes made of Nb in contact with the semiconductor, and a gate electrode located between these and controlling the drain current. 3. The superconducting element according to claim 1, wherein the superconducting element comprises a gate insulating film. 4. The superconducting element according to claim 1 or 2, comprising a collector, a superconducting base made of the semiconductor and the Nb, a tunnel barrier film, and an emitter.
JP1031036A 1989-02-13 1989-02-13 Superconductor element Pending JPH02211677A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1031036A JPH02211677A (en) 1989-02-13 1989-02-13 Superconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1031036A JPH02211677A (en) 1989-02-13 1989-02-13 Superconductor element

Publications (1)

Publication Number Publication Date
JPH02211677A true JPH02211677A (en) 1990-08-22

Family

ID=12320270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1031036A Pending JPH02211677A (en) 1989-02-13 1989-02-13 Superconductor element

Country Status (1)

Country Link
JP (1) JPH02211677A (en)

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