JPH022097A - Memory module - Google Patents

Memory module

Info

Publication number
JPH022097A
JPH022097A JP63145073A JP14507388A JPH022097A JP H022097 A JPH022097 A JP H022097A JP 63145073 A JP63145073 A JP 63145073A JP 14507388 A JP14507388 A JP 14507388A JP H022097 A JPH022097 A JP H022097A
Authority
JP
Japan
Prior art keywords
memory
memory module
modules
constituted
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63145073A
Other languages
Japanese (ja)
Inventor
Seiichi Kageyama
影山 精一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63145073A priority Critical patent/JPH022097A/en
Publication of JPH022097A publication Critical patent/JPH022097A/en
Pending legal-status Critical Current

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  • Semiconductor Memories (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

PURPOSE:To reduce the thickness of a memory or IC card and to increase the capacity thereof while facilitating constitution, assembling and manufacturing by assembling and unifying respective memory modules constituted so as to be preliminarily divided into two or more blocks. CONSTITUTION:Memory modules 1, 2 are constituted by mounting IC element groups 1a, 2a on a chip-on-board structure and integrated by opposing the surfaces of thin substrates 3, 4 not loaded with the IC element groups 1a, 2a to each other to adhere both of them by an adhesive. A module circuit is constituted so that the divided circuits of the modules are connected by a flat conductor cable 5. By this method, the memory module can be constituted in good yield and an increase in capacity, the reduction in thickness and miniaturization can be also achieved.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は例えばメモリカードの小形化ないし大容量化に
適するよう改良されたメモリモジュールに関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a memory module that has been improved to be suitable for, for example, downsizing or increasing the capacity of a memory card.

(従来の技術) 薄い基板面上にメモリIC素子を含むIC素子をチップ
オンボード構造で搭載したメモリモジュールを内蔵して
成るメモリカード或いはICカードが広く実用に供され
ており、またこの種メモリカードなどについては薄形化
、大容量化などが望まれている。ところで上記チップオ
ンボード構造のメモリモジュールにおいては通常、IC
素子を1個または2個搭載しているに過ぎずメモリカー
ドなどの薄形化や大容量化の点で十分満足しうるちので
はない。つまりチップオンボード構造においてIC素子
の搭載個数が高々8個程度の場合には量産上の支障もほ
とんどないがIC素子の搭載個数が8個程度以上になる
と歩留りが低いた終実用に倶されるに至っていない。
(Prior Art) Memory cards or IC cards that have a built-in memory module in which IC elements including memory IC elements are mounted on a thin substrate surface in a chip-on-board structure are widely used in practical use, and this type of memory Cards and the like are desired to be thinner and have larger capacity. By the way, in the memory module of the above-mentioned chip-on-board structure, the IC
Since it only mounts one or two elements, it is not fully satisfactory in terms of making memory cards thinner and larger in capacity. In other words, in a chip-on-board structure, if the number of IC elements mounted is about 8 at most, there will be almost no problem in mass production, but if the number of mounted IC elements exceeds 8, the yield will be low and it will no longer be practical. has not yet been reached.

(発明が解決しようとする課題) 本発明は上記事情に対処してメモリカードないしICカ
ードの薄形化や大容量化に適するばかりでなく構成ない
し組立製造も容易で歩留りよく即ち量産可能なメモリモ
ジュールを提供することを目的とする。
(Problems to be Solved by the Invention) In order to address the above-mentioned circumstances, the present invention is a memory that is not only suitable for making memory cards or IC cards thinner and larger in capacity, but also is easy to configure and assemble, and can be mass-produced with high yield. The purpose is to provide modules.

[発明の構成] (課題を解決するための手段) 本発明はメモリIC素子を含む多数のIC素子群で構成
されるメモリ回路を複数のブロックに分割した形でチッ
プオンボード構造のメモリモジュールを構成し、これら
分割構成されたメモリモジュールを一体的に組合せ、且
つ薄いフラット型コンダクタケーブルを用い電気的に接
続し、所望の機能を有するメモリモジュール化すること
を特徴とする。
[Structure of the Invention] (Means for Solving the Problems) The present invention provides a memory module with a chip-on-board structure in which a memory circuit composed of a large number of IC element groups including memory IC elements is divided into a plurality of blocks. The present invention is characterized in that the divided memory modules are integrally combined and electrically connected using a thin flat conductor cable to form a memory module having a desired function.

(作用) 上記の如く本発明(こ係るメモリモジュールは予め複数
のブロックに分割し構成された各メモリモジュールを組
立て一体化する構成を採っている。
(Function) As described above, the present invention (this memory module has a structure in which memory modules which are divided into a plurality of blocks in advance are assembled and integrated).

つまり分割された各ブロック回路をなすメモリモジュー
ルはチップオンボード構造に構成するに当ってIC素子
の搭載数も比較的少数となるため各メモリモジュールは
歩留りよく得られる。またこれら各メモリモジュールの
一体化もIC素子群が搭載されていない面部分の貼り合
せなどによって行なうためコンパクトな構成となる。
In other words, when the memory modules constituting each divided block circuit are constructed in a chip-on-board structure, the number of mounted IC elements is relatively small, so that each memory module can be obtained at a high yield. Furthermore, since the integration of these memory modules is carried out by bonding the surface portions on which the IC element group is not mounted, a compact structure is achieved.

(実施例) 以下第1図を参照して本発明のメモリモジュール例を説
明する。
(Example) An example of a memory module of the present invention will be described below with reference to FIG.

第1図はチップオンボード構造の256にバイトSRA
Mモジュール2個を一体的に組合せて構成した516に
バイトのメモリモジュールを側面的に示したもので、1
.2はそれぞれ分割された256にバイトSRAMモジ
ュールである。しかしてこれら256にビットSRAM
 (I C素子)8個からなるメモリモジュール本体な
いしIC素子群1a、2aをチップオンボード構造に搭
載して構成されている。またこれら両メモリモジュール
1.2は前記IC素子群18%2aが搭載されていない
薄い基板3.4の面を互いに対接させ例えばエポキシ樹
脂系の接着剤で一体化されている。さらに5は前記メモ
リモジュール1と2との間を電気的に接続するフラット
型コンダクタケーブル、6は前記メモリモジュール1.
2のいずれか一方、例えばメモリモジュール2に設置さ
れた外部接続用コネクタである。つまり本発明に係る5
12にバイトSRAMモジュールの回路は256にバイ
トSRAMモジュール1の回路と同じ(256にバイト
SRAMモジュール2の回路とに分割されたものが、フ
ラット型コンダクタケーブル5で接続された構成を採っ
ている。
Figure 1 shows 256 byte SRAs in a chip-on-board structure.
This is a side view of a 516-byte memory module configured by integrally combining two M modules.
.. 2 are each divided into 256 byte SRAM modules. However, these 256 bits SRAM
(IC Element) It is constructed by mounting a memory module body or a group of eight IC elements 1a and 2a on a chip-on-board structure. Further, both of these memory modules 1.2 are integrated with, for example, an epoxy resin adhesive, with the surfaces of the thin substrate 3.4 on which the IC element group 18% 2a is not mounted facing each other. Furthermore, 5 is a flat conductor cable that electrically connects the memory modules 1 and 2; 6 is a flat conductor cable that electrically connects the memory modules 1 and 2;
2, for example, an external connection connector installed in the memory module 2. In other words, 5 according to the present invention
The circuit of the byte SRAM module 12 is the same as the circuit of the byte SRAM module 1 at 256 (it is divided into the circuit of the byte SRAM module 2 at 256), and is connected by a flat conductor cable 5.

なお上記においては所要のメモリモジュール回路の構成
に当って、前記回路を2分割したメモリモジュール2個
を平面的に並設し一体化したが、前記2分割化したメモ
リモジュールの裏面同志を互いに接着し一体化した構成
としてもよい。また前記所要のメモリモジュール回路の
構成は回路を3分割またはそれ以上に分割した型のもの
を組合せ一体化して行なってもよく、さらに分割化した
メモリモジュールの一体化手段は前記接着剤に限定され
ず、接着剤以外の他の手段でも勿論よい。
In the above, in order to configure the required memory module circuit, two memory modules obtained by dividing the circuit into two are placed side by side in a plane and integrated. It is also possible to have an integrated configuration. Further, the configuration of the required memory module circuit may be achieved by combining and integrating circuits divided into three or more parts, and furthermore, the means for integrating the divided memory modules is limited to the adhesive. Of course, other means than adhesive may also be used.

[発明の効果コ 上記の如く本発明のメモリモジュールは回路的にないし
容量的に複数に分割されたチップオンボード構造を組合
せ一体化して構成されている。つまりメモリ容量の大き
いメモリモジュールを任意に且つ歩留りよく構成できる
ばかりでなく薄型化などに容易に達成される。例えば前
記実施例の構造を採った512にバイトSRAMモジュ
ールは長さ8011111、幅70■、高さ2.5■で
あり、また256にバイトSRAMモジュール1.2の
裏面同志を貼り合せた構造とした場合には長さ40ff
l111幅70mm5高さ5mm程度となる。かくして
本発明のメモリモジュールは歩留りよく構成できること
、大容量で比較的薄型化ないし小型化も図りうることか
ら実用上多くの利点をもたらすものと言える。
[Effects of the Invention] As described above, the memory module of the present invention is constructed by combining and integrating chip-on-board structures that are divided into a plurality of circuits or capacitors. In other words, not only can a memory module with a large memory capacity be constructed arbitrarily and with a high yield, but also a reduction in thickness can be easily achieved. For example, a byte SRAM module 512 which adopts the structure of the above embodiment has a length of 8011111, a width of 70cm, and a height of 2.5cm, and a structure in which the back sides of a byte SRAM module 1.2 are bonded to each other in 256. In that case, the length is 40ff.
111 Width: 70 mm 5 Height: approximately 5 mm. Thus, the memory module of the present invention can be constructed with high yield, has a large capacity, and can be made relatively thin or compact, so it can be said that it brings many practical advantages.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に係るメモリモジュールの一構成例を示
す側面図である。 1.2・・・分割されたメモリモジュール1a、2a・
・・IC素子群 3.4・・・基板 5・・・・・・・・・フラット型コンダクタケーブル6
・・・・・・・・・コネクタ
FIG. 1 is a side view showing an example of the configuration of a memory module according to the present invention. 1.2... Divided memory modules 1a, 2a.
・・IC element group 3.4 ・Board 5 ・・・Flat type conductor cable 6
·········connector

Claims (1)

【特許請求の範囲】[Claims]  基板面上にメモリIC素子を含むIC素子群をチップ
オンボード構造で搭載してなる少なくとも2以上のメモ
リモジュールと、前記メモリモジュールを前記IC素子
群が搭載されていない面の部分を互いに対接させ一体化
した手段と、前記メモリモジュール間を電気的に接続す
るフラット型コンダクタケーブルと、前記メモリモジュ
ール中の一つのメモリモジュールに設置された外部接続
用コネクタとを具備して成ることを特徴とするメモリモ
ジュール。
At least two or more memory modules each having an IC element group including a memory IC element mounted on a substrate surface in a chip-on-board structure; and a flat conductor cable for electrically connecting the memory modules, and an external connection connector installed in one of the memory modules. memory module.
JP63145073A 1988-06-13 1988-06-13 Memory module Pending JPH022097A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63145073A JPH022097A (en) 1988-06-13 1988-06-13 Memory module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63145073A JPH022097A (en) 1988-06-13 1988-06-13 Memory module

Publications (1)

Publication Number Publication Date
JPH022097A true JPH022097A (en) 1990-01-08

Family

ID=15376754

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63145073A Pending JPH022097A (en) 1988-06-13 1988-06-13 Memory module

Country Status (1)

Country Link
JP (1) JPH022097A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0512967U (en) * 1991-07-31 1993-02-19 日立マクセル株式会社 Memory IC card
US5649610A (en) * 1994-06-29 1997-07-22 Aisin Seiki Kabushiki Kaisha Pad clip for a disc brake

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0512967U (en) * 1991-07-31 1993-02-19 日立マクセル株式会社 Memory IC card
US5649610A (en) * 1994-06-29 1997-07-22 Aisin Seiki Kabushiki Kaisha Pad clip for a disc brake

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