JPS5994856A - Composite circuit device and mounting method thereof - Google Patents

Abstract

PURPOSE:To form integrally a resistance element and a capacitor with a semiconductor element, etc., in one body by a method wherein a carrier substrate mounted with a semiconductor chip and a lamination type dielectric substrate having a capacitor function are displaced opposite to each other and are performed an electric connection. CONSTITUTION:A resistance element is constituted on the surface of the convex part of a carrier substrate 1 made of alumina and constituted with an electrode pattern, using a thick film or thin film forming technique, and a semiconductor chip element 2 is mounted on the concave part 1a of the substrate 1 in order to seal with a resin 5 for sealing. A lamination type dielectric substrate 3 is alternately laminated with a dielectric layer 8 and an internal electrode 4 using material such as a BaTiO2 family and a TiO2 family and manufactured by firing. The internal electode 4 constitutes a capacitor. A printing substrate 12 constituted by patterning, the carrier substrate 1 and the lamination type dielectric substrate 3 are joined with adhesives 10, dipped in soldering, and the terminal electrodes between the substrates 1 and 3 are mutually connected by soldersings 11.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a high-density composite circuit device and its mounting method.

Conventional Structure and Problems There has been great progress in recent years in miniaturizing and increasing the density of m-electron circuits as semiconductor devices have progressed. However, in linear ICs, individual components are used for external components such as high-precision resistors and large-capacity capacitors. There is a strong desire for the emergence of a composite circuit device that efficiently combines components such as resistors and capacitors that are difficult to incorporate into a silicon chip, thereby achieving smaller size and higher density. Conventionally, in electronic circuits that require compactness and high density, a chip mounting method has become common, in which miniaturized individual components such as chip resistors and chip capacitors are used and mounted on a printed circuit board together with active elements that are also packaged in a miniaturized manner. However, there are limits to the miniaturization of these chip components, which is a bottleneck in miniaturizing the entire system.Also, the large number of components makes it difficult to manage and assemble, and there are many connections, making it unreliable. There is also a disadvantage of lack of sex. Furthermore, there is also a composite circuit device, such as a so-called thick film integrated circuit, in which four elements, a resistor, a semiconductor chip, a capacitor chip, an external lead, etc. are successively added to an alumina substrate, and finally an exterior is applied. Although this can be expected to have a fairly high degree of integration, it has the drawbacks that each component is added sequentially (a process), resulting in poor cumulative yield and being too expensive to be used in consumer electronic devices. Furthermore, there are composite circuit devices with a three-dimensional structure, such as the micromodule system, in which multiple standardized wafers are stacked as component parts, each terminal electrode is interconnected using multiple wires, and then an exterior is applied. This method requires a complicated assembly process, has many connection points, and has no cost benefits, so it is currently not used at all.

Purpose of the Invention The present invention solves the above-mentioned conventional drawbacks, and aims to provide a composite circuit device that integrates resistors and capacitors that are difficult to integrate with semiconductor chips, etc., and a method for mounting the same at low cost. .

Structure of the Invention In order to achieve the above object, the composite circuit device of the present invention is constructed by alternately laminating and firing a carrier substrate in which a semiconductor chip is mounted in the recess of a concave insulating plate having terminal electrodes, internal electrodes and a dielectric layer. A laminated dielectric substrate that has multiple capacitor functions and has lead-out terminal electrodes on its edge surface is placed facing each other, and any terminal electrodes between the two thread plates are electrically connected by soldering. It is. The mounting method is to arrange the terminal electrodes of the carrier board, laminated dielectric board, and printed wiring board facing each other, mechanically fix each board with adhesive, and then interconnect them all at once by soldering. It is something.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a composite circuit device of the present invention, (1) is an alumina carrier substrate, (2) is a semiconductor chip element, (3) is a laminated dielectric substrate, (4) is an internal electrode, (5) is a
) is a resin for sealing the semiconductor chip element (2), (
6) is a wiring electrode. In the present invention, a semiconductor chip element (2) is mounted on a concave flat surface. A carrier substrate (1) and a laminated dielectric substrate (3) having a plurality of capacitors using internal electrodes (4) are made as independent substrates, and finally both substrates (1) and (3) are integrated. It is characterized by configuring a functional circuit device. Next, each board will be explained in detail. Alumina is generally used as the carrier group. In the present invention, the alumina substrate has a concave structure. This shape can also be considered as a chip carrier formed by laminating three layers.

In this example, from the viewpoint of cost, a concave alumina substrate is obtained by forming an electrode pattern on a single green sheet in advance, processing it into a concave shape by drawing, etc., and firing it at a temperature of 1500 to 1600°C. Use. In this case, since tungsten and molybdenum are mainly used as electrodes, the bonding pad is plated with M
etc. will be provided. Pads for semiconductor chip mounting and bonding pads are provided in the recessed portion (la) of the concave carrier substrate (1) thus made, so that the semiconductor chip element (2) can be used for die bonding or wire bonding. Implemented by bonding technology. Thereafter, from the viewpoint of reliability, sealing is generally performed using a sealing resin (5). This is a circuit that does not include a resistor, but next we will explain the case that a resistor is included. Electrode pattern (6)
A resistor element is formed using thick film or thin film technology on the convex portion of the carrier substrate (1) on which the semiconductor chip element (2) is formed, that is, on the surface opposite to the surface on which the semiconductor chip element (2) is mounted. The resistance value is trimmed to the designed value using a YAG laser, sandblasting, etc. Thereafter, the semiconductor chip element (2) is mounted using the method described above.

An IC board or a TC-resistance board is completed by these methods. In order to function as a carrier substrate (1), it is necessary to connect with a laminated dielectric substrate and a printed circuit board, which will be described later, and therefore, lead-out terminals for electrical connection are provided on the four edge surfaces. In this embodiment, the number of terminal electrodes is 20 terminals in total with 5 terminals on each side, but this can be set arbitrarily from the design point of view.

Next, the laminated dielectric substrate (3) will be explained based on FIG. 2. In FIG. 2, (8) indicates a dielectric layer, and (9) indicates a lead-out terminal electrode. Generally, the bond-shaped dielectric substrate (3) is produced using a green sheet construction method or a printing method. The materials used are BaTiO3-based and 'l'i03-based materials, taking into consideration high dielectric constant characteristics, temperature characteristics, etc. The green sheet construction method and printing method are created by alternately laminating dielectric layers (8) and internal electrodes (4) and firing them at 1300 to 1400°C. The internal electrodes (4) are formed using a patterned plate to form a plurality of capacitors, and the internal electrodes (11m) need to be formed alternately by a printing method. It is connected to the electrode (9). In this example, the number of built-in capacitors is 6, and the cap used in the circuit has 9 terminals. If there is no practical problem, the other terminals are connected to the carrier board ( 1) It is advantageous if there is a strong connection with 1). Also, it is necessary to eliminate it when stray capacitance becomes a problem. Since there are many things that can be connected, the number of terminals and poles can generally be less than twice the number of capacitors.This reduces the number of required terminals and increases the reliability of the connections compared to using individual chip capacitors. In addition to exhibiting the effect of increasing performance, it is also advantageous in terms of management since a plurality of capacitors are integrated into one block.

In this way, by standardizing the dimensions and shape of the laminated dielectric substrate (3), it was possible to standardize the marking equipment, and the large-scale tonosho became a square surface. As mentioned above, the carrier board (1) and the Tei-no-14 type current reader board (3) are high-density leadless GJ standardization modules that are manufactured independently and whose characteristics have been checked. Easy to automatically implement.

Next, a mounting method on a motherboard (printed circuit board) will be described based on FIG. In Figure 4, the scream is glue,
C1υ represents solder, and Q represents the motherboard (printed circuit board). The carrier substrate (1) and the laminated dielectric substrate (3) are the same as those shown in Figs. 3 and 2, and there is no adhesive between the patterned printed circuit board (2) and the carrier substrate (1). They are bonded using an adhesive OQ, and furthermore, the common adhesive substrate (1) and the layered dielectric substrate (3) are bonded using an adhesive aO. The reason why the carrier substrate (1) is placed on the printed circuit board (A) is because the substrate is superior in strength and the number of terminals of the semiconductor chip is larger than that of the semiconductor chip. After other electronic components to be mounted are also mounted on the printed circuit board O in this manner, they are dipped in solder to achieve terminal electrode interconnection between the respective boards (1) and (3) using the solder a◇. The above explained the method of sequentially bonding to the printed circuit board @, but in advance, the carrier board (1) and the laminated dielectric board (3) are bonded together, and then the printed circuit board (A) is attached all at once. May be joined. Since the properties of each group (1) and (3) are individually checked, products with uniform properties and excellent yield can be obtained. In addition, although the above explanation has been about a composite circuit device with two stacks, it is possible to further increase the number of stacks from this (7+! structure). By standardizing board dimensions and terminal electrodes, high density Yemi's functional circuit module is integrated into a single unit.This enables an excellent implementation method in terms of production management such as equipment automation and parts management.

Effects of the Invention As described above, according to the present invention, a composite circuit device can be easily manufactured with high yield, and can therefore be provided at low cost.

[Brief explanation of drawings]

The drawings show a practical example of the present invention; FIG. 1(a) is a plan view of a composite circuit device, 0>) is a sectional view, and FIG. 2(a) is a plan view of a stacked dielectric substrate. , (b) is a sectional view, FIG. 8 is a sectional view of the carrier board, and FIG. 4 is a sectional view of the state 1H in which the composite circuit device is mounted on the motherboard. (1)・Carrier base nucleus, (2)−・Half-49 body chip element, (3)・・Product nol? J-type dielectric substrate, (4)...Internal electrode, (5)...IζM 5(6)...Wiring electrode,
(7)...Resistor film, (8)...Dielectric layer, (separately) Output end pre-charge (lire, oO...adhesive, (1υ...solder, (6)...motherboard substitute Figure 2, Figure 3, Figure 4 of Yoshihiro Morimoto

Claims (1)

[Scope of Claims] 1. A carrier substrate in which a semiconductor chip is mounted in the recess of a concave insulating substrate having terminal electrodes, internal electrodes and dielectric layers are alternately laminated and sintered to have a plurality of capacitor functions. A composite circuit device in which a laminated dielectric substrate having lead-out terminal electrodes on the edge surface thereof is placed facing each other, and electrical connection of arbitrary terminal electrodes between the substrates is made by soldering. 2. A composite circuit device in which the terminal electrodes of a carrier board, a laminated dielectric board, and a printed wiring board are arranged facing each other, each board is mechanically fixed with adhesive, and then interconnections are made all at once by soldering. How to implement.