JPH02201940A - Interlayer insulating film and manufacture thereof - Google Patents

Abstract

PURPOSE:To form a contact hole from which a good step coverage can be obtained at all times by forming so that O atom components decrease as they move from the under layer of an interlayer insulating film (SiOxNy) to its upper layer and N atom components increase as they move from the lower layer to the upper layer. CONSTITUTION:An interlayer insulating film 2 is formed so that O atom components decrease as they move from its under layer to its upper layer, and N atom components increase as they move from the lower layer to the upper layer. When a contact hole 3 is formed, the upper layer of the interlayer insulating film 2 contains N atoms a lot, and the under layer contains O atoms a lot. Therefore, an etching rate is fast for the upper layer of the interlayer insulating film 2 than the under layer. As a result, the amount of etching of the upper layer to the under layer becomes larger. Thus, the cross sectional shape of the contact hole 3 can easily be formed into a tapered shape having a tapered corner from which a good step coverage can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interlayer insulating film in multilayer wiring of a semiconductor device and a method for manufacturing the same, and particularly relates to a film containing 5iOxN as a composition component and in which contact holes are formed.

[Conventional technology]

Conventionally, the method for forming contact holes in this type of interlayer insulating film is to apply a photoresist on an insulating film deposited by CVD, pattern the photoresist using lithography technology, and then wet A common method is to form a contact hole having a tapered cross section by etching, dry etching, or the like.

According to this contact hole forming method, there is no need to embed a VIA metal for connecting lower layer wiring and upper layer wiring in multilayer wiring at the small scale integrated circuit (SSI) or medium scale integrated circuit (MSI) level. It disappears. That is, since the contact hole formed in the insulating film by the above method has a tapered cross section, good step coverage can be easily formed by vapor depositing aluminum (1) or the like onto the contact hole.

Furthermore, by patterning this aluminum, it becomes possible to easily connect the lower layer wiring and the upper layer wiring, and the process of embedding the VIA metal is no longer necessary, and a semiconductor device can be manufactured using the above method. Costs are reduced.

[Problem to be solved by the invention]

However, in the above conventional method of forming contact holes in an interlayer insulating film, if wet etching such as chemical etching is used for the etching process of the insulating film, the cross-sectional shape of the resulting contact holes will vary, and Further, there was a problem in that the cross-section did not have a uniform tapered shape for each manufacturing lot. Furthermore, if dry etching using various gases is used in the etching process of the insulating film, the taper angle of the tapered cross section of the resulting contact hole approaches a right angle, making it impossible to obtain good step coverage. had.

[Means to solve the problem]

The present invention was made to solve this problem, and the interlayer insulating film is made of SfON with an acid content of y, and as it moves from the lower layer to the upper layer, the O atomic component decreases, and from the lower layer to the upper layer. It is formed such that the N atom component increases as the layer moves. In addition, the flow rate of the reactive gas containing 0 atoms is high at the beginning of deposition, and the flow rate decreases as time passes, and the flow rate of the reactive gas containing N atoms is almost constant at the beginning of deposition, and the flow rate increases as time passes. It is manufactured in such a way that

[Effect]

Regardless of the etching conditions, the interlayer insulating film is etched at a faster etching rate for the upper layer containing many N atoms than for the lower layer containing many zero atoms.

〔Example〕

Next, the present invention will be described in detail below with reference to the drawings.

FIGS. 1A and 1B are cross-sectional views showing one embodiment of the present invention.

SiOxNy on the substrate 1
An interlayer insulating film 2 consisting of y is deposited by CVD.

This deposition is performed under the following conditions.

In other words, the total pressure is 0.1 torr and the frequency is 50K.
Hz and power of 200 W, the S L H4 gas was applied for 270 seconds at the initial stage of deposition of the interlayer insulating film 2.

NH3 gas is 1.7sl+n, N20 gas is 0.15
Each gas is flowed onto the surface of the substrate 1 at a flow rate of 1 m.

After that, as time passes, the flow rate of N20 gas increases to the second level.
The flow rate decreases as shown by a straight line 5 in the graph of FIG. 2A, and at time T, which is the end of deposition of the interlayer insulating film 2, the flow rate reaches Oslm and stops flowing. In addition, on the contrary, the flow rate of N2 gas is O5ITI at the initial stage of deposition.
At , no gas was flowing, but as time passed, the gas increased as shown by straight line 6 in the graph of FIG. Become swept away.

Also, the total flow rate of each gas, N20 gas and N2 gas, is
As shown by the straight line 7 in the graph of FIG. 2(b), from the initial time to the end time T of the deposition of the interlayer insulating film 2,
A certain amount of 0. It is controlled to be 1 sla+. In addition, FIG. 2(a).

In each graph shown in (b), the horizontal axis represents the deposition time, and the vertical axis represents the gas flow rate.

In this way, the O atomic component of the interlayer insulating film 2 decreases as it moves from the lower layer to the upper layer, that is, as it moves away from the base 1, and the N atomic component increases as it moves from the lower layer to the upper layer. It is formed to do so. Therefore, the composition of the lower layer of the interlayer insulating film 2 is SiO (S
iO2No), and the composition of the middle layer is St
, 1. .

It is mainly composed of N, and the composition of the upper layer is Si1. It is mainly composed of O N (X-1, 0 to 1.3).

Next, after forming the interlayer insulating film 2, this interlayer insulating film 2 is
A photoresist (not shown) is applied thereon by a spin code method or the like, and this photoresist is patterned using a lithography technique.

After patterning, using this photoresist as a mask, dry etching is performed using a fluoride gas such as CF 2 or SF 6 to form a contact hole 3 .

When forming this contact hole 3, the interlayer insulating film 2
As mentioned above, the upper layer contains many N atoms, and the lower layer contains 0
Since it contains many atoms, the etching rate of the upper layer of the interlayer insulating film 2 is faster than that of the lower layer. Therefore, the amount of etching of the upper layer relative to the lower layer increases, and the cross-sectional shape of the contact hole 3 is easily formed into a tapered shape having a taper angle that provides good step coverage.

In the above embodiment, a case was described in which dry etching using a fluoride gas was employed in the etching process of the interlayer insulating film 2, but the present invention is not limited to this.

For example, wet etching such as chemical etching may be used to etch the interlayer insulating film 2. In this case as well, the same effect as in the above embodiment can be obtained, and the etching process can be performed on the entire wafer surface and in each manufacturing lot. A contact hole with a uniformly tapered cross section can be easily obtained.

〔Effect of the invention〕

As explained above, in the present invention, the interlayer insulating film is SiOxN
y as a composition component, the O atom component decreases as it moves from the lower layer to the upper layer, and the N atom component increases as it moves from the lower layer to the upper layer, so it also contains 0 atoms. The reaction gas has a high flow rate at the beginning of deposition and then decreases as time passes, and the reaction gas containing N atoms has almost no flow rate at the beginning of deposition and is manufactured so that its flow rate increases over time. As a result, the upper layer containing many N atoms is etched at a faster etching rate than the lower layer containing many O atoms.

Therefore, the cross-sectional shape of the contact hole formed by etching this interlayer insulating film is always uniformly tapered with an appropriate taper angle, regardless of the etching conditions of the interlayer insulating film, resulting in good step coverage. This has the effect that a contact hole is always formed.

Furthermore, there is also the effect that contact holes having a uniform tapered cross section are always formed over the entire wafer surface and in each manufacturing loft.

1...Base body, 2...Interlayer insulating film, 3...Contact hole.

Patent applicant: Sumitomo Electric Industries, Ltd. Representative patent attorney Yoshiki Hase
Salt 1) Tatsuya

[Brief explanation of the drawing]

FIGS. 1(a) and 1(b) are cross-sectional views showing one embodiment of the present invention, and FIGS. 2(a) and 2(b) are sectional views showing the state of formation of the interlayer insulating film 2 shown in FIG. It is a graph showing the relationship between deposition time and gas flow rate.

Claims (1)

[Claims] 1. In an interlayer insulating film interposed between an upper layer wiring and a lower layer wiring in a multilayer wiring of a semiconductor device, SiO_xN
An interlayer insulating film, characterized in that it has _y as a composition component, and is formed such that the O atomic component decreases as it moves from the lower layer to the upper layer, and the N atomic component increases as it moves from the lower layer to the upper layer. 2. A method for manufacturing an interlayer insulating film, which is interposed between an upper layer wiring and a lower layer wiring in a multilayer wiring of a semiconductor device and is formed by depositing an interlayer insulation film containing SiO_xN_y as a compositional component by a vapor phase growth method using a reactive gas. In the process, the flow rate of the reactive gas containing O atoms is high at the beginning of deposition, and the flow rate decreases as time passes, and the flow rate of the reactive gas containing N atoms is almost constant at the beginning of deposition, and then the flow rate increases as time passes. A method for manufacturing an interlayer insulating film, characterized in that the interlayer insulating film is deposited by controlling the flow rate of a reactive gas so as to