JPH02198169A - Manufacture of semiconductor memory device - Google Patents

Abstract

PURPOSE:To accurately form a groove having a high aspect ratio by forming an oxide film on the sidewall and bottom of a first groove, removing the oxide film on the bottom, then growing an epitaxial layer of the same conductivity type as that of a semiconductor substrate to bury the first groove, removing the oxide film of the sidewall, and forming a second groove. CONSTITUTION:An oxide film 11 is formed on the sidewall and bottom of a first groove 10, the oxide film of the bottom is then removed, an epitaxial layer 13 of the same conductivity type as that of a semiconductor substrate 11 is grown to bury it, the oxide film 11 remaining on the sidewall is removed, and a loop-like second groove 14 is formed. Since the second groove 14 is formed not by etching but by removing the oxide film 11, a groove having high aspect ratio can accurately be formed if the thickness of the oxide film 11 is merely accurately controlled. Thus, the integration of a semiconductor memory device can be enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor memory device, particularly to a method for manufacturing a semiconductor memory device.
The present invention relates to a method of manufacturing a trench cell capacitor for a type 3 memory device.

[Conventional technology]

In recent years, as MO3 type memory devices have become more highly integrated, element miniaturization technology has progressed further, and in large-capacity DRAMs, in order to achieve miniaturization of memory cells, grooves called trenches are formed in semiconductor substrates. , a method of constructing a capacitor using the inner wall of this groove is being adopted.

FIG. 2 shows a method of manufacturing such a conventional trench cell capacitor for an MO3 type memory device.

First, as shown in FIG. 2 (al), a P-type epitaxial layer 2 is grown on the surface of a P-type semiconductor substrate 1. Then, a field oxide film 3 is selectively formed on the surface of the epitaxial layer 2 by a well-known method. After that, a CVD oxide film 4 is deposited on the entire surface of the epitaxial layer 2 and the field oxide film 3. Next, a resist (not shown) is applied to the surface of the CVD oxide film 4, and after patterning the resist, etching is performed. The CVD oxide film 4 is removed in a predetermined shape (in this example, a square loop shape).
As a mask, use fluorine (F) or chlorine (C1)
A loop-shaped groove 5 is formed in the epitaxial layer 2 by performing anisotropic dry etching using a system gas. Then, the entire CVD oxide film 4 is removed by etching.

Next, as shown in FIG. A dielectric film 7 is formed on the surface of the epitaxial layer 2 except for the surface of the epitaxial layer 2.Finally, a polycrystalline silicon lI!8 containing phosphorus is formed on the surface of the dielectric film 7 and the field oxide film 3.This polycrystalline silicon film 8 is formed so as to fill the entire inside of the groove 5.

In this way, a trench cell capacitor is formed on the sidewalls and bottom of the trench 5, with the N' layer 6 as the first electrode and the polycrystalline silicon film 8 as the second electrode.

[Problem to be solved by the invention]

However, in such conventional semiconductor memory device manufacturing methods, the aspect ratio (depth/aperture width) of 45 is particularly limited.
If the value is high, there is a problem that it is difficult to form the groove 5 accurately. For example, DRAM of 4M bits or more
In this case, the opening width of groove 5 is 0.9 to 1.0 microns,
The depth is often designed to be about 4±1 micron (in this case, the aspect ratio is 5 or more).

When such a C5 is formed by anisotropic dry etching, the center of the side wall of the groove 5 expands toward the outside of the C5 during the etching process, resulting in a so-called "bowing" in which the cross section of the C5 becomes spindle-shaped. A phenomenon called occurs. When 1115 is deformed in this way, the expected capacitance value cannot be obtained.

Furthermore, if trenches as deep as 4 to 5 microns are continued to be dug by anisotropic dry etching, the sidewalls of the trenches 5 will become rough during the etching process, and the trenches will become rough from the bottom of the trenches 5 toward the P-type semiconductor substrate 1 side. A sharp cut occurs. When the side wall portion becomes rough, pinholes are likely to occur in the dielectric film 7, and the withstand voltage of the dielectric film 7 deteriorates. Furthermore, if a sharp cut occurs around the bottom, the electric field will concentrate in this part, making it impossible to suppress leakage current between adjacent trench cell capacitors.

Therefore, a first object of the present invention is to provide a method for manufacturing a semiconductor memory device that can form trenches with high aspect ratios with high precision.

A second object of the present invention is to form trenches without causing roughness on the sidewalls or cuts around the bottom, thereby increasing the withstand voltage of the dielectric film and reducing leakage current between adjacent trench cell capacitors. An object of the present invention is to provide a method for manufacturing a semiconductor memory device that can suppress the amount of noise.

[Means to solve the problem]

The method for manufacturing a semiconductor memory device according to the present invention includes the steps of: - After drilling a substantially perpendicular first groove in a conductive type semiconductor substrate, an oxide film is formed on the sidewalls and bottom of the first groove. and,
forming a silicon nitride film on the oxide film on the side wall of the first trench, and using the silicon nitride film as a mask, removing the oxide film at the bottom of the first trench by anisotropic dry etching; After removing the silicon nitride film, the first
growing an epitaxial layer of the same conductivity type as the semiconductor substrate in the groove to fill the first groove with this epitaxial layer; and removing the oxide film remaining on the sidewalls of the first groove to form a loop. forming a second groove having a shape.

[For production]

According to this invention, a loop-shaped second groove is formed by removing the oxide film remaining on the side wall of the first groove, and a trench capacitor can be manufactured using this second groove. The second groove is not formed by etching,
Unlike the conventional method of forming grooves by etching, it is possible to form grooves with a high aspect ratio by precisely controlling the thickness of the oxide film (which is actually possible). can be configured with high precision. Further, since no roughening of the sidewalls or cuts around the bottom due to etching occur, the withstand voltage of the dielectric film can be increased and leakage current between adjacent trench cell capacitors can be suppressed.

〔Example〕

A method of manufacturing an MO3 type memory device according to an embodiment of the present invention will be explained based on the step-by-step sectional views shown in FIGS. 1(a) to 1(e).

First, as shown in FIG. 1 (al), a P-type epitaxial layer 2 is grown on a P-type semiconductor substrate 1.

A CVD oxide film 9 is deposited on the entire surface of this epitaxial layer 2. After applying a resist (not shown) to the surface of this CVD oxide film 9 and buttering the resist, the CVD oxide film 9 is etched into a predetermined shape (in this example, a square or rectangle with a side of approximately 3 to 5 microns). ) to be removed. Thereafter, by using the CVD oxide film 9 as a mask and performing anisotropic dry etching using a fluorine (F)-based or chlorine (CI-based gas), a rectangular parallelepiped-shaped first groove 10 is formed in the epitaxial layer 2. Drill the first groove 10.
If the depth of the opening is about 4±1 micron, the opening width is 3 to 5
Since it is about microns, the aspect ratio of the first groove 10 is about 1. Therefore, even if the first groove 10 is formed by anisotropic dry etching, the powing phenomenon does not occur, and the first groove 410 can be formed as designed.

Note that if the aspect ratio is 5 or less, the first groove 10 can be formed accurately.

Next, the first alO
Oxide 11111 with a thickness of about 5000 to 8000 angstroms is formed on the sidewalls and bottom of the wafer.

This oxide film 11 is a portion that is ultimately removed to form a second trench that constitutes a trench cell capacitor. Therefore, it is desirable to control the thickness of the oxide film 11 as accurately as possible. When forming the oxide film 11 by thermal oxidation, the film thickness is precisely controlled on the order of submicrons by changing the oxidation temperature and oxidation time. be able to. Therefore, the opening width of the finally obtained second groove can also be determined accurately.

In addition to the thermal oxidation method, for example, the oxide film 1 can be formed by the CVD method.
In this case as well, the thickness of the oxide film 11 can be accurately controlled as long as the conditions are sufficiently controlled. Note that the inner surface of the oxide film 11 is the inner wall surface of the first trench 10 (as shown in FIG. 1(a)), as shown in FIG.
)) Extends slightly further inward.

Next, a silicon nitride film 12 is deposited on the entire surface of the oxide film 11 and the CVD oxide film 9 at a density of 500 to 100% by low pressure CVD.
Deposited to a thickness of 0.00 angstroms. Next, this silicon nitride film 12 is selectively removed by anisotropic dry etching, and the silicon nitride film 11!12 is etched as shown in FIG.
As shown in b), the CVD oxide film 9 and the oxide film 11 are left only on their sidewalls.

Note that if the silicon nitride film 12 is too thick, when the oxide film 11 at the bottom of the first 1llIO layer is removed by anisotropic dry etching to be described later, the oxide film 11 at the side wall of the first groove 10 will be removed.
A step is formed on the surface of the groove 1, and a step is formed inside the finally obtained second groove. In order to avoid this, it is desirable to set the thickness of the silicon nitride film 12 to 1/10 or less of the thickness of the oxide film 11.

Next, as shown in FIG. 1 (C1), a silicon nitride film 1 is
2 as a mask, the oxide film 11 is left only on the side walls of the first trench 10 by anisotropic dry etching. next,
The silicon nitride film 12 is removed using phosphoric acid (160° C.). Then, by low-pressure epitaxial growth method, hydrogen was used as a carrier gas and dichlorosilane was used as a raw material gas.
A P3 type epitaxial layer (P'' layer) 13 with a boron concentration of lXl0" to Ix10" cm-3 was formed using (SiHzClz) and Diporan (B!H&) at a temperature of about 1000 to 1100°C. The oxide film is grown on the bottom of the first trench 10 and the entire surface of the oxide film 11, completely filling the first trench 10.

Note that the P'' type epitaxial layer 13 may be grown by a photo-CVD method or a plasma CVD method using an excimer laser or the like.

Next, the CVD oxide film 9 and the oxide film 1 are removed using a hydrofluoric acid solution.
1 is removed by etching to form a loop-shaped second 414 as shown in FIG. 1 fd+. This second groove 14 is formed by removing the oxide film 11 as described above, and has a depth of 4±1 microns and an opening width of 0.5 microns.
It has a high aspect ratio of about 5 to 0.8 microns, and since the oxide film 11 is controlled to have a uniform film thickness by thermal oxidation method, CVD method, etc., it is formed by removing the oxide film 11. Loop-shaped second groove 14
The width of the opening is also uniform from the opening to the bottom.

Therefore, according to this embodiment, the shape of the second groove 14 constituting the trench cell capacitor can be controlled extremely accurately, and a fine groove with a high aspect ratio can be formed accurately. In addition, in conventional anisotropic dry etching, it was difficult to control the shape when the aspect ratio was 5 or more, but according to the method of this example,
This is particularly effective when forming grooves with an aspect ratio of 5 or more.

Next, as shown in FIG.
4 and between adjacent second grooves 14. Then, a shallow N' layer 16 is formed by diffusion on the sidewalls and bottom of the second groove 14, and the surface of the N' layer 16 and the surface of the epitaxial layer 2 and the P' type epitaxial layer 13 except for the field oxide film 15 are formed. Dielectric film 17
form. Finally, a polycrystalline silicon film 18 containing phosphorus is placed on the surface of the dielectric film 17 and the field oxide 11115.
form. This polycrystalline silicon film 18 is
It is formed to fill the entire interior of 4.

In this way, on the side wall and bottom of the second groove 14,
The N′″ layer 16 is used as the first electrode, and the polycrystalline silicon film 18
A trench capacitor is formed using the second electrode as the second electrode.

〔Effect of the invention〕

According to the method for manufacturing a semiconductor memory device of the present invention, fine grooves with a high aspect ratio can be accurately formed, so that the degree of integration of the semiconductor memory device can be greatly increased. Moreover, unlike the conventional method using anisotropic dry etching, the sidewalls of the grooves will not be roughened or sharp cuts will occur around the bottom of the grooves. leakage current can be suppressed, and the characteristics of the trench cell capacitor can be dramatically improved.

[Brief explanation of the drawing]

Figure 1 +al~! 81 is a sectional view illustrating a method for manufacturing a semiconductor memory device according to an embodiment of the present invention in the order of steps;
Figure iM+ (bl is a cross-sectional view showing the conventional method for manufacturing a semiconductor memory device in order of steps. 1... Semiconductor substrate, 2... Epitaxial layer, 9...
...CVD oxide film, 10...first groove, 11...oxide film, 12...silicon nitride film, 13...P'' type epitaxial layer, 14...second groove, 15 ...Field oxide film, 16...N layer, 17...Dielectric film, 18...Polycrystalline silicon film.

Claims (1)

[Claims] After drilling a substantially perpendicular first trench in a semiconductor substrate of one conductivity type, forming an oxide film on the sidewalls and bottom of the first trench; Forming a silicon nitride film on the oxide film, using the silicon nitride film as a mask,
removing the oxide film at the bottom of the first trench by anisotropic etching; and after removing the silicon nitride film, growing an epitaxial layer of the same conductivity type as the semiconductor substrate in the first trench. filling the first trench with the epitaxial layer; and removing an oxide film remaining on the sidewalls of the first trench to form a loop-shaped second trench. Production method.