JPH02192126A - Epitaxial deposition - Google Patents

Epitaxial deposition

Info

Publication number
JPH02192126A
JPH02192126A JP994989A JP994989A JPH02192126A JP H02192126 A JPH02192126 A JP H02192126A JP 994989 A JP994989 A JP 994989A JP 994989 A JP994989 A JP 994989A JP H02192126 A JPH02192126 A JP H02192126A
Authority
JP
Japan
Prior art keywords
substrate
gaas
layer
epitaxial growth
epitaxial deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP994989A
Other languages
Japanese (ja)
Other versions
JP2586626B2 (en
Inventor
Yoshinari Matsumoto
松本 良成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1009949A priority Critical patent/JP2586626B2/en
Publication of JPH02192126A publication Critical patent/JPH02192126A/en
Application granted granted Critical
Publication of JP2586626B2 publication Critical patent/JP2586626B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To manufacture wafers having no interfacial transition layer in excellent reproducibility by a method wherein the substrate surface is exposed to a yellow ammonium sulfide solution and then heat-treated successively. CONSTITUTION:A semiinsulating GaAs substrate 11 is etched away by adopting a standard processing means of GaAs. Next, the residual natural oxide film on the surface after etching process is removed by immersing the whole body in HCl solution for around one minute and then immediately washed and dried up by N2 blowing process. Next, the surface is sulfurized. For the sulphatization, the substrate 1 is immersed in (NH4)2Sx solution prepared in a vessel capable of being sealed to be sealed up and left as it is. Later, a sulfide in around monoatomic layer degree is deposited on the substrate surface by heat-treating the surface at the temperature exceeding 100 deg.C. Later, the semiinsulating GaAs substrate 11 is mounted on an ordinary epitaxial device so as to form an epitaxial deposition layer 12. Through these procedures, wafers having no layers in abnormal carrier concentration on the interface between the epitaxial deposition layer and the GaAs substrate can be manufactured in excellent reproducibility.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体のエピタキシャル成長方法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for epitaxial growth of semiconductors.

[従来の技術] 半々体技術では基板の上にエピタキシャル成長する技術
が広く用いられる。例えばQaASを基板とするAR1
−x GaxAs/GaAsダブル・ヘテロ・レーザの
製作や、その他GaAS電界効果トランジスタ(以後、
MESFETと称する)のソースとドレイン電極下の高
電子濃度層の製作などに用いられることは良く知られて
いる。
[Prior Art] In the half-half technique, a technique of epitaxial growth on a substrate is widely used. For example, AR1 with QaAS as a substrate
-x Fabrication of GaxAs/GaAs double hetero lasers and other GaAS field effect transistors (hereinafter referred to as
It is well known that it is used to fabricate high electron concentration layers under the source and drain electrodes of MESFETs.

[発明が解決しようとする課題] こうしたエピタキシャル成長の場合にしばしば問題とな
ることに、基板結晶とエピタキシャル層の界面で、所望
のキャリア濃度とは異′なる、いわゆる界面遷移層が発
生するということか挙げられる。例えば第1図に示すよ
うに、GaAs基板11の上にGaAs層12をエピタ
キシャル成長した場合に、エピタキシャル成長層12の
厚さ方向のキャリア分布は、従来技術によるならば、第
2図中破線1で示すようになる。すなわら、同図かられ
かるように、GaAS基板11に近いところでキャリア
濃度の著しい低下部21が見られ、これが界面遷移層と
言われている。この原因は未だ十分に把握されていない
が、基板中に存在する深い準位を構成する不純物、化合
物半導体では化学量論的な欠陥、表面の酸化物あるいは
基板表面に付着した不純物によるものであるとの説があ
る。いずれの説も場合に応じて起こりうるちのであるが
、大いに困ったことに、基板界面近傍におけるキャリア
濃度の著しい低下は、ダブル・ヘテロ・レーザの場合に
は直列抵抗の増大に基づく熱の発生、強いては閾値電流
の増加をもたらし、MESFEHの場合にはソースとト
レイン間の抵抗増により高周波特性を阻害する原因とな
る。
[Problems to be Solved by the Invention] A problem that often arises in such epitaxial growth is that a so-called interfacial transition layer, which has a carrier concentration different from the desired one, occurs at the interface between the substrate crystal and the epitaxial layer. Can be mentioned. For example, as shown in FIG. 1, when a GaAs layer 12 is epitaxially grown on a GaAs substrate 11, the carrier distribution in the thickness direction of the epitaxially grown layer 12 is as shown by the broken line 1 in FIG. It becomes like this. In other words, as can be seen from the figure, a region 21 in which the carrier concentration is significantly reduced is seen near the GaAS substrate 11, and this is called an interfacial transition layer. The cause of this is not yet fully understood, but it is believed to be due to impurities that constitute deep levels existing in the substrate, stoichiometric defects in compound semiconductors, oxides on the surface, or impurities attached to the substrate surface. There is a theory that Both theories can occur depending on the case, but the great problem is that the significant drop in carrier concentration near the substrate interface is caused by the generation of heat due to the increase in series resistance in the case of double hetero lasers. In the case of MESFEH, this increases the resistance between the source and the train, which impedes high frequency characteristics.

本発明の目的は、基板結晶とエピタキシャル層の界面近
傍における界面遷移層の発生を防止するのに有効なエピ
タキシャル成長方法を提供することにある。
An object of the present invention is to provide an epitaxial growth method that is effective in preventing the formation of an interfacial transition layer near the interface between a substrate crystal and an epitaxial layer.

[課題を解決するための手段] 本発明は、エピタキシャル成長を行うべき基板表面を黄
色硫化アンモニウム液に曝し、次いで該基板表面を10
0℃以上で熱処理した後、前記基板表面にエピタキシャ
ル成長させてなることを特徴とするエピタキシャル成長
方法である。
[Means for Solving the Problems] The present invention exposes the surface of a substrate on which epitaxial growth is to be performed to a yellow ammonium sulfide solution, and then
This epitaxial growth method is characterized in that epitaxial growth is performed on the surface of the substrate after heat treatment at 0° C. or higher.

本発明において、エピタキシャル成長を行うべき基板と
しては、GaAs、InP、InAs。
In the present invention, the substrate on which epitaxial growth is to be performed is GaAs, InP, and InAs.

Garb、その他多くの材料を挙げることができ、例え
ばl r+QaAs/I nP系のへテロ構造アバラン
シェフォトダイオードなどの製作歩留まり向上に大いに
役立つものである。
Garb, and many other materials can be mentioned, which are of great help in improving the production yield of, for example, l r+QaAs/I nP-based heterostructure avalanche photodiodes.

[作用] 以下、本発明の作用について、GaAs基板−Lへのエ
ピタキシャル成長を例にとって説明する。
[Function] Hereinafter, the function of the present invention will be explained by taking epitaxial growth onto a GaAs substrate-L as an example.

GaAs基板表面を黄色硫化アンモニウム液に曝す工程
では、GaAs表面は1時間当たり3.9人エツチング
されることが解っており、その後、基板表面を100’
C以上で熱処理することにより、基板表面には1原子層
程度の硫化物か存在する。
It is known that in the process of exposing the GaAs substrate surface to a yellow ammonium sulfide solution, the GaAs surface is etched 3.9 times per hour.
By heat treatment at C or higher, about one atomic layer of sulfide is present on the substrate surface.

この時、酸素と化学結合したQaヤ△Sは存在せず、ま
たこうした表面をたとえ空気中に露呈したとしても検出
される酸素は100℃以上に真空中で加熱することで容
易になくなることが光電子分光法で児い出された。
At this time, there is no Qa or ΔS chemically bonded to oxygen, and even if such a surface is exposed to the air, the detected oxygen will not be easily eliminated by heating it in a vacuum to 100°C or higher. The baby was born using photoelectron spectroscopy.

エピタキシャル成長前のGaAs基板を約60℃のH2
804:H202:H20=3: 1 : 1(容積比
)の溶液でエツチングするという通常の表面処理方法で
は、エツチング後の表面にはQaやAsの酸化物が存在
し、しかもこの酸化物を取り除くには真空中で約550
℃程度に昇温する必要があるのと比べて大きな違いであ
る。すなわち、本発明においては熱処理を施したウェー
ハ表面には酸化状態が存在しない。
The GaAs substrate before epitaxial growth is exposed to H2 at approximately 60°C.
In the usual surface treatment method of etching with a solution of 804:H202:H20=3:1:1 (volume ratio), oxides of Qa and As exist on the surface after etching, and it is necessary to remove these oxides. Approximately 550 min in vacuum
This is a big difference compared to the need to raise the temperature to about ℃. That is, in the present invention, no oxidation state exists on the surface of the wafer that has been subjected to heat treatment.

このため、熱処理後のGaAs基板上にエピタキシャル
成長した成長層では第2図の実線2で示すキャリア濃度
分布のようになり、エピタキシャル成長層とGaAs基
板界面にしばしば存在するキャリア濃度の異常層の存在
しないウェーハを再現性良く製作することができる。
For this reason, the growth layer epitaxially grown on the GaAs substrate after heat treatment has a carrier concentration distribution as shown by solid line 2 in FIG. can be manufactured with good reproducibility.

[実施例] 以下、本発明の実施例について図面を参照して詳細に説
明する。
[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

実施例としては、第1図に示すような半絶縁性GaAs
基板11の上に電子濃度1016cm−3のn型エピタ
キシャル成長層12を0.5朗厚で形成する場合ついて
示ず。
As an example, semi-insulating GaAs as shown in FIG.
A case where an n-type epitaxial growth layer 12 with an electron concentration of 1016 cm-3 is formed to a thickness of 0.5 cm on the substrate 11 is not shown.

まず、半絶縁性GaAs基板11を標準的なGaAsの
処理手段によりエツチングを施す。すなわち、GaAs
基板11を約60’CのH2SO4:H202:H20
=3: 1 : 1 (容積比〉のエツチング液により
1分間のエツチングを行い、水洗する。次にエツチング
後の表面に残留覆る自然酸化膜をHCl液に約1分間浸
すことで除去し、すみやかに水洗、N2ブローによる乾
燥を行う。
First, the semi-insulating GaAs substrate 11 is etched using standard GaAs processing means. That is, GaAs
The substrate 11 is heated to about 60'C H2SO4:H202:H20
Etch for 1 minute with an etching solution of =3: 1: 1 (volume ratio) and wash with water.Next, remove the natural oxide film remaining on the surface after etching by immersing it in HCl solution for about 1 minute, and then rinse immediately. Wash with water and dry with N2 blow.

次に表面の硫化処理を行う。これは密閉可能な容器に用
意した( N H4) 2 S x液に基板を浸し、容
器を密閉放置する。本実施例では1日から10日程放置
後、基板面へのN2ブローによる( N H4) 2 
S X液の除去を行う。次に簡単な真空容器内で基板面
温度を200’Cにして約5分放置する。
Next, the surface is sulfurized. For this purpose, the substrate is immersed in a (NH4) 2 S x solution prepared in a sealable container, and the container is left sealed. In this example, after leaving it for 1 to 10 days, the substrate surface was exposed to (N H4) 2 by N2 blowing.
Remove the S X liquid. Next, the substrate surface temperature was set to 200'C in a simple vacuum container and left for about 5 minutes.

この後、通常のエピタキシャル装置に半絶縁性GaAs
基板11を設置してエピタキシャル成長に入る。実施例
においては分子線エピタキシャル成長でエピタキシャル
成長層12を形成した。
After this, semi-insulating GaAs was fabricated in a normal epitaxial device.
A substrate 11 is installed and epitaxial growth begins. In the example, the epitaxial growth layer 12 was formed by molecular beam epitaxial growth.

以上のようにしてエピタキシャル成長させたエピタキシ
ャル成長層12のキャリア濃度は、第2図において実線
2で示すように、その厚さ方向に一定の値をとり、従来
例のように異常層の存在しないものであった。
The carrier concentration of the epitaxially grown layer 12 epitaxially grown as described above takes a constant value in the thickness direction, as shown by the solid line 2 in FIG. 2, and there is no abnormal layer as in the conventional example. there were.

[発明の効果] 以上説明したように、本発明によれば、基板結晶とエピ
タキシャル成長層の界面において、界面遷移層の存在し
ないウェーハを再現性よく製作することかできる。この
技術を用いると基板と接したエピタキシャル層での界面
遷移層の問題がなくなり、ダブル・ヘテロ・レーザなど
の場合には直列抵抗の増大に基づく熱の発生や、強いて
は閾値電流の増加などの問題がなくなる。特に基板表面
に凹凸を設けたダブル・ヘテロ・レーザ・ウェーへの製
作歩留まりも格段に上昇する。また、MESFETの場
合にはソースとトレイン間の抵抗増の問題を回避でき、
歩昭まり良く高周波特性の優れた素子を製作することが
できる。
[Effects of the Invention] As described above, according to the present invention, a wafer without an interfacial transition layer at the interface between the substrate crystal and the epitaxial growth layer can be manufactured with good reproducibility. Using this technology eliminates the problem of interfacial transition layers in the epitaxial layer in contact with the substrate, and in the case of double hetero lasers, heat generation due to increased series resistance and even increased threshold current occur. The problem disappears. In particular, the manufacturing yield of double hetero laser wafers with irregularities on the substrate surface is significantly increased. In addition, in the case of MESFET, the problem of increased resistance between the source and the train can be avoided,
It is possible to fabricate a device with good stability and excellent high frequency characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の方法によって得られたエピタキシャル
成長層の一例の断面図、第2図は本発明の方法によって
得られたエピタキシャル成長層の一例の基板からの距離
とキャリア濃度との関係を従来例による場合と比較して
示した特性図である。 11・G a A s基板 12・・・エピタキシャル成長層
FIG. 1 is a cross-sectional view of an example of an epitaxially grown layer obtained by the method of the present invention, and FIG. 2 is a conventional example of the relationship between the distance from the substrate and the carrier concentration of an example of the epitaxially grown layer obtained by the method of the present invention. It is a characteristic diagram shown in comparison with the case according to. 11.G a As substrate 12...Epitaxial growth layer

Claims (1)

【特許請求の範囲】[Claims] (1)エピタキシャル成長を行うべき基板表面を黄色硫
化アンモニウム液に曝し、次いで該基板表面を100℃
以上で熱処理した後、前記基板表面にエピタキシャル成
長させてなることを特徴とするエピタキシャル成長方法
(1) The surface of the substrate on which epitaxial growth is to be performed is exposed to a yellow ammonium sulfide solution, and then the surface of the substrate is heated to 100°C.
An epitaxial growth method characterized in that after the above heat treatment, epitaxial growth is performed on the surface of the substrate.
JP1009949A 1989-01-20 1989-01-20 Epitaxial growth method Expired - Lifetime JP2586626B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1009949A JP2586626B2 (en) 1989-01-20 1989-01-20 Epitaxial growth method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1009949A JP2586626B2 (en) 1989-01-20 1989-01-20 Epitaxial growth method

Publications (2)

Publication Number Publication Date
JPH02192126A true JPH02192126A (en) 1990-07-27
JP2586626B2 JP2586626B2 (en) 1997-03-05

Family

ID=11734229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1009949A Expired - Lifetime JP2586626B2 (en) 1989-01-20 1989-01-20 Epitaxial growth method

Country Status (1)

Country Link
JP (1) JP2586626B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04312915A (en) * 1991-03-27 1992-11-04 A T R Koudenpa Tsushin Kenkyusho:Kk Surface treatment of gaas(111) a-plane substrate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648613A (en) * 1987-06-18 1989-01-12 Ibm Construction of compound semiconductor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS648613A (en) * 1987-06-18 1989-01-12 Ibm Construction of compound semiconductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04312915A (en) * 1991-03-27 1992-11-04 A T R Koudenpa Tsushin Kenkyusho:Kk Surface treatment of gaas(111) a-plane substrate

Also Published As

Publication number Publication date
JP2586626B2 (en) 1997-03-05

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