JPH0218986A - Manufacture of flexible printed wiring board - Google Patents

Manufacture of flexible printed wiring board

Info

Publication number
JPH0218986A
JPH0218986A JP16972188A JP16972188A JPH0218986A JP H0218986 A JPH0218986 A JP H0218986A JP 16972188 A JP16972188 A JP 16972188A JP 16972188 A JP16972188 A JP 16972188A JP H0218986 A JPH0218986 A JP H0218986A
Authority
JP
Japan
Prior art keywords
polyimide
etching
conductor
conductor wirings
insulating coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16972188A
Other languages
Japanese (ja)
Inventor
Hideki Hanehiro
羽広 秀樹
Masatoshi Yoshida
正俊 吉田
Kazuyuki Tazawa
田澤 和幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP16972188A priority Critical patent/JPH0218986A/en
Publication of JPH0218986A publication Critical patent/JPH0218986A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the accuracy of the etching of a polyimide insulating coating, and to shorten the etching time by directly forming the polyimide insulating coating onto a plurality of conductor wirings without using adhesives in the polyimide insulating coating. CONSTITUTION:The unnecessary sections of the conductor layer 5 of a base material composed of a support film layer 1, the conductor layer 5 and an adhesive layer 3 are removed through etching to shape a plurality of conductor wirings 2, the whole surface on the side, on which a plurality of the conductor wirings 2 are formed, is coated with a polyamide acid solution or a polyimide solution to shape a polyimide insulating coating 6, and sections required for connecting a plurality of the conductor wirings 2 are gotten rid of by a polyimide etchant. Consequently, adhesives for bonding the polyimide insulating coating 6 are not used, and the polyimide insulating coating 6 is formed directly onto a plurality of the conductor wirings 2. Accordingly, the accuracy of the etching of the polyimide insulating coating 6 is improved, and the etching time can be shortened.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、接着剤を用いないポリイミド絶縁被覆を有す
るフレキシブル印刷配線板の製造法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a flexible printed wiring board having a polyimide insulation coating without using an adhesive.

(従来の技術) 近年、電子機器の小型、軽量、多様化に伴い、薄く軽量
でフレキシビリティの高いフレキシブル印刷配線板(以
下FPCという。)が多用されてきている。
(Prior Art) In recent years, as electronic devices have become smaller, lighter, and more diverse, flexible printed wiring boards (hereinafter referred to as FPCs), which are thin, lightweight, and highly flexible, have come into widespread use.

従来のFPCは、第4図a −cに示すように、導体層
5と支持フィルム1とを接着剤層3によって接着した基
材を用い(第4図a)、導体層5の不要な部分をエツチ
ング除去し複数の導体層&?t 2を形成しく第4図b
)、絶縁フィルム7に接着剤層8を形成したものの複数
の導体配線2の接続に必要な部分に該当する位置に金型
やドリルによって加工された窓を形成したものを重ね合
わせ、加熱加圧し積層一体化して配線板(第4図C)と
している。さらに、FPCに使用される支持フィルム1
及び絶縁フィルム7は、耐熱性の高いポリイミドフィル
ムが多く、ポリイミドの湿度による寸法変化、加工時の
圧力による寸法変化及び加工時のプレス積層時に生じる
接着剤のしみたしが高密度配線の妨げとなるため、第5
図a % Cに示すように、ポリイミド絶縁フィルム7
に接着剤層8を形成したものを、複数の導体配線2が接
着剤層3によって支持フィルム2の上に支持された配線
板の全面に重ね積層一体化した(第5図a、b)後、複
数の導体配線2の接続に必要な部分に該当する位置のポ
リイミド絶縁フィルム7と接着剤層8をポリイミドエツ
チング溶液でエツチング除去して配線板(第5図C)と
する方法が、特開昭62−113494号公報に示され
ている。
As shown in FIGS. 4a-c, the conventional FPC uses a base material in which a conductor layer 5 and a support film 1 are bonded together with an adhesive layer 3 (FIG. 4a), and unnecessary portions of the conductor layer 5 are removed. Etching and removing multiple conductor layers &? Figure 4b to form t2
), an insulating film 7 with an adhesive layer 8 formed thereon, but with windows processed by a mold or a drill formed in the positions corresponding to the parts necessary for connecting the plurality of conductor wirings 2, is overlapped and heated and pressurized. They are laminated and integrated to form a wiring board (Fig. 4C). Furthermore, support film 1 used for FPC
The insulation film 7 is often made of a highly heat-resistant polyimide film, and dimensional changes due to humidity in polyimide, dimensional changes due to pressure during processing, and adhesive stains that occur during press lamination during processing may impede high-density wiring. To become, the fifth
As shown in Figure a%C, polyimide insulation film 7
After a plurality of conductor wirings 2 are laminated and integrated over the entire surface of the wiring board supported on the support film 2 by the adhesive layer 3 (Fig. 5 a, b). , a method of forming a wiring board (FIG. 5C) by etching away polyimide insulating film 7 and adhesive layer 8 at positions corresponding to the parts necessary for connecting a plurality of conductor wirings 2 with a polyimide etching solution is disclosed in Japanese Patent Application Laid-open No. It is shown in Publication No. 113494/1982.

〈発明が解決しようとする課題) 従来の方法によって、ポリイミドフィルム絶縁被覆の寸
法精度低下や接着剤のしみだしを抑制することはできる
が、ポリイミドエツチング溶液によってポリイミド絶縁
フィルム7と接着剤層8とをエツチング除去しなければ
ならないため、オーバーエツチングによる寸法精度の低
下とエツチングにかかる時間が長いことが問題となった
(Problems to be Solved by the Invention) Conventional methods can suppress the decrease in dimensional accuracy of the polyimide film insulation coating and the seepage of the adhesive, but the polyimide etching solution can prevent the polyimide insulation film 7 and the adhesive layer 8 from bonding. had to be removed by etching, resulting in problems such as a decrease in dimensional accuracy due to over-etching and a long etching time.

本発明はポリイミド絶縁被覆のエツチング精度に優れエ
ツチング時間を短縮できるFPCの製造方法を提供する
ものである。
The present invention provides a method for manufacturing an FPC which has excellent etching accuracy for polyimide insulating coating and can shorten etching time.

(問題点を解決するための手段) 本発明は、ポリイミド絶縁被覆のエツチング精度を向上
しエツチング時間を短縮するために、従来のFPCから
ポリイミド絶縁被覆を接着するための接着剤を使用せず
、複数の導体配線2の上に直接ポリイミド絶縁被覆6を
形成したFPCの製造法である。
(Means for Solving the Problems) In order to improve the etching accuracy of the polyimide insulation coating and shorten the etching time, the present invention does not use the conventional adhesive for bonding the polyimide insulation coating from the FPC. This is a method of manufacturing an FPC in which a polyimide insulating coating 6 is directly formed on a plurality of conductor wirings 2.

すなわち、第1図に示すように、支持フィルム層1と導
体層5と接着剤層3からなる基材(第1図a)に感光樹
脂フィルムをラミネートし、?jI数の導体配線2を形
成するに必要なパターンが形成されたネガパターンを有
するフィルムを介して露光し複数の導体配線2とならな
い部分を現像して除去しく第1図b)、塩化第2銅i8
液を噴霧する等して導体層5の不要な部分をエツチング
除去し複数の導体配線2を形成しく第1図C)、残った
感光樹脂フィルムを剥離した後ポリアミド酸溶液又はポ
リイミド)容液を複数の導体配線2が形成された側の全
面に塗布しポリイミド絶縁被覆6を形成しく第1図d)
、その上に感光樹脂を塗布して複数の導体配線2の接続
に必要な部分が露光されるような名ガパターンを用いて
露光・現像して(第1図e)露出したポリイミド絶縁被
覆をポリイミドエツチング溶液によって除去しく第1図
f)、FPCとする(第2図)ことを特徴とするFPC
の製造法である。
That is, as shown in FIG. 1, a photosensitive resin film is laminated on a base material (FIG. 1a) consisting of a support film layer 1, a conductor layer 5, and an adhesive layer 3, and then... It is exposed to light through a film having a negative pattern on which patterns necessary to form jI number of conductor wirings 2 are formed, and the parts that do not form a plurality of conductor wirings 2 are developed and removed. copper i8
In order to form a plurality of conductor wirings 2 by etching and removing unnecessary portions of the conductor layer 5 by spraying a solution or the like (Fig. 1C), after peeling off the remaining photosensitive resin film, a polyamic acid solution or a polyimide solution is added. A polyimide insulation coating 6 is formed by coating the entire surface of the side where the plurality of conductor wirings 2 are formed (Fig. 1d).
Then, a photosensitive resin is applied thereon, exposed and developed using a photosensitive pattern that exposes the parts necessary for connecting the plurality of conductor wirings 2 (Fig. 1e), and the exposed polyimide insulating coating is made of polyimide. An FPC characterized in that it can be removed with an etching solution (FIG. 1 f) and made into an FPC (FIG. 2).
This is the manufacturing method.

本発明に用いる支持フィルムlとしては、ポリイミドフ
ィルム又はポリエステルフィルムがあるが、耐熱性に優
れたポリイミドフィルムが好ましい。導体層5としては
銅、アルミニウムが使用でき、接着剤層2としては、従
来から使用されているエポキシ系樹脂、アクリル系樹脂
又はポリイミド系樹脂が使用できる。この接着剤層2に
ポリイミド系樹脂を使用するときは、ポリイミド絶縁被
覆6よりエツチング速度の小さいものが好ましく、この
場合、ポリイミドにビスマレイミド、エボキン樹脂など
三次元架橋する成分を1重付%以上添加することによっ
て得られるものを用いる。
The support film l used in the present invention may be a polyimide film or a polyester film, and a polyimide film with excellent heat resistance is preferred. Copper or aluminum can be used as the conductor layer 5, and conventionally used epoxy resin, acrylic resin, or polyimide resin can be used as the adhesive layer 2. When using a polyimide resin for this adhesive layer 2, it is preferable to use a resin that has a lower etching rate than the polyimide insulation coating 6. In this case, the polyimide should be coated with at least 1% of a three-dimensional crosslinking component such as bismaleimide or Evokin resin. Use the one obtained by adding.

ポリイミド絶縁被覆6は、縮合系ポリイミドを使用でき
、ポリイミドのプレポリマーであるポリアミド酸を使用
すれば塗布後エツチング前に行う加熱温度と時間によっ
てエツチング速度を制御でき好ましい。このとき、該ポ
リイミド絶縁被覆6のイミド化率が25〜75%であれ
ば、エツチング速度が速く、より好ましい。
The polyimide insulating coating 6 can be made of condensed polyimide, and it is preferable to use polyamic acid, which is a prepolymer of polyimide, because the etching rate can be controlled by the heating temperature and time performed after coating and before etching. At this time, it is more preferable that the imidization rate of the polyimide insulating coating 6 is 25 to 75% because the etching rate is high.

ポリイミドのエノチングン容?夜としては、水酸化テト
ラメチルアンモニウム、ヒドラジン、エチレンジアミン
等の4級アンモニウム、アミン類、又は、ナ;・リウム
、カリウム、リチウム等のアルカリ金属の水酸化物等を
含む塩基性化合物を含む溶液を用いることができる。
What is the enoting capacity of polyimide? At night, solutions containing basic compounds such as quaternary ammonium such as tetramethylammonium hydroxide, hydrazine, and ethylenediamine, amines, or hydroxides of alkali metals such as sodium, potassium, and lithium are used. Can be used.

(作用) 本発明のポリイミド絶縁被覆を接着するための接着剤を
使用せず、複数の導体配線2の上に直接ポリイミド絶縁
被覆6を形成したFPCの製造法によって、ポリイミド
絶縁被覆のエツチング精度を向上しエツチング時間を短
縮することができる。
(Function) The FPC manufacturing method of the present invention, in which the polyimide insulation coating 6 is directly formed on the plurality of conductor wirings 2 without using an adhesive for bonding the polyimide insulation coating, improves the etching accuracy of the polyimide insulation coating. It is possible to improve the etching time and shorten the etching time.

実施例I N−メチル−2−ピロリドン230gに4,4°−ジ了
ミノジフエニルエーテル(以下DDEという。)20g
を加え、DDEが完全に溶解するまで攪拌し、この溶液
を5℃以下に冷却し、この温度に保ったままピロメリッ
ト酸二無水物21.8gを少量づつ添加し反応させ、全
量添加し終わった後、溶液の温度を80℃に昇温し3時
間クツキングしてポリイミド溶液を準備した。
Example I 20 g of 4,4°-diminodiphenyl ether (hereinafter referred to as DDE) to 230 g of N-methyl-2-pyrrolidone
was added and stirred until DDE was completely dissolved. The solution was cooled to below 5°C, and while maintaining this temperature, 21.8 g of pyromellitic dianhydride was added little by little to react. After that, the temperature of the solution was raised to 80° C., and the solution was heated for 3 hours to prepare a polyimide solution.

試験のため市販の銅箔付ポリイミドフィルムの銅箔上に
ドライフィルムをラミネートし銅エツチングレジストを
形成し不要なtJA fRをエツチング除去して回路を
形成することを省略し、市販の銅箔付ポリイミドフィル
ムの銅箔上に、前記ポリイミド溶液を全面に塗布し、1
80℃の熱風で10分乾燥した。このときのイミド化率
は、約55%であった。
For testing purposes, we omitted the process of laminating a dry film on the copper foil of a commercially available polyimide film with copper foil to form a copper etching resist and removing unnecessary tJA fR to form a circuit. The polyimide solution is applied to the entire surface of the copper foil of the film, and 1
It was dried with hot air at 80°C for 10 minutes. The imidization rate at this time was about 55%.

この上に、感光性樹脂であるOMR−83(東京応化株
式会社、商品名)を全面に塗布し、80℃で10分間加
熱乾燥した後、第3図に示すパターンを露光・現像して
得た。露出したポリイミド絶縁被覆を、エチレンジアミ
ンとヒドラジンとの混合溶液く重量比でエチレンジアミ
ン3に対しヒドラジン7のもの)で、50℃で10分間
エツチングし、水洗した後、前記レジストを剥離して試
験片とした。
A photosensitive resin OMR-83 (Tokyo Ohka Co., Ltd., trade name) was coated on the entire surface, and after heating and drying at 80°C for 10 minutes, the pattern shown in Figure 3 was exposed and developed. Ta. The exposed polyimide insulation coating was etched at 50°C for 10 minutes with a mixed solution of ethylenediamine and hydrazine (with a weight ratio of 3 parts ethylene diamine to 7 parts hydrazine), and after washing with water, the resist was peeled off and a test piece was prepared. did.

このようにして得られた試験片について、穴明は部の接
着剤のしみだし量、最小穴明は間隔、最小穴明は径、穴
明は精度及び半田耐熱性について調べた。
The test pieces thus obtained were examined for perforation, amount of adhesive seeping out, minimum perforation for spacing, minimum perforation for diameter, perforation for accuracy, and soldering heat resistance.

カバーレイの穴明は部の接着剤のしみだし量、最小穴明
は間隔、最小穴明は径、穴明は精度は、第3図に示した
テストパターンを用い、穴明は部の接着剤のしみだし量
は12の角穴10mmXl0IIIIlのパターンの部
分で露出した銅箔上の接着剤のしみたし幅21を測定し
、最小穴明は間隔は13の角穴5III11×5111
1の隣接するパターンの部分でカバーレイがオーバーエ
ツチングされないで残っている最小間隔を測定した。最
小穴明は径は、14の角穴3ffiI11×311Im
、15の角穴IIIIm×1mIm、16の角穴0.5
mnx0.5mm、17の角穴Q、3mmX0.3I、
18の角穴0.1 m+*Xo、 l ms及び19の
角穴0゜05mmX0.05mmの部分を用い、ネガパ
ターン径に対し10%の誤差の範囲内で、どの径まで穴
明けできるかを測定した。又、穴明は精度は、20の丸
穴(直径5III11)を101間隔に並べたパターン
部分を用い10個並べた両端の丸穴の縁すなわち設計値
100龍であるべき寸法の最大のずれを測定した。はん
だ耐熱性は、この測定後、所定の温度にしたはんだ槽に
一定時間浮かべ、カバーレイフィルムの剥離の有無を調
べた。これらの結果を、第1表に示す。
The holes in the coverlay are the amount of adhesive seeping out, the minimum holes are the spacing, the minimum holes are the diameter, and the holes are the accuracy using the test pattern shown in Figure 3. The amount of adhesive seeping out was determined by measuring the width 21 of the adhesive staining on the exposed copper foil in the pattern of 12 square holes 10 mm x 10 mm, and the minimum hole size was 13 square holes 5 III 11 x 5111.
The minimum spacing between adjacent pattern portions remaining without overetching of the coverlay was measured. The minimum hole diameter is 14 square holes 3ffiI11 x 311Im
, 15 square holes IIIm x 1 mIm, 16 square holes 0.5
mnx0.5mm, 17 square holes Q, 3mmx0.3I,
Using the square hole 0.1 m + * Xo, l ms of No. 18 and the square hole 0゜05 mm x 0.05 mm of No. 19, find out to what diameter the hole can be drilled within a 10% error range for the negative pattern diameter. It was measured. In addition, the accuracy of hole making is determined by using a pattern part in which 20 round holes (diameter 5III11) are arranged at 101 intervals. It was measured. After this measurement, the solder heat resistance was determined by floating the sample in a solder bath at a predetermined temperature for a certain period of time, and checking for peeling of the coverlay film. These results are shown in Table 1.

実施例2 N−メチル−2−ピロリドン230gにp−フェニレン
ジアミン10.8gを加え、p−フェニレンジアミンが
完全に溶解するまで攪拌し、この溶液を5℃以下に冷却
し、この温度を保ったまま、3.3’、4.4’−ビフ
ェニルテトラカルボン酸二無水物29.4gを少量づつ
添加し反応させ、全量添加し終わった後、溶液の温度を
80℃に昇温し4時間クツキングしてポリイミド?容液
とした。この)容液を用いて、エツチング条件を70℃
で10分とした以外は実施例1と同様にして試験片を作
成し、実施例1と同様に、穴明は部の接着剤のしみだし
量、最小穴明は間隔、最小穴明は径、穴明は精度及び半
田耐熱性について調べた。
Example 2 10.8 g of p-phenylenediamine was added to 230 g of N-methyl-2-pyrrolidone, stirred until p-phenylenediamine was completely dissolved, and the solution was cooled to 5° C. or lower and maintained at this temperature. Then, 29.4 g of 3.3', 4.4'-biphenyltetracarboxylic dianhydride was added little by little to react. After the entire amount had been added, the temperature of the solution was raised to 80°C and cooked for 4 hours. And polyimide? It was made into a liquid. Using this solution, the etching conditions were set to 70°C.
A test piece was prepared in the same manner as in Example 1, except that the time was 10 minutes.As in Example 1, the perforation is the amount of adhesive seeping out of the part, the minimum perforation is the interval, and the minimum perforation is the diameter. , Anaki investigated accuracy and soldering heat resistance.

この結果を、第1表に示す。The results are shown in Table 1.

実施例3 P−クロルフェノール290gにDDEを20g加え、
DDEが完全に溶解するまで攪拌し、この溶液に窒素ガ
スを吹き込みながら、130℃に昇温し、3,3°、4
.4“−ビフェニルテトラカルボン酸二無水物29.4
gを少量づつ添加し反応させ、全量添加し終わった後、
溶液の温度を160℃に昇温し一時間反応させ、溶液の
温度を60℃に冷却し、窒素ガスの供給を止め、水を0
.5g添加し、60°Cで4時間反応させて、ポリイミ
ド溶液とした。このポリイミド溶液を用いて、エツチン
グ液を4%水酸化カリウムとしエツチング条件を80’
CT:10分とした以外は実施例1と同様にして試験片
を作成し、実施例1と同様に、穴明は部の接着剤のしみ
だし量、最小穴明は間隔、最小穴明は径、穴明は精度及
び半田耐熱性について調べた。
Example 3 20g of DDE was added to 290g of P-chlorophenol,
The solution was stirred until DDE was completely dissolved, heated to 130°C while blowing nitrogen gas, and heated to 3, 3°, 4°C.
.. 4″-Biphenyltetracarboxylic dianhydride 29.4
g was added little by little to react, and after the entire amount had been added,
The temperature of the solution was raised to 160°C and reacted for 1 hour, the temperature of the solution was cooled to 60°C, the supply of nitrogen gas was stopped, and the water was reduced to 0.
.. 5g was added and reacted at 60°C for 4 hours to obtain a polyimide solution. Using this polyimide solution, the etching solution was 4% potassium hydroxide and the etching conditions were 80'.
CT: A test piece was prepared in the same manner as in Example 1, except that the time was 10 minutes, and in the same manner as in Example 1, the perforation is the amount of adhesive seeping out in the area, the minimum perforation is the interval, and the minimum perforation is the The accuracy and soldering heat resistance of the diameter and hole were examined.

この結果を、第1表に示す。The results are shown in Table 1.

比較例1 ポリイミド7容ン&を用いず、ポリイミドエツチングを
行なわいで、金型で窓を開けた接着剤付ポリイミドフィ
ルムLF−0110(デュポン社、商品名)を、190
℃、30kg/CIAの条件で加熱加圧した他は、実施
例1と同様として試験片を作成し、実施例1と同様に、
穴明は部の接着剤のしみだし量、最小穴明は間隔、最小
穴明は径、穴明は精度及び半田耐熱性について調べた。
Comparative Example 1 An adhesive-backed polyimide film LF-0110 (DuPont, trade name) with a window made with a mold was prepared without polyimide etching without using a polyimide film.
A test piece was prepared in the same manner as in Example 1, except that it was heated and pressurized under the conditions of ℃ and 30 kg/CIA.
The amount of adhesive seeping out of the hole, the minimum hole spacing, the minimum hole diameter, the precision of the hole, and the soldering heat resistance were investigated.

この結果を、第1表に示す。The results are shown in Table 1.

比較例2 ポリイミド溶液を用いず、接着剤付ポリイミドフィルム
LF−0110(デュポン社、商品名)を、190℃、
30kg/cI11の条件で加熱加圧し、ポリイミドエ
ツチング条件を70℃で30分とした他は、実施例1と
同様として試験片を作成し、実施例1と同様に、穴明は
部の接着剤のしみだし量、最小穴明は間隔、最小穴明は
径、穴明は精度及び半田耐熱性について調べた。
Comparative Example 2 Polyimide film with adhesive LF-0110 (DuPont, trade name) was heated at 190°C without using polyimide solution.
A test piece was prepared in the same manner as in Example 1, except that heat and pressure was applied at 30 kg/cI11 and polyimide etching was performed at 70°C for 30 minutes. The amount of seepage, minimum hole spacing, minimum hole diameter, hole hole accuracy, and solder heat resistance were investigated.

この結果を、第1表に示す。The results are shown in Table 1.

第1表 (発明の効果) 以上に説明したように、本発明のポリイミド絶縁被覆を
接着するための接着剤を使用せず、複数の導体配線の上
に直接ポリイミド絶縁被覆を形成したFPCの製造法に
よって、ポリイミド絶縁被覆のエツチング精度を向上し
エツチング時間を短縮することができる。また、ポリイ
ミド絶縁被覆を接着するための接着剤を使用しないこと
から、接着剤のしみだしがなく、接続部の面積を確保で
き、接続信頬性に優れたFPCを製造することができる
Table 1 (Effects of the Invention) As explained above, an FPC was manufactured in which a polyimide insulation coating was directly formed on a plurality of conductor wirings without using an adhesive for bonding the polyimide insulation coating of the present invention. The method improves the etching accuracy of polyimide insulation coatings and reduces the etching time. Furthermore, since no adhesive is used to bond the polyimide insulation coating, there is no adhesive seepage, the area of the connection portion can be secured, and an FPC with excellent connection reliability can be manufactured.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a −rは、本発明の一実施例を示すFPCの製
造工程を説明するための断面図、第2図は本発明の一実
施例によって製造した配線板の断面図、第3図は本発明
の実施例及び比較例の試験のために使用したポリイミド
絶縁被覆のエツチングパターンを示す上面図、第4図a
−c及び第5図a ”−cは従来例の製造工程を説明す
るための断面図である。 支持フィルム  2.複数の導体配線 接着剤層    5.4体層 ポリイミド絶縁被覆 絶縁フィルム  8.接着剤層 (a) (b) (c) (d) 第1図 12角穴10鱈×10ff 13角穴5ffX51111 14角穴3絹×3關 15角穴1mX1ff 16角穴Q、5mXQ、55m 17角穴0.3 HX O,3顛 18角穴01絹×0.1朋 19角穴0.05×o、05絹 20丸穴 21接着剤のしみ出し幅 第 3図 (e) (f) (a) (b) (c) (a) (b) (c)
1a-r are cross-sectional views for explaining the manufacturing process of an FPC according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a wiring board manufactured according to an embodiment of the present invention, and FIG. FIG. 4a is a top view showing the etching pattern of the polyimide insulation coating used for testing the examples and comparative examples of the present invention;
-c and Fig. 5a''-c are cross-sectional views for explaining the manufacturing process of a conventional example. Support film 2. Plural conductor wiring adhesive layers 5. Four-layer polyimide insulation coating insulation film 8. Adhesion Agent layer (a) (b) (c) (d) Fig. 1 12 square holes 10 cods x 10 ff 13 square holes 5 ff Hole 0.3H a) (b) (c) (a) (b) (c)

Claims (2)

【特許請求の範囲】[Claims] 1.支持フィルム層(1)、複数の導体配線(2)、支
持フィルム層(1)と複数の導体配線(2)とを接着す
る接着剤層(3)及び複数の導体配線(2)の表面の接
続に必要な部分以外を絶縁する絶縁層(4)とからなる
フレキシブル印刷配線板を製造する方法において、支持
フィルム層(1)と導体層(5)と接着剤層(3)から
なる基材の導体層(5)の不要な部分をエッチング除去
し複数の導体配線(2)を形成し、ポリアミド酸溶液又
はポリイミド溶液を複数の導体配線(2)が形成された
側の全面に塗布しポリイミド絶縁被覆(6)を形成し、
複数の導体配線(2)の接続に必要な部分をポリイミド
エッチング溶液によって除去することを特徴とするフレ
キシブル印刷配線板の製造法。
1. The support film layer (1), the plurality of conductor wirings (2), the adhesive layer (3) for bonding the support film layer (1) and the plurality of conductor wirings (2), and the surface of the plurality of conductor wirings (2). A method for manufacturing a flexible printed wiring board comprising an insulating layer (4) that insulates parts other than those necessary for connection, a base material comprising a support film layer (1), a conductor layer (5) and an adhesive layer (3). A plurality of conductor wirings (2) are formed by etching away unnecessary portions of the conductor layer (5), and a polyamic acid solution or a polyimide solution is applied to the entire surface of the side on which the plurality of conductor wirings (2) are formed. forming an insulating coating (6);
A method for manufacturing a flexible printed wiring board, characterized in that a portion necessary for connecting a plurality of conductor wirings (2) is removed using a polyimide etching solution.
2.ポリイミド絶縁被覆(6)をエッチング除去し複数
の導体配線(2)の接続に必要な部分を露出させる工程
において、該ポリイミド絶縁被覆(6)のイミド化率が
25〜75%であることを特徴とする請求項1記載のフ
レキシブル印刷配線板の製造法。
2. In the step of etching away the polyimide insulation coating (6) to expose the portion necessary for connecting the plurality of conductor wirings (2), the imidization rate of the polyimide insulation coating (6) is 25 to 75%. The method for manufacturing a flexible printed wiring board according to claim 1.
JP16972188A 1988-07-07 1988-07-07 Manufacture of flexible printed wiring board Pending JPH0218986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16972188A JPH0218986A (en) 1988-07-07 1988-07-07 Manufacture of flexible printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16972188A JPH0218986A (en) 1988-07-07 1988-07-07 Manufacture of flexible printed wiring board

Publications (1)

Publication Number Publication Date
JPH0218986A true JPH0218986A (en) 1990-01-23

Family

ID=15891626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16972188A Pending JPH0218986A (en) 1988-07-07 1988-07-07 Manufacture of flexible printed wiring board

Country Status (1)

Country Link
JP (1) JPH0218986A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000151047A (en) * 1998-11-05 2000-05-30 Sony Chem Corp Double-sided flexible wiring board and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000151047A (en) * 1998-11-05 2000-05-30 Sony Chem Corp Double-sided flexible wiring board and manufacture thereof

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