JPH0218821A - Switch input circuit - Google Patents

Abstract

PURPOSE:To read out the states of two switches with one input terminal by changing the input voltage of an AD converter with combinations of the opened/ closed states of two switches. CONSTITUTION:The states of two switches 3 and 5 can be read out via one AD converter 1. Combinations of the opened/closed states of two switches 3 and 5 are four, a circuit is constituted so that input voltage values of the AD converter 1 are changed respectively for these combinations. Resistance values of resistors are determined and the circuit is constituted so that the power voltage is uniformly divided and the input voltage values of the AD converter 1 are set to nearly 0, a/3, 2a/3, and (a) for these combinations, where (a) is the voltage value of a power source. The AD converter rarely has an effect of the error of the resistance values or the like, the states of two switches can be correctly read out via one AD converter.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a switch input circuit.

[Prior Art] Conventionally, for example, a printer requires a large number of switches such as a mode switch and various setting switches, and one input port is assigned to one switch in order to read the status of each switch.

[Issue to be Solved] In the above conventional system, the number of input ports equal to the number of switches is required, resulting in an increase in the size of the circuit.

An object of the present invention is to provide a switch input circuit that can read the states of two switches with one input terminal.

[Means for Solving the Problems] The present invention uses a circuit composed of four resistors whose resistance values have a predetermined relationship, two switches, and an AD converter, and combines the open and closed states of the two switches. The above problem is solved by varying the input voltage value of the AD converter.

[Example] Hereinafter, one embodiment of the present invention will be described based on the drawings.

In FIG. 1, 1 is an AD converter that converts the voltage V at the input terminal into 2-bit outputs Q 1 and Q 2 . 2
is a first resistor, and 3 is a first switch, which are connected in series to form a first circuit 4. 5 is a second switch, 6 is a second resistor, and these are connected in series to form a second circuit 7. The second resistor 6 is the first
The resistor 2 has a resistance value that is approximately half that of the resistor 2, and is set, for example, to 2 Ω and 1 Ω, respectively. . Further, the first circuit 4 and the second circuit 7 are connected in series to form a fourth circuit.
A circuit 8 is constructed. 9 is a third resistor 1 whose resistance value is sufficiently larger than that of the first resistor 2, for example, IMΩ.
0 is a fourth resistor having a resistance value approximately twice that of the third resistor 9, for example, 2 MΩ, and these are connected in series to form the third circuit 11. Further, in this example, the power supply V. C is 5 ■.

Next, the operation will be explained. FIG. 2 shows the open/close states of the first switch 3 and the second switch 5, the voltage V for each combination, and the states of the outputs Q1 and Q2 of the AD converter 1.

When both the first switch 3 and the second switch 5 are open, the ratio of the resistance values of the third resistor 9 and the fourth resistor 10 is approximately 1:2, so the voltage V is approximately 3.3V. Become. At this time, AD converter 1 outputs “1° to Q2” and “0” to Q2.
° is output.

When the first switch 3 is closed and the second switch 5 is open, the resistance value of the fourth resistor 10 is sufficiently larger than the resistance value of the first resistor 2. The voltage V can be ignored and is approximately 5°0. At this time, the AD converter outputs "1" to Ql and "1" to Q2.

When the first switch 3 is open and the second switch 5 is closed, the resistance value of the third resistor 9 is sufficiently larger than the resistance value of the second resistor 6, so the second resistor 6 is ignored. The voltage V can be approximately Ov. At this time, the AD converter outputs "0°" to Ql and "0" to Q2.

When both the first switch 3 and the second switch 5 are closed, the resistance values of the third resistor 9 and the fourth resistor 10 are lower than the resistance values of the first resistor 2 and the second resistor 6. Since they are sufficiently large, the third resistor 9 and the fourth resistor 10 can be ignored, and the voltage V is determined by the ratio of the resistance values of the first resistor 2 and the second resistor 6.

Since the ratio of the resistance values of the first resistor 2 and the second resistor 6 is approximately 2:1, the voltage V is approximately 1.7V. At this time, the AD converter outputs "1" to Q and mo# Q2.

With the above operation, the states of two switches can be read by one AD converter.

[Effects] According to the present invention, the states of two switches can be read from one AD converter.

There are four combinations of the open/closed states of the two switches.
The circuit is configured such that the input voltage values of the AD converter for each combination are different. Moreover, the input terminal values of the AD converter for each of the above combinations are approximately 0, a/3.2a/3, a
Since the resistance value of each resistor was determined and the circuit was configured so that the power supply voltage was divided equally, it was less susceptible to errors in resistance values, and the states of the two switches could be determined using one AD converter. It can definitely be read.

Further, by reducing the number of boards, the number of ICs or the number of IC terminals can be reduced, which greatly contributes to circuit miniaturization, cost reduction, and reliability improvement.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing the states of each switch and the output state of the AD converter in the circuit of FIG. 1. 1... AD converter 2... First resistor 3... First switch 4... First circuit 5... Second switch 6... Second resistor 7... Second circuit 8...Fourth circuit 9...Third resistor 10...Fourth resistor 11...Third circuit FIG.

Claims (1)

[Claims] An AD converter, a first resistor, and a second resistor having a resistance value approximately half the resistance value of the first resistor.
a third resistor having a resistance value sufficiently greater than the resistance value of the first resistor; a fourth resistor having a resistance value approximately twice the resistance value of the third resistor; and a second switch, the first resistor and the first switch are connected in series to form a first circuit, and the second resistor and the second switch are connected in series. A third resistor and a fourth resistor are connected in series to constitute a third circuit, and the first circuit and the second circuit are connected in series. The third circuit and the fourth circuit are connected in parallel between the power supplies, and the connection point of the first circuit and the second circuit and the connection point of the third resistor and the fourth resistor are connected in parallel between the power supplies. A switch input circuit characterized in that connection points are connected, and this connection terminal is connected to an input of the AD converter.