JPH0319420A - Reference level conversion circuit - Google Patents

Abstract

PURPOSE:To decrease the number of terminals exclusive for the circuit only to one by adding an inverter circuit and a breakdown protection diode to a proper circuit portion. CONSTITUTION:An inverter section comprising an inverter use transistor(TR) 12 and a breakdown protection diode (lateral PNP diode) 13 are added to a conventional circuit. A power supply group selection terminal A is not required by the insertion of the inverter and the lateral PNP TR is employed for the inverter input TR and the lateral PNP TR of diode connection is inserted to the emitter of an input TR 7 to use a high level voltage in the circuit. Thus, only one control terminal required for the circuit is enough.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a circuit for converting a signal reference level of an electrical signal, particularly a pulse signal.

[Summary of the invention]

The present invention can handle both positive and negative systems by changing the voltage to the power system selection terminal.
This invention is particularly effective when used for C.

Although the circuit blocks have the same function, the number of terminals dedicated to this circuit has been reduced from the conventional three terminals to only one terminal by adding a diode to an appropriate part.

[Conventional technology]

The conventional example closest to the present invention is shown in FIG. (For example, Utility Application No. 63-165779) Here, 1 is a signal input terminal, 2
is a signal output terminal, 3 is a voltage supply terminal for high level setting,
4 is a voltage supply terminal for setting a low level, 5 is a power system selection terminal A, 6 is a power system selection terminal B, 7 is an input transistor, 8 is an output transistor, 9 is a bypass transistor, 10 is a load resistance A, 11 is a load resistance B.

When does such a pulse signal reference level conversion circuit become necessary? The signal applied to signal input terminal 1 is output from the TTL IC at level 0.
~5V, but if the entire output side circuit requires TTL level pulses, a conversion circuit like this as an interface will be required. In other words, each signal output terminal 2 is O ~ in the positive power supply system.
This is the case when a pulse of -12V to -7V is required in a 5V, negative power supply system.

below. The operation will be explained step by step.

First, the whole circuit (
When the output side) is operating, the voltage supply terminal 3 for high level setting is +12V, and the voltage supply terminal 4 for low level setting is +12V.
is OV, power system selection terminal A5 is OV, power system selection terminal B
6 is set to 5V. In this way, input terminal 1 has OV→5
■When TTL level signal is added. The input transistor 7 is in a cut-off state, and the bypass transistor 9 is in an operating state. That is, at this time, the signal passes only through the bypass transistor 9 side, and a pulse signal of O-P5V is obtained at the output terminal 2.

In addition, when operating on a negative power supply system (QV, -12V), the voltage supply terminal 3 for high level setting is 5V, the voltage supply terminal 4 for low level setting is -12V, the power supply system selection terminal A5 is 5V, The illumination source system selection terminal B6 is set to OV. Also, the resistance ratio of load resistance A10 and load resistance Bll is 1
If the ratio is 2:5, it will be Iromono. In this way, when a signal of OV→5v is input to the input terminal 1, the pie bus transistor 9 enters the cut-off state, and the input transistor 7
becomes operational. At this time, the collector portion of the input transistor 7 has a pulse level of 5V→OV, and the collector output portion of the output transistor 8 has a pulse level of −12V→5V. Then, at output terminal 2, load resistances A and B
By dividing by , an appropriate pulse level of -12V→-7V can be obtained.

In this way, this circuit example is a pulse signal reference level conversion circuit that can be used in either a positive power supply system or a negative power supply system. The terminals required for switching between the positive power system and negative power system are high level setting terminal 3, low level setting terminal 4, and power system selection terminal A5.
, and the power supply system selection terminal B6. However, the low level setting terminal 4 can be used in common with the terminal that supplies the lowest potential in the circuit, regardless of which power supply system the entire circuit is operating on.

Therefore, the three terminals uniquely required for this circuit block are the high level setting terminal 3, the power system selection terminal A5, and the power system selection terminal 6. The following table shows the relationship between the voltage applied to each terminal and the power supply system in the circuit of FIG. 2.

[Problem to be solved by the invention]

The conventional technology described above requires three additional control terminals in order to give this conversion circuit versatility (even if the power supply system of the output side circuit is changed, it can be handled without changing the circuit). This means that the entire circuit including this circuit block is
When converting to C, etc., three dedicated terminals (pins) are required, leading to an increase in the number of IC bins. On the other hand, the number of IC bins is often limited, and this has traditionally been a problem.

The present invention aims to reduce the number of control terminals required in this circuit block in order to minimize the increase in the number of bins when integrated into an IC.

[Means to solve the problem]

In order to achieve the above object, the present invention has the following features:
An inverter section is inserted between the terminals so that A5 is commonly used, thereby eliminating the need for the power supply system selection terminal A5. Also,
5V for conventional positive power supply system, O for negative power supply system
In order to make it possible to use the power system selection terminal B6, which was previously operated by V, as the high voltage side terminal of the power system, regardless of whether it is a positive or negative power system, one diode-connected lateral PNP transistor was installed. is inserted.

[Effect]

As a result of inserting the inverter, the power system selection terminal A that was previously required is no longer necessary! As a result, the number of required terminals has been reduced by one.

In addition, lateral PNP is used for the inverter input transistor.
}By using a transistor and by inserting a diode-connected lateral PNP transistor in the emitter section of the input transistor, when the power supply system selection terminal B is a positive power supply system, the conventional setting of 5V due to withstand voltage issues is In other words, it can be used with the high potential side voltage in the circuit. Therefore, only one control terminal is required for this circuit.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. The difference from the conventional example explained in FIG. 2 is that an inverter section constituted by an inverter transistor l2 and a diode 13 for protecting against voltage breakdown are added.

First, when the entire circuit is operating with a plus 1 power supply system (+12 Vs O V), the voltage supply terminal 3 for high level setting is +12V, the voltage supply terminal 4 for low level setting is 0■, and the power system selection terminal 15 is set to 12V. In this way, when a TTL level signal of OV→5V is applied to the input terminal 1, the input transistor 7 enters a cut-off state.

At this time, if there is no voltage breakdown protection diode 13, a maximum voltage of 12V will be applied between the emitter and base of the input transistor 7, considering that the withstand voltage between the emitter and base of a normal NPN transistor is about 8V or less. Current flows in the opposite direction, leading to abnormal operation and destruction. However, since a diode (in this example, a diode using lateral PNP) with a reverse withstand voltage equal to or higher than IOV is inserted in series, normal operation is achieved. Further, the inverter transistor 12 is also turned off, and as a result, the bypass transistor 9 is turned on. That is, at this time, the signal passes only through the bypass transistor 9 side, and a 0-5V pulse signal is obtained at the output terminal 2.

In addition, when operating on a negative power supply system (QV.-12V), the voltage supply terminal 3 for high level setting is set to 5V, the voltage supply terminal 4 for low level setting is set to -12V, and the power supply system selection terminal 15 is set to OV. do. It is also assumed that the resistance ratio between the load resistor AIO and the load resistor Bll is 12:5 as in the conventional example. In this state, the inverter transistor 12 is turned on and red, and the power supply system in the conventional example is The voltage at the portion 14 corresponding to selection terminal A is 5■. In this way, when a signal of 0.times..fwdarw.5 V is input to the input terminal 1, the bypass transistor 9 enters the cut-off state, and the input transistor 7 and the voltage breakdown protection diode 13 enter the operating state.

At this time, the collector portion of the input transistor 7 is 5V. O.V.
The pulse level of the collector output portion of the output transistor 8 increases from -12V to 5V. Then, at the output terminal 2, by being divided by the load resistors A and B, an appropriate pulse level of -12V→-7V can be obtained.

In this way, this embodiment provides a pulse signal reference level conversion circuit that can be used in either a positive power supply system or a negative power supply system.

Unlike the conventional example, the required terminals are a high level setting terminal 3 and a low level setting terminal 4. There are three terminals including the t-source system selection terminal B6. Also, as in the conventional example, the low level setting terminal 4 can be used in common with the terminal capable of supplying the lowest potential in the circuit, regardless of which power supply system the entire circuit is operating on. Furthermore, in this embodiment, the i source system selection terminal B can be used in common with the high potential side voltage supply terminal in the circuit, regardless of which power system the entire circuit is operating on.
The only terminal required uniquely in this circuit block is the high level setting terminal 3. The following table shows the voltages and voltages applied to the terminals in the embodiments of the present invention. [Effects of the Invention] According to the present invention. A pulse signal reference level conversion circuit can be realized by adding only one terminal. Especially when this circuit block is used as a part of an IC circuit, there is a slight increase in the number of elements used (in this example, there are four elements, but in the case of an IC, the increase in the number of elements by four can be almost ignored).
This increases the number of IC bins from the conventional 3 pins to just 1 pin.
This creates a dog-like effect in that it can be reduced to a bottle.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional example. l: Signal power terminal, 2: Signal output terminal, 3: Voltage supply terminal for high level setting, 4: Voltage supply terminal for low level setting, 6.15: Power supply system selection terminal B, 7 two-person transistor, 9 : Bypass transistor, 12: Inverter transistor, 13: Voltage breakdown protection diode. Figure 1

Claims (1)

[Claims] 1. In an electrical signal reference level conversion circuit that converts an electrical signal from a single power supply system to an electrical signal from another power supply system, there are multiple paths between the input terminal and the output terminal, One of the paths is composed of a transistor whose emitter is connected to a signal input terminal, whose collector is connected to an output terminal, whose base is connected to the output of an inverter circuit, and which is turned on and off by the voltage applied to the input of the inverter circuit. An electrical signal reference level conversion circuit characterized by: 2. In an electrical signal reference level conversion circuit that converts an electrical signal from a single power supply system to an electrical signal from another power supply system, connect the base to the input terminal and the collector to the voltage supply terminal for high level setting via a resistor. and an input transistor whose emitter is connected to the base of an output transistor to be described later, and whose emitter is connected to a power supply selection terminal via at least one diode, whose emitter is connected to the high-level setting voltage supply terminal, and whose collector is connected in series. An electrical signal reference level conversion circuit comprising: the output transistor connected to a low level setting voltage supply terminal via two resistors; and the series-connected resistor with the connection point as an output terminal. . 3. In an electrical signal reference level conversion circuit that converts an electrical signal from a single power supply system to an electrical signal from another power supply system, connect the base to the input terminal and the collector to the voltage supply terminal for high level setting via a resistor. At the same time, the input transistor is connected to the base of the output transistor described later, and the emitter is connected to the power supply selection terminal through at least one diode, and the emitter is connected to the voltage supply terminal for high level setting, and the collector is connected in series. The output transistor is connected to the low level setting voltage supply terminal through two connected resistors, and the connection point is used as an output terminal, and the connection point of the series-connected resistors is connected to the collector, and the emitter is connected to the connection point of the resistor connected in series. is connected to the signal input terminal, the base is connected to the low level setting voltage through two resistors connected in series, the collector is connected to the connection point of the two resistors, and the emitter is connected to the signal input terminal. A reference level conversion circuit for electrical signals, characterized in that the circuit comprises an inverter transistor whose base is connected to the high level setting voltage supply terminal and whose base is connected to the power supply selection terminal via a resistor.