CN112235897B - Multi-output current-limiting control circuit - Google Patents

Multi-output current-limiting control circuit Download PDF

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Publication number
CN112235897B
CN112235897B CN202011087028.5A CN202011087028A CN112235897B CN 112235897 B CN112235897 B CN 112235897B CN 202011087028 A CN202011087028 A CN 202011087028A CN 112235897 B CN112235897 B CN 112235897B
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resistor
triode
sequentially connected
main control
input
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CN112235897A (en
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邓勇
胡思敏
张杨
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Watt Zhihui Guangdong Electronics Co ltd
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Watt Zhihui Guangdong Electronics Co ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30Driver circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/50Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Abstract

The invention discloses a multi-output current-limiting control circuit, which comprises an input monitoring unit, a plurality of groups of output monitoring units, a power management unit and a main control unit, wherein the input monitoring unit is used for monitoring the input of a power supply; the input monitoring unit is sequentially connected with the plurality of groups of the output monitoring unit, the power management unit and the main control unit, the plurality of groups of the output monitoring unit are sequentially connected with the input monitoring unit, the power management unit and the main control unit, and the power management unit is sequentially connected with the input monitoring unit, the plurality of groups of the output monitoring unit and the main control unit. Has the advantages that: the invention simplifies the circuit structure and improves the efficiency and reliability of the power supply; the number of devices is small, and the cost is low; the power supply can be adapted to AC/DC power supplies with different powers and different output voltages, has strong compatibility, and is beneficial to supply chain planning and market popularization.

Description

Multi-output current-limiting control circuit
Technical Field
The invention relates to the field of LED power supplies, in particular to a multi-output current-limiting control circuit.
Background
In the design consideration of the switching power supply, the safety protection of the terminal user is a key link, so that the design and use safety of the switching power supply are strictly regulated in all countries, especially in developed countries such as Europe and America. In UL certification of U.S. authorities, the power supply which can be touched by a user generally requires passing Class 2 type certification, and the certification has strict limits on the maximum current or power output by each path of the power supply, such as the power supply with 12V output, the maximum current of a single path cannot exceed the power supply with 5a,24v output, and the power of the single path is lower than 100W. Only power supplies meeting the above requirements can apply for Class 2 type certification, and products can be widely popularized and sold in the United states.
Therefore, there are two conventional approaches for this type of power supply, one is that the overall design of the power supply meets the specification requirements, and if a customer requires a larger current or a larger power supply, then it is used in parallel by multiple power supplies, as shown in fig. 7. The method needs a plurality of sets of control circuits through simple superposition of low-power supplies, and the cost is highest. Secondly, the power supply rectification filtering and power factor correction part is designed according to the total power required by customers, and the rear stage is independently controlled by a plurality of switch currents, as shown in fig. 8. The circuit structure of the method is complex, the cost is high, the power supply has certain use limitation, the large-scale popularization is inconvenient, and the difficulty of supply chain planning is increased.
An effective solution to the problems in the related art has not been proposed yet.
Disclosure of Invention
The present invention provides a multi-output current-limiting control circuit to overcome the above technical problems in the related art.
Therefore, the invention adopts the following specific technical scheme:
the multi-output current-limiting control circuit comprises an input monitoring unit, a plurality of groups of output monitoring units, a power management unit and a main control unit; the input monitoring unit is sequentially connected with the plurality of groups of the output monitoring unit, the power management unit and the main control unit, the plurality of groups of the output monitoring unit are sequentially connected with the input monitoring unit, the power management unit and the main control unit, and the power management unit is sequentially connected with the input monitoring unit, the plurality of groups of the output monitoring unit and the main control unit.
Further, the input monitoring unit comprises an input port Vin +, an input port Vin-, a fuse F1, a resistor R6, a diode D1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a triode Q1, a triode Q2 and an MOS (metal oxide semiconductor) tube Q3; fuse F1's one end with input port Vin + connects, fuse F1's the other end in proper order with diode D1's negative pole, resistance R1's one end, multiunit output monitoring unit reaches power management unit connects, resistance R1's the other end in proper order with master control unit reaches resistance R6's one end is connected, resistance R6's the other end in proper order with diode D1's positive pole, input port Vin-reaches MOS pipe Q3's source electrode is connected and ground connection, MOS pipe Q3's drain electrode and multiunit output monitoring unit connects, MOS pipe Q3's grid with resistance R5's one end is connected, resistance R5's the other end with triode Q2's projecting pole is connected, triode Q2's collecting electrode in proper order with the multiunit output monitoring unit, power management unit, resistance R4's one end and resistance R2's one end is connected, resistance R4's the other end in proper order with triode Q2's base and triode Q1's collecting electrode is connected, triode Q1's the base, resistance Q1's the other end with resistance R3's the other end is connected with master control unit and resistance R2's the other end in proper order.
Further, the output monitoring unit comprises a resistor R1_1, a resistor RH _1, a resistor R1_3, an amplifier U1_ A, a triode Q1_1, a resistor R1_6, a resistor R1_10, a resistor R1_8, a resistor R1_2, a resistor R1_5, a triode Q1_2, a triode Q1_3, a MOS (metal oxide semiconductor) tube Q1_4, an amplifier U1_ B, a resistor RL _1, a resistor R1_12, a resistor R1_13, a signal interface Vol + and a signal interface Vol-; one end of the resistor R1_1 is connected to the power management unit, one end of the resistor R1, the other end of the fuse F1, the negative electrode of the diode D1, and one end of the resistor RH _1 in turn, the other end of the resistor R1_1 is connected to the emitter of the transistor Q1_1 and the fifth end of the amplifier U1_ a in turn, the collector of the transistor Q1_1 is connected to the main control unit and one end of the resistor R1_10 in turn, the other end of the resistor R1_10 is grounded, the base of the transistor Q1_1 is connected to one end of the resistor R1_6, the other end of the resistor R1_6 is connected to the seventh end of the amplifier U1_ a, the sixth end of the amplifier U1_ a is connected to one end of the resistor R1_3, and the other end of the resistor R1_3 is connected to the other end of the resistor RH _1 and the signal interface Vol +, one end of the resistor R1_8 is connected with the main control unit, the other end of the resistor R1_8 is connected with the base of the triode Q1_3, the emitter of the triode Q1_3 is grounded, the collector of the triode Q1_3 is sequentially connected with one end of the resistor R1_2 and the base of the triode Q1_2, the collector of the triode Q1_2 is sequentially connected with the other end of the resistor R1_2, the power management unit, the collector of the triode Q2, one end of the resistor R4 and one end of the resistor R2, the emitter of the triode Q1_2 is connected with one end of the resistor R1_5, the other end of the resistor R1_5 is connected with the gate of the MOS transistor Q1_4, the drain of the MOS transistor Q1_4 is connected with the signal interface Vol-, the source electrode of the MOS transistor Q1_4 is sequentially connected with one end of the resistor RL _1 and the third end of the amplifier U1_ B, the fourth end of the amplifier U1_ B is sequentially connected with the power management unit, the collector electrode of the triode Q2, one end of the resistor R4, one end of the resistor R2, the collector electrode of the triode Q1_2 and the other end of the resistor R1_2, the first end of the amplifier U1_ B is sequentially connected with the main control unit and one end of the resistor R1_13, the other end of the resistor R1_13 is sequentially connected with the second end of the amplifier U1_ B and one end of the resistor R1_12, the other end of the resistor R1_12 is sequentially connected with the other end of the resistor RL _1 and the drain electrode of the MOS transistor Q3, and the fifth end of the amplifier U1_ B is grounded.
Further, the power management unit comprises a triode Q4, a triode Q5, a resistor R7, a resistor R8, a capacitor C1, a capacitor C2, a capacitor C3, a voltage stabilizing diode ZD1 and a voltage stabilizing diode ZD2; an emitting electrode of the triode Q5 is sequentially connected with the main control unit and one end of the capacitor C3, the other end of the capacitor C3 is sequentially connected with an anode of the zener diode ZD1, one end of the capacitor C2, an anode of the zener diode ZD2 and one end of the capacitor C1 and is grounded, a cathode of the zener diode ZD1 is sequentially connected with one end of the resistor R8 and a base electrode of the triode Q5, the other end of the resistor R8 is sequentially connected with a collector of the triode Q5, the other end of the capacitor C2, an emitting electrode of the triode Q4, a fourth end of the amplifier U1_ B, a collector of the triode Q1_2, the other end of the resistor R1_2, a collector of the triode Q2, one end of the resistor R4 and one end of the resistor R2, a base electrode of the triode Q4 is sequentially connected with a cathode of the zener diode ZD2 and one end of the resistor R7, and a collector of the triode Q4 is sequentially connected with the other end of the resistor R7, the other end of the capacitor C1, one end of the resistor R1, one end of the fuse D1 and one end of the resistor R1.
Further, the main control unit comprises an MCU1, a resistor R22, a resistor R23, a resistor R24, a diode LED _ Vin, and a plurality of groups of diodes LED _ Vo; the fourth pin of the MCU1 is connected to the input voltage signal V1, the first pin of the MCU1 is grounded, the third pin of the MCU1 is connected to the emitter of the transistor Q5 and one end of the capacitor C3, the fifth pin of the MCU1 is connected to the collector of the transistor Q1_1 and one end of the resistor R1_10 in sequence, the fourth pin and the sixth pin of the MCU1 to the tenth pin are connected to the first end of the amplifier U1_ B and one end of the resistor R1_13 in the multiple output monitoring unit in sequence, the eleventh pin of the MCU1 is connected to the other end of the resistor R3 and the other end of the resistor R2 in sequence, the twelfth pin and the thirteenth pin of the MCU1 are connected to one end of the resistor R1_8 in the multiple output monitoring unit in sequence, the twenty-seventh pin of the MCU1 is connected to one end of the resistor R22, the twenty-fourteen pin of the MCU1 is connected to one end of the resistor R23, the first pin of the MCU1 is connected to one end of the resistor R24, the negative end of the resistor R24 is connected to the negative end of the diode Vo diode connected to the LED diode Vo diode.
Further, the resistor RH _1, the resistor R1_3, the amplifier U1_ a, the triode Q1_1, and the resistor R1_10 form a mirror phase current sampling circuit, a sampling voltage on the resistor R1_10 is connected to the main control unit, and a sampling voltage value is:
IH1=R1_10X(IH_1X RH_1)/R1_1。
further, the resistor RL _1, the resistor R1_12, the resistor R1_13, and the amplifier U1_ B form a low-side current sampling circuit, and the current sampling value is:
IL1=(R1_12+R1_13)X(IL_1X RL_1/R1_12)。
further, the capacitor C1 and the capacitor C3 are configured as a power supply high-frequency filter capacitor.
The beneficial effects of the invention are as follows:
(1) The invention simplifies the circuit structure and improves the efficiency and reliability of the power supply; the number of devices is small, and the cost is low; the power supply can be adapted to AC/DC power supplies with different powers and different output voltages, has strong compatibility, and is beneficial to supply chain planning and market popularization.
(2) The input voltage of the invention can be preset or automatically detected; the protection and control strategies can be preset or automatically set according to the input voltage; the current sampling points can be positive terminals, negative terminals or sampling at the same time; the protection can be switched off integrally through the input switch, or each path of switch is switched off independently; the switch control can be realized by software or hardware.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required in the embodiments will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a block diagram of a circuit configuration of a multi-output current-limiting control circuit according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a functional implementation of a multiple output current limit control circuit according to an embodiment of the present invention;
FIG. 3 is a circuit diagram of an input monitoring unit of a multi-output current limit control circuit according to an embodiment of the present invention;
FIG. 4 is a circuit diagram of an output monitoring unit of the multi-output current limit control circuit according to an embodiment of the present invention;
FIG. 5 is a circuit diagram of a power management unit of a multi-output current limit control circuit according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of a master control unit of a multi-output current limit control circuit according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a first prior art solution;
fig. 8 is a schematic diagram of a second conventional scheme.
In the figure:
1. an input monitoring unit; 2. an output monitoring unit; 3. a power management unit; 4. and a main control unit.
Detailed Description
For further explanation of the various embodiments, the drawings which form a part of the disclosure and which are incorporated in and constitute a part of this specification, illustrate embodiments and, together with the description, serve to explain the principles of operation of the embodiments, and to enable one skilled in the art to understand the embodiments and advantages of the disclosure for reference and without scale, wherein elements are not shown in the drawings and like reference numerals are used to refer to like elements generally.
According to an embodiment of the present invention, a multiple output current limit control circuit is provided.
Referring to the drawings and the detailed description, as shown in fig. 1-2, the multi-output current-limiting control circuit according to the embodiment of the present invention includes an input monitoring unit 1, a plurality of output monitoring units 2, a power management unit 3, and a main control unit 4;
wherein, input monitoring unit 1 in proper order with the multiunit output monitoring unit 2 power management unit 3 reaches main control unit 4 connects, the multiunit output monitoring unit 2 in proper order with input monitoring unit 1 power management unit 3 reaches main control unit 4 connects, power management unit 3 in proper order with input monitoring unit 1, multiunit output monitoring unit 2 reaches main control unit 4 connects.
In one embodiment, the input monitoring unit 1 includes an input port Vin +, an input port Vin-, a fuse F1, a resistor R6, a diode D1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a transistor Q1, a transistor Q2, and a MOS transistor Q3; fuse F1's one end with input port Vin + connects, fuse F1's the other end in proper order with diode D1's negative pole, resistance R1's one end, multiunit output monitoring unit 2 reaches power management unit 3 connects, resistance R1's the other end in proper order with master control unit 4 reaches resistance R6's one end is connected, resistance R6's the other end in proper order with diode D1's positive pole, input port Vin-reaches MOS pipe Q3's source electrode is connected and ground connection, MOS pipe Q3's drain electrode and multiunit output monitoring unit 2 connects, MOS pipe Q3's grid with resistance R5's one end is connected, resistance R5's the other end with triode Q2's projecting pole is connected, triode Q2's collecting electrode in proper order with the multiunit output monitoring unit 2, power management unit 3, resistance R4's one end and resistance R2's one end is connected, resistance R4's the other end in proper order with triode Q2's base and triode Q1's projecting pole is connected, triode Q1's the collecting electrode ground connection, resistance Q1's the other end with resistance R3's one end is connected with triode Q3's base in proper order and resistance R2's one end resistance R4's base and resistance R2's the master control unit base connects.
In one embodiment, the output monitoring unit 2 includes a resistor R1_1, a resistor RH _1, a resistor R1_3, an amplifier U1_ a, a triode Q1_1, a resistor R1_6, a resistor R1_10, a resistor R1_8, a resistor R1_2, a resistor R1_5, a triode Q1_2, a triode Q1_3, a MOS transistor Q1_4, an amplifier U1_ B, a resistor RL _1, a resistor R1_12, a resistor R1_13, a signal interface Vol +, and a signal interface Vol-; one end of the resistor R1_1 is connected to the power management unit 3, one end of the resistor R1, the other end of the fuse F1, the negative electrode of the diode D1, and one end of the resistor RH _1 in sequence, the other end of the resistor R1_1 is connected to the emitter of the transistor Q1_1 and the fifth end of the amplifier U1_ a in sequence, the collector of the transistor Q1_1 is connected to the main control unit 4 and one end of the resistor R1_10 in sequence, the other end of the resistor R1_10 is grounded, the base of the transistor Q1_1 is connected to one end of the resistor R1_6, the other end of the resistor R1_6 is connected to the seventh end of the amplifier U1_ a, the sixth end of the amplifier U1_ a is connected to one end of the resistor R1_3, and the other end of the resistor R1_3 is connected to the other end of the resistor RH _1 and the signal interface Vol +, one end of the resistor R1_8 is connected with the main control unit 4, the other end of the resistor R1_8 is connected with the base of the triode Q1_3, the emitter of the triode Q1_3 is grounded, the collector of the triode Q1_3 is sequentially connected with one end of the resistor R1_2 and the base of the triode Q1_2, the collector of the triode Q1_2 is sequentially connected with the other end of the resistor R1_2, the power management unit 3, the collector of the triode Q2, one end of the resistor R4 and one end of the resistor R2, the emitter of the triode Q1_2 is connected with one end of the resistor R1_5, the other end of the resistor R1_5 is connected with the gate of the MOS transistor Q1_4, the drain of the MOS transistor Q1_4 is connected with the signal interface Vol-, the source electrode of the MOS transistor Q1_4 is sequentially connected with one end of the resistor RL _1 and the third end of the amplifier U1_ B, the fourth end of the amplifier U1_ B is sequentially connected with the power management unit 3, the collector electrode of the triode Q2, one end of the resistor R4, one end of the resistor R2, the collector electrode of the triode Q1_2 and the other end of the resistor R1_2, the first end of the amplifier U1_ B is sequentially connected with the main control unit 4 and one end of the resistor R1_13, the other end of the resistor R1_13 is sequentially connected with the second end of the amplifier U1_ B and one end of the resistor R1_12, the other end of the resistor R1_12 is sequentially connected with the other end of the resistor RL _1 and the drain electrode of the MOS transistor Q3, and the fifth end of the amplifier U1_ B is grounded.
In one embodiment, the power management unit 3 includes a transistor Q4, a transistor Q5, a resistor R7, a resistor R8, a capacitor C1, a capacitor C2, a capacitor C3, a zener diode ZD1, and a zener diode ZD2; an emitting electrode of the triode Q5 is sequentially connected with the main control unit 4 and one end of the capacitor C3, the other end of the capacitor C3 is sequentially connected with an anode of the zener diode ZD1, one end of the capacitor C2, an anode of the zener diode ZD2 and one end of the capacitor C1 and is grounded, a cathode of the zener diode ZD1 is sequentially connected with one end of the resistor R8 and a base of the triode Q5, the other end of the resistor R8 is sequentially connected with a collector of the triode Q5, the other end of the capacitor C2, an emitting electrode of the triode Q4, a fourth end of the amplifier U1_ B, a collector of the triode Q1_2, the other end of the resistor R1_2, a collector of the triode Q2, one end of the resistor R4 and one end of the resistor R2, a base of the triode Q4 is sequentially connected with a cathode of the zener diode ZD2 and one end of the resistor R7, a collector of the triode Q4 is sequentially connected with the other end of the resistor R7, the other end of the capacitor C1, one end of the resistor R1 and one end of the fuse D1.
In one embodiment, the main control unit 4 includes an MCU1, a resistor R22, a resistor R23, a resistor R24, a diode LED _ Vin, and a plurality of groups of diodes LED _ Vo; the fourth pin of the MCU1 is connected to the input voltage signal V1, the first pin of the MCU1 is grounded, the third pin of the MCU1 is connected to the emitter of the transistor Q5 and one end of the capacitor C3, the fifth pin of the MCU1 is connected to the collector of the transistor Q1_1 and one end of the resistor R1_10 in sequence, the fourth pin and the sixth pin of the MCU1 to the tenth pin are connected to the other end of the resistor R2 and the amplifier U1_ B in the multi-output monitoring unit 2 in sequence, the eleventh pin of the MCU1 is connected to the other end of the resistor R3 and the other end of the resistor R2 in sequence, the twelfth pin and the thirteenth pin of the MCU1 are connected to one end of the resistor R1_8 in the multi-output monitoring unit 2, the twenty-seventh pin of the MCU1 is connected to one end of the resistor R22, the fourteenth pin of the MCU1 is connected to one end of the resistor R23, the first pin of the MCU1 is connected to one end of the resistor R24, the other end of the negative pin of the resistor R24 is connected to one end of the diode Vin _ R24, and the other end of the diode Vo diode are connected to the negative diode of the LED diode.
In one embodiment, the resistor RH _1, the resistor R1_3, the amplifier U1_ a, the transistor Q1_1, and the resistor R1_10 form a mirror-phase current sampling circuit, a sampling voltage of the resistor R1_10 is connected to the main control unit (4), and a sampling voltage value is:
IH1=R1_10X(IH_1X RH_1)/R1_1。
in one embodiment, the resistor RL _1, the resistor R1_12, the resistor R1_13, and the amplifier U1_ B form a low-side current sampling circuit, and the current sampling value is:
IL1=(R1_12+R1_13)X(IL_1X RL_1/R1_12)。
in one embodiment, the capacitor C1 and the capacitor C3 are configured as a power supply high frequency filter capacitor.
In one embodiment, as shown in fig. 3, the diode D1 and the fuse F1 in the input monitoring unit 1 form input reverse connection protection, if a user connects the input port Vin-to the positive power supply terminal and connects the input port Vin + to the negative power supply terminal, the input forms a loop through the diode D1 and the fuse F1, the fuse F1 is fused, and the input negative voltage is prevented from damaging the rear power supply; the resistor R1 and the resistor R6 form an input power sampling circuit, the input power sampling circuit is connected to the main control unit 4, the main control unit 4 judges whether the input voltage is normal or not, and outputs a control signal 'Driver _ Vin' to control the MOS tube Q3 to be switched on and switched off; the resistor R3 and the triode Q1 form a common emitter amplifying circuit, an input signal is reversely amplified and then is connected to the base electrode of the triode Q2, the resistor R4 and the triode Q2 form an emitter following circuit amplifying circuit, the MOS tube Q3 is controlled to be switched on and switched off through the driving resistor R5, and due to the fact that the driving circuit is directionally amplified, when the main control unit 4 outputs a high level, the MOS tube Q3 is switched off, and when the main control unit 4 outputs a low level, the MOS tube Q3 is switched on.
In one embodiment, as shown in FIGS. 2-6, the IH1 and IL1 signals may be sent to the host unit 4 simultaneously or only one sample may be taken. The main control unit 4 is divided into two control modes according to whether a circuit is limited in a set range or not according to a sampled current signal, wherein one control mode is to control a switch of a channel, transmit a signal 'Driver (1)' to a driving signal input end of an MOS (metal oxide semiconductor) tube Q1_4, and connect an emitter follower circuit consisting of a resistor R1_2, a triode Q1_2 and a resistor R1_5 to drive the MOS tube Q1_4 through a resistor R1_8 and a triode Q1_3 common emitter reverse signal amplification circuit, wherein the MOS tube Q1_4 is turned off when the 'Driver (1)' is high level, and the MOS tube Q1_4 is turned off when the 'Driver (1)' is low level; the other is that the transmission signal 'Driver _ Vin' controls the MOS tube Q3 to be switched on and off, and the protection mode is adopted, so that any output current value is out of limit, and all outputs are switched off. No matter which kind of protection mode above adopting, in case detect the trouble, main control unit 4 can light the trouble lamp, notifies the user to overhaul. For example, when the circuit of the channel 1 is out of limit, the main control unit 4 outputs a high level to pass through a channel formed by the resistor R23 and the diode LED _ Vo1, and lights the fault lamp of the diode LED _ Vo 1. The output monitoring unit 2 can be increased according to the customer demand, and fig. 2 shows a connection diagram from 1 to N paths.
In one embodiment, as shown in fig. 5, the input signal Vin is output VCC to the driver and operational amplifier through a linear regulator circuit composed of a resistor R2, a zener diode ZD2, and a transistor Q2, and VCC is output VDD to the MCU1 of the main control unit 4 through a linear regulator circuit composed of a resistor R8, a transistor Q5, and a zener diode ZD 1. The capacitor C1 and the capacitor C3 are power supply high-frequency filter capacitors, and high-frequency noise is prevented from flowing into a logic and control circuit of a later stage.
In one embodiment, as shown in fig. 6, the operation of the main control unit is divided into several steps, the first step is to detect the input voltage signal and the current of each loop, in fig. 2, the input voltage signal V1 is input through the 40 th pin of the MCU1, and each loop current (IH 1, il1.. IH _ N, IL _ N) is input through the 4 th pin to the 10 th pin of the MCU 1; the second step is internal operation logic judgment, and whether the input voltage and the output current are normal is judged through the detected signals; the third step is to execute control and protection work, if all working state signals are normal, a low level conducting signal is output, for example, in fig. 2, a Driver _ Vin and a Driver (1).. DriverN output low levels, if the signals are abnormal, a high level is output to the 'Driver _ Vin' if the input voltage is abnormal, the total output is turned off, and meanwhile, the diode LED _ Vin is turned on, and if the output current exceeds the limit, a high level is output to the Driver N to turn off a relevant loop, and meanwhile, the fault lamp diode LED _ Vo (N) is turned on.
In summary, the invention simplifies the circuit structure and improves the efficiency and reliability of the power supply; the number of devices is small, and the cost is low; the power supply can be adapted to AC/DC power supplies with different powers and different output voltages, has strong compatibility, and is beneficial to supply chain planning and market popularization. The input voltage of the invention can be preset or automatically detected; the protection and control strategies can be preset or automatically set according to the input voltage; the current sampling points can be positive terminals, negative terminals or sampling at the same time; the protection can be switched off integrally through the input switch, or each path of switch is switched off independently; the switch control can be realized by software or hardware.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and should not be taken as limiting the scope of the present invention, which is intended to cover any modifications, equivalents, improvements, etc. within the spirit and scope of the present invention.

Claims (7)

1. The multi-output current-limiting control circuit is characterized by comprising an input monitoring unit (1), a plurality of groups of output monitoring units (2), a power management unit (3) and a main control unit (4);
the input monitoring unit (1) is sequentially connected with a plurality of groups of output monitoring units (2), the power management unit (3) and the main control unit (4), the plurality of groups of output monitoring units (2) are sequentially connected with the input monitoring unit (1), the power management unit (3) and the main control unit (4), and the power management unit (3) is sequentially connected with the input monitoring unit (1), the plurality of groups of output monitoring units (2) and the main control unit (4);
the input monitoring unit (1) comprises an input port Vin +, an input port Vin-, a fuse F1, a resistor R6, a diode D1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a triode Q1, a triode Q2 and an MOS (metal oxide semiconductor) tube Q3;
one end of the fuse F1 is connected with the input port Vin +, the other end of the fuse F1 is sequentially connected with the cathode of the diode D1, one end of the resistor R1, a plurality of groups of the output monitoring unit (2) and the power management unit (3), the other end of the resistor R1 is sequentially connected with the main control unit (4) and one end of the resistor R6, the other end of the resistor R6 is sequentially connected with the anode of the diode D1, the input port Vin-and the source electrode of the MOS transistor Q3 and grounded, the drain electrode of the MOS transistor Q3 is connected with the plurality of groups of the output monitoring unit (2), the grid electrode of the MOS transistor Q3 is connected with one end of the resistor R5, the other end of the resistor R5 is connected with the emitter of the triode Q2, the collector electrode of the triode Q2 is sequentially connected with the base of the output monitoring unit (2), the power management unit (3), one end of the resistor R4 and one end of the resistor R2, the base electrode of the triode R4 is sequentially connected with the base electrode of the output monitoring unit (2), the base electrode of the triode Q1 is connected with the resistor R3, and the emitter electrode of the resistor R3;
the diode D1 and the fuse F1 in the input monitoring unit (1) form input reverse connection protection, if a user connects an input port Vin-to the positive end of a power supply and connects an input port Vin + to the negative end of the power supply, a loop is formed by the diode D1 and the fuse F1 when input is input, the fuse F1 is fused, and the input negative voltage is prevented from damaging a rear-stage power supply; the resistor R1 and the resistor R6 form an input power sampling circuit and are connected to the main control unit (4), the main control unit (4) judges whether the input voltage is normal or not and outputs a control signal Driver _ Vin to control the MOS transistor Q3 to be switched on and switched off; the resistor R3 and the triode Q1 form a common emitter amplifying circuit, an input signal is reversely amplified and then is connected to the base electrode of the triode Q2, the resistor R4 and the triode Q2 form an emitter follower amplifying circuit, the MOS tube Q3 is controlled to be switched on and switched off through the resistor R5, and due to the fact that the driving circuit is used for amplifying the direction, when the main control unit (4) outputs a high level, the MOS tube Q3 is switched off, and when the main control unit (4) outputs a low level, the MOS tube Q3 is switched on.
2. The multi-output current-limiting control circuit according to claim 1, wherein the output monitoring unit (2) comprises a resistor R1_1, a resistor RH _1, a resistor R1_3, an amplifier U1_ a, a transistor Q1_1, a resistor R1_6, a resistor R1_10, a resistor R1_8, a resistor R1_2, a resistor R1_5, a triode Q1_2, a triode Q1_3, a MOS transistor Q1_4, an amplifier U1_ B, a resistor RL _1, a resistor R1_12, a resistor R1_13, a signal interface Vol +, and a signal interface Vol-;
wherein, one end of the resistor R1_1 is connected to the power management unit (3), one end of the resistor R1, the other end of the fuse F1, the negative electrode of the diode D1, and one end of the resistor RH _1 in sequence, the other end of the resistor R1_1 is connected to the emitter of the transistor Q1_1 and the fifth end of the amplifier U1_ a in sequence, the collector of the transistor Q1_1 is connected to the main control unit (4) and one end of the resistor R1_10 in sequence, the other end of the resistor R1_10 is grounded, the base of the transistor Q1_1 is connected to one end of the resistor R1_6, the other end of the resistor R1_6 is connected to the seventh end of the amplifier U1_ a, the sixth end of the amplifier U1_ a is connected to one end of the resistor R1_3, the other end of the resistor R1_3 is sequentially connected with the other end of the resistor RH _1 and the signal interface Vol +, one end of the resistor R1_8 is connected with the main control unit (4), the other end of the resistor R1_8 is connected with the base of the triode Q1_3, the emitter of the triode Q1_3 is grounded, the collector of the triode Q1_3 is sequentially connected with one end of the resistor R1_2 and the base of the triode Q1_2, the collector of the triode Q1_2 is sequentially connected with the other end of the resistor R1_2, the power management unit (3), the collector of the triode Q2, one end of the resistor R4 and one end of the resistor R2, the emitter of the triode Q1_2 is connected with one end of the resistor R1_5, and the other end of the resistor R1_5 is connected with the gate of the MOS transistor Q1_4, the drain electrode of the MOS transistor Q1_4 is connected to the signal interface Vol-, the source electrode of the MOS transistor Q1_4 is sequentially connected to one end of the resistor RL _1 and the third end of the amplifier U1_ B, the fourth end of the amplifier U1_ B is sequentially connected to the power management unit (3), the collector of the triode Q2, one end of the resistor R4, one end of the resistor R2, the collector of the triode Q1_2, and the other end of the resistor R1_2, the first end of the amplifier U1_ B is sequentially connected to the main control unit (4) and one end of the resistor R1_13, the other end of the resistor R1_13 is sequentially connected to the second end of the amplifier U1_ B and one end of the resistor R1_12, the other end of the resistor R1_12 is sequentially connected to the other end of the resistor RL _1 and the drain electrode of the MOS transistor Q3, and the fifth end of the amplifier U1_ B is grounded.
3. The multi-output current-limiting control circuit according to claim 2, wherein the power management unit (3) comprises a transistor Q4, a transistor Q5, a resistor R7, a resistor R8, a capacitor C1, a capacitor C2, a capacitor C3, a zener diode ZD1, and a zener diode ZD2;
an emitting electrode of the triode Q5 is sequentially connected with the main control unit (4) and one end of the capacitor C3, the other end of the capacitor C3 is sequentially connected with an anode of the zener diode ZD1, one end of the capacitor C2, an anode of the zener diode ZD2 and one end of the capacitor C1 and is grounded, a cathode of the zener diode ZD1 is sequentially connected with one end of the resistor R8 and a base electrode of the triode Q5, the other end of the resistor R8 is sequentially connected with a collector of the triode Q5, the other end of the capacitor C2, an emitting electrode of the triode Q4, a fourth end of the amplifier U1_ B, a collector of the triode Q1_2, the other end of the resistor R1_2, a collector of the triode Q2, one end of the resistor R4 and one end of the resistor R2, a base electrode of the triode Q4 is sequentially connected with a cathode of the zener diode ZD2 and one end of the resistor R7, the other end of the resistor R1_ C7, one end of the resistor R1_ D1 and one end of the fuse diode.
4. The multi-output current-limiting control circuit of claim 3, wherein the main control unit (4) comprises an MCU1, a resistor R22, a resistor R23, a resistor R24, a diode LED _ Vin, and a plurality of groups of diode LED _ Vo;
the fourth pin of the MCU1 is connected to the input voltage signal V1, the first pin of the MCU1 is grounded, the third pin of the MCU1 is connected to the emitter of the transistor Q5 and one end of the capacitor C3, the fifth pin of the MCU1 is connected to the collector of the transistor Q1_1 and one end of the resistor R1_10 in sequence, the fourth pin and the sixth pin of the MCU1 to the tenth pin are connected to the first end of the amplifier U1_ B and one end of the resistor R1_13 in the multiple output monitoring unit (2) in sequence, the eleventh pin of the MCU1 is connected to the other end of the resistor R3 and the other end of the resistor R2 in sequence, the twelfth pin and the thirteenth pin of the MCU1 are connected to one end of the resistor R1_8 in the multiple output monitoring unit (2) in sequence, the twenty-seventh pin of the MCU1 is connected to one end of the resistor R22, the fourteenth pin of the MCU1 is connected to one end of the resistor R23, the first pin of the second pin of the resistor R1 is connected to one end of the negative resistor R24, and the other end of the diode Vin of the LED diode Vin are connected to the negative terminal of the diode Vo diode 24.
5. The multi-output current-limiting control circuit according to claim 2, wherein the resistor RH _1, the resistor R1_3, the amplifier U1_ a, the transistor Q1_1, and the resistor R1_10 form a mirror-phase current sampling circuit, a sampling voltage on the resistor R1_10 is connected to the main control unit (4), and a sampling voltage value is:
IH1=R1_10X(IH_1X RH_1)/R1_1。
6. the multi-output current-limiting control circuit of claim 5, wherein the resistor RL _1, the resistor R1_12, the resistor R1_13 and the amplifier U1_ B constitute a low-side current sampling circuit, and the current sampling values are:
IL1=(R1_12+R1_13)X(IL_1X RL_1/R1_12)。
7. the multi-output current-limiting control circuit of claim 3, wherein the capacitors C1 and C3 are configured as power supply high frequency filter capacitors.
CN202011087028.5A 2020-10-12 2020-10-12 Multi-output current-limiting control circuit Active CN112235897B (en)

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