JPH02187053A - Integrated circuit component - Google Patents

Abstract

PURPOSE:To improve tight-adhesiveness between a board and a device and realize high integrity by a method wherein a metallized layer composed of mixed layers is provided on the AlN ceramics board and the device is soldered to the metallized layer with metal having a specific melting point. CONSTITUTION:A metallized layer 21 composed of mixed layers of AlN ceramics and Ni and Cu is formed on an AlN ceramics board 1. Then a silicon IC chip 23 is soldered to the layer 21 with metal having a relatively low melting point not higher than 560 deg.C. Under the temperature not higher than 560 deg.C, the difference in thermal expansion between the ceramics and the metal in the layer 21 can be absorbed by the mixed layers, so that the peeling-off of the layer 21 can be avoided. Moreover, as the AlN ceramics has a high thermal conductivity, even if the layer 21 and the chip 23 generate heat during the operation, the heat is discharged satisfactorily. With this constitution, the peeling-off of the metallized layer can be avoided.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to integrated circuit components such as hybrid IC circuit components.

[Conventional technology]

As silicon ICs become smaller and more dense, technology for mounting elements in hybrid IC circuits at a higher density is progressing. Recently, wiring has been done three-dimensionally,
Furthermore, techniques for three-dimensionally mounting elements have also been proposed. As devices are packed in high density, I
Countermeasures against heat generation from C chips, resistive elements, and wiring conductors have become an important issue. In particular, silicon bipolar transistors are used in CPUs (numeric processing processors) that require high-speed operation, but this type of transistor consumes about 200% less power per bit than C-MO3 transistors. Therefore, the circuit must be manufactured with sufficient consideration for heat dissipation.

Aj! has traditionally been used as a substrate material for hybrid IC circuits. g
os (alumina) has been used, but this Af
i, O8 has low thermal conductivity (20 W/mK), and therefore cannot dissipate heat from elements etc. well.

As a substrate material to replace Al t O3, ANN ceramics are attracting attention because of their good thermal conductivity. AlN ceramics and A2□0. Table 1 shows the main characteristics of

Table 1 However, this AlN ceramic has a coefficient of thermal expansion (4
, 4X 10-'/''C) is silicon (its thermal expansion coefficient is 3.
6 x 10" (°C), which allows for good bonding of silicon IC chips; on the other hand, copper, 1
! , gold (thermal expansion coefficient: 15 to 20X10-"/"C), etc., so when the surface is metalized with these metals and this metalized layer is used as a wiring conductor, etc., the metalized If this is done at a high temperature, there is a problem that distortion occurs due to the difference in thermal expansion coefficients when cooling to room temperature. Furthermore, this AI! , N ceramics have poor wettability with most metals and are difficult to metallize.

/IN Conventionally, the metallization of the ceramic substrate surface is
This is done using the following methods.

■AlNAlN ceramic surface is oxidized at 1000°C or higher to produce Al! Os, and on this oxide layer Mo-
A metallized layer is formed using the Mn method or the like.

(2) Ti is deposited on the AlN AlN ceramic surface, and Pt or Au is deposited thereon and heat treated to form a metallized layer. According to this method, the adhesion strength of the metallized layer is 2
It is estimated to be about 5 kg/mm''. This adhesion strength is mainly caused by active Ti reacting with the AlN ceramic substrate and diffusing into the substrate.

[Problem to be solved by the invention]

However, method (2) above has the problem of high cost because it involves high-temperature process treatment at 1000°C or higher, and the Mo-Mn method requires applying a paste of a mixed powder of Mo and Mn to the surface of an AlN ceramic substrate. After that, it is necessary to heat it to about 1500° C. in a superhumidified hydrogen atmosphere, which causes distortion due to the above-mentioned difference in thermal expansion coefficients, resulting in poor yield and, as a result, increased cost.

Further, in the method (2) above, heat treatment (30° to 500° C.) is required to make Ti thicker than the AlN ceramic and to diffuse it into the AlN ceramic substrate, which also causes distortion due to the difference in coefficient of thermal expansion. Furthermore, since soldering or brazing cannot be performed on T1, expensive Pt or Au is vapor-deposited as described above, resulting in an increase in cost. Moreover, when a thermal cycle test is conducted, an adhesion strength of only 1 to 2 kg/am'' is obtained after this test, and sufficient reliability cannot be obtained.

Electroless plating is a typical technique for metallizing near room temperature.
The adhesion strength of the metallized layer to the ceramic substrate is as low as 2 kg/m+*'' at most, resulting in poor reliability and poor yield.

In this way, Aj!
Conventionally, when an N ceramic substrate is used, there have been problems of increased cost and decreased reliability.

An object of the present invention is to provide an integrated circuit component that has good thermal resistance, is highly reliable, and is advantageous for cost reduction.

[Means to solve the problem]

The integrated circuit component of this invention is based on AfiN ceramics, and this AI! , a metallized layer formed on the surface of the N ceramic substrate and having a mixed layer of AlN ceramics and metal near the interface with the IIN ceramic substrate, and a metal having a melting point of 560° C. or less brazed onto the metallized layer. The device is equipped with a

[Effect]

According to the structure of the present invention, the metallized layer formed on the surface of the AlN ceramic substrate has a mixed layer of AlN ceramics and metal near the interface with the AlN ceramic substrate, and the function of this mixed layer makes the metallized layer as a whole ANN
Strongly adheres to the ceramic substrate.

A device is brazed onto the metallized layer with a metal having a relatively low melting point of 560° C. or less. 56
At temperatures below 0°C, the difference in thermal expansion between the AβN ceramics and the metal constituting the metallized layer can be absorbed by the mixed layer, so that the metallized layer does not peel off. That is, the metallized layer has sufficient heat resistance. This makes it possible to successfully mount the element without causing peeling of the metallized layer.

Further, the mixed layer can be formed by using metal vapor deposition and inert gas ion irradiation in such a way that the vapor-deposited metal is pushed into the AlN ceramic substrate by the inert gas ions. The above-mentioned metallized layer can be formed at room temperature. Therefore, distortion due to the difference in coefficient of thermal expansion between the AlN ceramic and the metal constituting the metallized layer does not occur, and it is also advantageous for cost reduction.

Furthermore, since AfN ceramics have high thermal conductivity, even if the metallized layer that becomes the element or wiring conductor generates heat, the heat can be efficiently dissipated.

〔Example〕

FIG. 1 is a sectional view showing the basic structure of a hybrid IC circuit, which is an integrated circuit component according to an embodiment of the present invention.

This hybrid IC circuit consists of an A1,N ceramic substrate 1, a metallized layer 21 patterned on the surface of the AlN ceramic substrate 1, and solder F! on the metallized layer 21. 22 (melting point is 220 to 230° C.) and other elements such as a silicon IC chip 23 and passive elements (not shown) soldered together. A metallized N24 is formed on the surface of the IC chip 23 facing the solder layer 22, and the IC chip 23 is die-bonded with this metallized layer 24 and the solder layer 22 to function as a wiring conductor with the IC chip 23. Electrical connection with the metallized layer 21 is achieved.

In the metallized layer 21, an external connection pin 25 is made of Au-3t or Au-Ge in a part indicated by reference numeral 21a, which is different from the part where the IC chip 23 is die-bonded.
It is fixed using a brazing filler metal 27 having a low melting point (560°C or less) such as . The portion indicated by the reference numeral 21a and the IC chip 23 are connected by a bonding wire 26 connected by, for example, ultrasonic wire bonding. Further, the IC chip 23 and the like are sealed with resin 28 as shown in FIG. 1(2). 2
9 is an adhesive sealing resin such as epoxy resin.

According to such a configuration, AI! Due to the high thermal conductivity of the N ceramic substrate 1, even if the IC chip 23 or the metallization 121 used as a wiring conductor generates heat, this heat can be efficiently dissipated and the functions of each element can work well. can. As a result, it becomes possible to eliminate the problem of heat generation in the elements and achieve higher integration of the elements.

Figure 2 shows metalized N on the surface of the AlN ceramic substrate 1.
21 is a conceptual diagram showing the basic configuration of a thin film forming apparatus for forming 21 in tight contact with each other. FIG.

An AlN ceramic substrate 1 to be metalized is fixed to the surface of a sample holder 3 which is rotated around an axis El within a vacuum chamber 2. A packet type ion source 4 is provided opposite the sample holder 3, and an electron beam heated evaporation i! source is provided in the middle. 115 are provided.

The ion source 4 includes an arc chamber 9 into which Ar gas is introduced from a gas inlet 6, and generates Ar plasma by causing an arc discharge between a filament 7 and a plasma electrode 8 in the arc chamber 9. Ar ions are accelerated toward the sample holder 3 and extracted from the plasma by a suppression electrode 10 and an extraction electrode 11.

12 is a film thickness monitor for measuring the thickness of the metallized layer deposited on the surface of the substrate 1, and 13 is an ion current monitor for detecting the beam current of the ion beam from the ion source 4.

When metallizing the surface of the AlN ceramic SiS 1 using such a thin film forming apparatus, the first step is to evaporate Ni from the smoke source 5 to deposit the N1 metal, and at the same time, Ar ions are evaporated from the ion source 4. irradiate. At this time, the degree of vacuum in the vacuum chamber 2 is 10-h.
Torr, and the gas pressure of Ar gas is 5 to 10
It is assumed to be about 10" Torr. The acceleration energy of Ar ions is 5 to 25 keV. In this way, a mixed layer containing the material of the substrate 1, Ni, and Ar is formed on the surface of the substrate 1.

The formation of this mixed layer is shown in a simplified manner in FIG. 3, where a shows the AlN ceramic substrate 1, b shows the above-mentioned mixed layer, and C shows a vapor deposited layer containing a mixture of At ions and Ni metal. It is. Note that d is Ar ion and e is Ni evaporated product. In the following, a layer composed of a mixed layer and a Ni evaporated layer will be referred to as "rNiNi layer".

Nj evaporation@e evaporated at any rate from 5 to 25 keV
The Ar ions are mixed with the accelerated Ar ions on the surface of the substrate 1. At this time, Ni atoms are sputtered or pushed into the substrate 1 by the accelerated Ar ions. In this way, the above-mentioned mixed layer is formed. This mixed layer firmly adheres to the substrate 1, and also firmly adheres to the Ni vapor-deposited color mixed layer.

The Ni vapor deposition and the Ar ion irradiation on the surface of the substrate 1 may be performed simultaneously or alternately. It is possible to form a mixed layer in close contact with the

The thickness of the mixed layer is kept within a range that allows Ar ions to reach the substrate 1, and the thickness of the subsequent Ni evaporated layer is set to 500 to 10,000 so that external conditions do not affect the mixed layer.

The Ar ion irradiation amount per unit time and unit area, and the number of Ni atoms to be deposited are determined so that the Ni deposition rate is slightly larger than the Ni spacking rate R by Ar ions. Ru. As a result, N1 layer 3
1 is the aforementioned AI! , N will grow on the surface of the ceramic substrate 1.

The sputtering rate R depends on the acceleration energy of Ar ions, but does not increase much even if this energy is about 100 keν.

There is an optimum value for the number of Ni atoms that should be injected into the AlN ceramic cis-I. The number of Ni atoms pushed in is A
The higher the acceleration energy of r ions, the more they cause cascade collisions, but when the energy of At ions is too high, Ar ions pass through N1t131 and Ni atoms cannot be pushed into substrate 1. .

Next, as a second step, Cu is deposited on the Ni layer 31. At this time, Ar ion irradiation and Cu evaporation are performed simultaneously or alternately as a treatment near the interface of the Ni evaporated layer color at the initial stage of deposition, and then Ar ion irradiation is stopped and only Cu evaporation is performed. conduct. Its thickness is 500~2
Approximately 0,000 people.

The Cu [32 (see FIG. 1) formed in this way can be formed in close contact with the Ni vapor deposited layer C.

Furthermore, after forming the Cu layer 32, this CuJW 32
A photoresist mask is patterned on the surface and the N
Etching the i layer 31 and C+JJ32,
A wiring pattern is formed on the surface of the IN ceramic substrate 1.

On this wiring pattern, as necessary. A Cu plating layer (not shown) with a layer thickness of 1 to 1Q71m is formed by formula plating.
is formed. In this example, this Cu plating l, N
1 layer 31. The Cu layer 32 constitutes the metallized layer 21 .

This metallized layer 21 is formed between the substrate 1 and the Ni 131,
Since there is sufficient adhesion strength between the N1 layer 31 and the Cu layer 32 and between the Cu@32 and the Cu plating layer, the entire structure is firmly adhered to the substrate 1. Furthermore, no high-temperature process is involved in the formation of this metallized layer 1m21, and therefore distortion caused by the difference in coefficient of thermal expansion between AlN and Ni, etc., and peeling of the metallized layer 21 do not occur. Furthermore, this metallized layer 2
In No. 1, Ni metal has a high melting point and good wettability to solder. Therefore, the metallization 12
When soldering an element such as the IC chip 23 to the substrate 1 on which the IC chip 23 is formed, the metallization 121 will not melt during soldering, so the element can be reliably mounted without causing so-called solder erosion. be able to. Further, although the electrical resistance of Ni is not as small as that of Cu, in this embodiment, the metallized layer 21 is composed of NiN31 and CuN32.
Since it has a so-called 2N structure including the above, its electrical resistance can be sufficiently reduced and it can function well as a wiring conductor.

Test examples by the inventor of the present invention are shown below.

The degree of vacuum in the vacuum chamber 2 is I O-'Torr,
The acceleration energy of Ar ions is 25 keV, and AlN
A sample was prepared in which the metallized layer 21 described above was formed on the surface of the ceramic substrate 1, and the metallized layer Ji1 of this sample was
A rod-shaped body of aluminum was adhered to the surface of No. 21 using an epoxy adhesive, and a tensile test was conducted. Ar ion irradiation is carried out in consideration of the sputtering rate of Ar ions.
The implantation stopped when the peak of the ion implantation depth reached the interface of the substrate 1. Other conditions are as follows.

Ar ion irradiation dose, IQ+'1 piece/CI
! Transport ratio (Ni/Ar): 4 Layer thickness of Ni layer 31: 3000 Layer thickness of Cu layer 32:
1pm and 560°CX on the metallized layer.
A sample subjected to vacuum annealing treatment for 3 minutes (vacuum degree 10-') was prepared, and a thermal cycle test was conducted in accordance with Japanese Industrial Standard C-5030 along with a sample not subjected to the above-mentioned annealing treatment, and the tensile strength before and after this test was determined. was measured.

The above test results are shown in Table 2 below.

Table 2 and Table 3 below show, as a comparative example, a Tt layer and an N1F layer formed by sputtering on the surface of the AlN ceramic substrate 1.
Similar test results are shown for metallized layers formed by stacking 1.

Table 3 In Tables 2 and 3 above, the unit of adhesion strength is kg/Ill! l” and the inequality sign “〉”
indicates that the adhesive was broken during the tensile test, and therefore indicates that the adhesion strength of the metallized layer at that time was greater than the subsequent values.

First, by comparing Tables 2 and 3 above, the metallized N21 formed on the surface of the AlN ceramic substrate 1 in this example shows significantly higher adhesion strength than when the metallized layer is formed by sputtering. That is understood.

From the comparison of the adhesion strength with and without annealing in Table 2 above, there is almost no difference between the two, and therefore the metallized layer 21 has sufficient heat resistance (5.
60°C). Further, the adhesion strength values after the thermal cycle test in Table 2 are sufficiently large, so that the metallized N21 does not peel off due to the difference in thermal expansion coefficient between A72N ceramics and Ni, Cu, etc.

As described above, the metallized N21 is formed on the surface of the AlN ceramic substrate 1 with high adhesion strength. This metallized lI21 has heat resistance sufficient to withstand temperatures during soldering and brazing. Furthermore, the metallized layer 21 does not peel off due to the difference in thermal expansion between the AfiN ceramic and the metal forming the metallized layer due to thermal cycles. Therefore, the metallization F124 does not peel off due to heat generation during use of elements such as the IC chip 23 and thermal cycles of cooling after use.

As a result of the metallized layer 24 being formed in close contact with the AlN ceramic substrate 1 in this way,
The hybrid IC circuit shown in FIG. 1 can have high reliability. Furthermore, the metallized layer 21 can be formed at room temperature as described above, which is advantageous in reducing production costs. Furthermore, as mentioned above, AlN ceramics have high thermal conductivity, so in the hybrid IC circuit, heat can be effectively dissipated from elements such as the IC chip 23 and the wiring conductor made of the metallized layer 21. , the functions of the elements can be made to work well. As a result of the heat dissipation being performed well, the problem of heat generation can be eliminated, and higher integration of elements can be advantageously promoted.

In the above embodiment, Ar gas was used when forming the metallized layer, but other inert gases (He, Ne,
Kr, Xe, Nz) may also be used.

Further, in the above embodiment, the Ni layer 31 is first formed on the surface of the AfN ceramic substrate 1, and then the Cu layer 31 is formed on the Ni layer 31.
Although the layer 32 is formed, after forming a Cu layer on the surface of the substrate 1, N1Fi may be formed on this Cu layer.
The layer can also act as a protective layer.

Furthermore, in the embodiments described above, the metallized layer 21
The Ar ion irradiation during the formation of the mixed layer was limited to the formation of the mixed layer C and was not performed when the Ni vapor deposition layer C was formed, but Ar ion irradiation may also be performed during the formation of the Ni vapor deposition layer C. . However, in this case, A
The sputtering effect of the r ions suppresses the growth of the metallized layer, and also causes lattice defects in the metallized layer, which may lead to deterioration in the strength of the metallized layer.

Further, in the above-described embodiment, patterning of the metallization 1121 was performed by patterning the N1Fi31 and CuN32 over the entire surface of the AlN ceramic substrate 1, but The Ni1i layer 31 and the Cu layer 32 may be selectively formed on the surface of the AlN ceramic substrate 1 by forming a photoresist mask on the surface of the ceramic substrate 1.

〔Effect of the invention〕

As described above, according to the integrated circuit component of the present invention, AfN
Near the interface between the ceramic substrate and the metallized layer, A
A mixed layer of fN ceramics and metal forming the metallized layer is present. Due to the function of this mixed layer, the metallized layer is sufficiently firmly adhered to the AlN ceramic substrate.

The device is mounted on the metallized layer by being soldered with a metal having a relatively low melting point of 560° C. or less. At temperatures below 560°C, the difference in thermal expansion between the AlN ceramic and the metal constituting the metallized layer can be absorbed by the mixed layer, so the metallized layer will not peel off, and the element The metallized layer does not peel off due to the thermal cycle of heat generation during use and cooling after use.In this way, the device can be mounted well, and as a result, the reliability of the integrated circuit component is improved. Convertibility is greatly improved.

Moreover, the formation of the metallized layer can be performed at room temperature, so that distortion etc. do not occur due to the difference in thermal expansion coefficient between the metal constituting the metallized layer and the ANN ceramic, and furthermore, it is advantageous for cost reduction. It is.

Furthermore, since the AlN ceramic has high thermal conductivity, even if the metallized layer or element that becomes the wiring conductor generates heat, the heat can be efficiently dissipated. As a result, the problem of heat generation can be eliminated and high integration of integrated circuit components can be advantageously achieved.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the basic configuration of a hybrid IC circuit, which is an integrated circuit component according to an embodiment of the present invention, and FIG. 2 is a thin film forming apparatus for forming a metallized layer on the surface of an AlN ceramic substrate 1. Conceptual diagram showing the basic configuration,
FIG. 3 is an explanatory diagram showing, in simplified form, how the surface of the AlN ceramic cis i1 is metalized.

Claims (1)

[Claims] An AlN ceramic substrate;
An integrated circuit component comprising: a metallized layer having a mixed layer of AlN ceramics and metal near an interface with an N ceramic substrate; and an element brazed with a metal having a melting point of 560° C. or less on the metallized layer.