JPH02183545A - Manufacture of hybrid integrated circuit - Google Patents
Manufacture of hybrid integrated circuitInfo
- Publication number
- JPH02183545A JPH02183545A JP301489A JP301489A JPH02183545A JP H02183545 A JPH02183545 A JP H02183545A JP 301489 A JP301489 A JP 301489A JP 301489 A JP301489 A JP 301489A JP H02183545 A JPH02183545 A JP H02183545A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- circuit board
- circuit substrate
- electronic parts
- film circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 229920005989 resin Polymers 0.000 claims abstract description 34
- 239000011347 resin Substances 0.000 claims abstract description 34
- 238000007789 sealing Methods 0.000 claims abstract description 13
- 239000012528 membrane Substances 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 7
- 239000002184 metal Substances 0.000 abstract description 5
- 239000008188 pellet Substances 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 239000000919 ceramic Substances 0.000 abstract description 3
- 238000005538 encapsulation Methods 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 abstract 4
- 230000006866 deterioration Effects 0.000 abstract 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Casings For Electric Apparatus (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は混成集積回路の製造方法に関し、特にプリコー
ト樹脂の塗布方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a hybrid integrated circuit, and more particularly to a method for applying a precoat resin.
従来の混成集積回路の製造方法は、まず第2図(a)に
示すように、リード4が固定されたセラミック等からな
る膜回路基板2の表面に半導体ベレットや抵抗等からな
る電子部品IA、IBを搭載したのち、保護膜としての
プリコート樹脂3を半導体ベレット等の電子部品IA上
に塗布する。In the conventional method for manufacturing a hybrid integrated circuit, first, as shown in FIG. 2(a), an electronic component IA consisting of a semiconductor pellet, a resistor, etc. is placed on the surface of a membrane circuit board 2 made of ceramic or the like to which leads 4 are fixed. After mounting the IB, a precoat resin 3 as a protective film is applied onto the electronic component IA such as a semiconductor pellet.
次に第2図(b)に示すように、プリコート樹脂3で電
子部品を封止した膜回路基板2をケース6中にセットし
たのち、封止樹脂5で膜回路基板2等を封止し混成集積
回路を完成される。Next, as shown in FIG. 2(b), the membrane circuit board 2 with the electronic components sealed with the precoat resin 3 is set in the case 6, and then the membrane circuit board 2, etc. is sealed with the sealing resin 5. Completed hybrid integrated circuit.
しかしながら、上述した従来のプリコート方法では、一
部の電子部品にのみプリコート樹脂が塗布されるため、
膜回路基板2の部品搭載面に凹凸が形成され、第2図(
b)に示したように、封止樹脂5を満した場合この凹凸
部に空気7が残る。However, in the conventional pre-coating method described above, the pre-coating resin is applied only to some electronic components.
Irregularities are formed on the component mounting surface of the membrane circuit board 2, as shown in FIG.
As shown in b), when the sealing resin 5 is filled, air 7 remains in the uneven portion.
このため、空気7の膨張によりプリコート樹脂3が押さ
れ、内部に封入された半導体ベレットの金属細線が切れ
たり、また封止樹脂が薄くなるため耐湿性が低下する等
の欠点がある。For this reason, the precoat resin 3 is pushed by the expansion of the air 7, causing the thin metal wires of the semiconductor pellet sealed inside to break, and the sealing resin becoming thinner, resulting in a decrease in moisture resistance.
本発明の混成集積回路の製造方法は、リードを有する膜
回路基板上に電子部品を搭載したのち該電子部品上をプ
リコート樹脂で封止する工程と、プリコート樹脂で封止
した電子部品を有する膜回路基板をキャップの中にセッ
トし封止樹脂で封止する工程とを有する混成集積回路の
製造方法において、前記膜回路基板の電子部品搭載面全
面にプリコート樹脂を塗布するものである。The method for manufacturing a hybrid integrated circuit of the present invention includes a step of mounting an electronic component on a film circuit board having leads and then sealing the electronic component with a precoat resin, and a film having the electronic component sealed with the precoat resin. A method for manufacturing a hybrid integrated circuit comprising the steps of setting a circuit board in a cap and sealing it with a sealing resin, in which a precoat resin is applied to the entire electronic component mounting surface of the membrane circuit board.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図(a)、(b)は本発明の一実施例を説明するた
めの膜回路基板の断面図である。FIGS. 1(a) and 1(b) are cross-sectional views of a membrane circuit board for explaining one embodiment of the present invention.
まず第1図(a)に示すように、リード4を有するセラ
ミック等からなる膜回路基板2上に半導体ペレットや抵
抗等からなる電子部品IA、1.8を搭載したのち、こ
の電子部品搭載面全面をフェノール系樹脂やシリコン系
樹脂等からなるプリコート樹脂3を塗布する。First, as shown in FIG. 1(a), electronic components IA, 1.8 made of semiconductor pellets, resistors, etc. are mounted on a membrane circuit board 2 made of ceramic or the like having leads 4. A precoat resin 3 made of phenolic resin, silicone resin, etc. is applied to the entire surface.
次に第1図(b)に示すように、従来と同様に樹脂等か
らなるキャブ6内に膜回路基板2をセットしたのち、封
止樹脂5でその表面を封止する。Next, as shown in FIG. 1(b), the membrane circuit board 2 is set in a cab 6 made of resin or the like as in the conventional case, and its surface is sealed with a sealing resin 5.
このように本実施例によれば、電子部品IA。As described above, according to this embodiment, the electronic component IA.
IBが搭載された膜回路基板2の表面は、全面にわたっ
てプリコート樹脂3により覆われているため、封止樹脂
5で封止した場合、空気の残留量は極めて少くなる。従
って金属細線が切れたり耐湿性が低下することはなくな
る。Since the surface of the membrane circuit board 2 on which the IB is mounted is entirely covered with the precoat resin 3, when it is sealed with the sealing resin 5, the amount of residual air is extremely small. Therefore, the thin metal wire will not break or the moisture resistance will decrease.
以上説明したように本発明は、膜回路基板の電子部品搭
載面全面にプリコート樹脂を塗布する事により、樹脂封
入時の空気の残留量を少なくすることができる効果があ
る。従って金属細線の断線や耐湿性の低下がなくなるた
め、混成集積回路の信頼性を向上させる事が出来る。As explained above, the present invention has the effect of reducing the amount of air remaining during resin encapsulation by applying precoat resin to the entire surface of the electronic component mounting surface of the membrane circuit board. Therefore, the reliability of the hybrid integrated circuit can be improved because there is no disconnection of the thin metal wires or a decrease in moisture resistance.
第1図(a)、(b)は本発明の一実施例を説明する為
の膜回路基板の断面図、第2図(a)。
(b)は従来例を説明する為の膜回路基板の断面図であ
る。
LA、IB・・・電子部品、2・・・膜回路基板、3・
・・プリコート樹脂、4・・・リード、5・・・封止樹
脂、6・・・ケース、7・・・空気。
3:プリコート樹脂 に、ケース
第1図FIGS. 1(a) and 1(b) are cross-sectional views of a membrane circuit board for explaining one embodiment of the present invention, and FIG. 2(a) is a sectional view of a membrane circuit board. (b) is a sectional view of a membrane circuit board for explaining a conventional example. LA, IB...Electronic components, 2...Membrane circuit board, 3.
... Precoat resin, 4... Lead, 5... Sealing resin, 6... Case, 7... Air. 3: Pre-coated resin, case diagram 1
Claims (1)
ち該電子部品上をプリコート樹脂で封止する工程と、プ
リコート樹脂で封止した電子部品を有する膜回路基板を
キャップの中にセットし封止樹脂で封止する工程とを有
する混成集積回路の製造方法において、前記膜回路基板
の電子部品搭載面全面にプリコート樹脂を塗布すること
を特徴とする混成集積回路の製造方法。A process of mounting electronic components on a membrane circuit board with leads and then sealing the electronic components with pre-coat resin, and setting the membrane circuit board with electronic components sealed with pre-coat resin in a cap and sealing. A method for manufacturing a hybrid integrated circuit comprising a step of sealing with a resin, the method comprising applying a pre-coat resin to the entire surface of the electronic component mounting surface of the membrane circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP301489A JPH02183545A (en) | 1989-01-09 | 1989-01-09 | Manufacture of hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP301489A JPH02183545A (en) | 1989-01-09 | 1989-01-09 | Manufacture of hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02183545A true JPH02183545A (en) | 1990-07-18 |
Family
ID=11545486
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP301489A Pending JPH02183545A (en) | 1989-01-09 | 1989-01-09 | Manufacture of hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02183545A (en) |
-
1989
- 1989-01-09 JP JP301489A patent/JPH02183545A/en active Pending
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