JPH02178913A - Photomask - Google Patents

Photomask

Info

Publication number
JPH02178913A
JPH02178913A JP63331534A JP33153488A JPH02178913A JP H02178913 A JPH02178913 A JP H02178913A JP 63331534 A JP63331534 A JP 63331534A JP 33153488 A JP33153488 A JP 33153488A JP H02178913 A JPH02178913 A JP H02178913A
Authority
JP
Japan
Prior art keywords
electronic circuit
circuit pattern
mask
shielding frame
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63331534A
Other languages
Japanese (ja)
Inventor
Takao Nishiguchi
隆男 西口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63331534A priority Critical patent/JPH02178913A/en
Publication of JPH02178913A publication Critical patent/JPH02178913A/en
Pending legal-status Critical Current

Links

Landscapes

  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To decrease the quantity of static electricity charged in an IC electric circuit pattern so as to reduce the probability for generating a breakdown of an IC electronic circuit pattern by providing a conductive pattern around a light shielding frame which surrounds the IC electronic circuit pattern. CONSTITUTION:An IC electronic circuit pattern 1 is formed at the center of a mask main body 4, and the light shielding frame 2 for a reduction projection exposer is so formed as to surround this IC electronic circuit pattern 1, and further a conductive pattern 3a by a metallic film is so provided as to surround this light shielding frame 2. By providing this conductive pattern 3a, static electricity, which arises when releasing the contact condition between a master mask and a working mask, can be charged into not only the IC electronic circuit pattern 1 and the light shielding frame 2 but also this conductive pattern. Hereby, the quantity of static electricity of the IC electronic circuit pattern 1 decreases, so the breakdown of the IC electronic circuit pattern by discharge can be decreased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体集積回路装置の製造工程におけるホ1〜
エッチング工程に使用するボ1へマスクに関し、特にマ
スクマスクに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to
The present invention relates to a mask used in an etching process, and particularly to a mask.

〔従来の技術〕[Conventional technology]

従来、この種のポI・マスクは、マスタマスクと実際に
エツチング工程て使用するワーキクマスクとかある。こ
のワーキクマスクはマスタマスクを転写して製作される
Conventionally, this type of point mask includes a master mask and a working mask used in the actual etching process. This work mask is produced by transferring a master mask.

通常、このマスタマスクは、透明なカラス板に静電防止
用の導電膜を形成し、その上にICの電子回路パターン
を金属膜て形成している。また、ワーキンクマスクは、
カラス板上に金属膜を形成し、この」二にレジストを塗
布し、これにマスクパターンを密着させ、紫外線等で電
子回路パターンを転写させて製作している。
Usually, this master mask is made by forming a conductive film for preventing static electricity on a transparent glass plate, and forming an electronic circuit pattern of an IC with a metal film thereon. In addition, the working mask is
A metal film is formed on a glass plate, a resist is applied to this film, a mask pattern is adhered to this, and an electronic circuit pattern is transferred using ultraviolet rays or the like.

〔発明か解決しようとする課題〕[Invention or problem to be solved]

上述した従来のマスクマスクでは、カラス基板上に導電
膜を形成することによりI Cの電子回路パターンの破
壊を防止しているものであるが、通常のカラス基板上に
金属膜を形成したワーキグマスクに比べ非常に高価であ
り、また、通常のポ1〜マスクエッチング工程で使用さ
れている熱酸による洗浄工程に耐えられないという欠点
がある。
The conventional mask described above prevents destruction of the IC electronic circuit pattern by forming a conductive film on a glass substrate, but a working mask with a metal film formed on a normal glass substrate In addition, it is very expensive and cannot withstand the hot acid cleaning process used in the normal mask etching process.

一方、このマスタマスクに導電膜を形成しない場合には
、以下の問題がある。例えば、マスタマスクのIC電子
回路パターンをワーキングマスクに転写する工程におい
て、マスタマスクとワーキングマスクをレジスト介して
密着させ、転写後にこの密着状態を解除するとき、マス
タマスクのIC電子回路パターンとワーキングマスクの
レシス1〜との間に静電気か発生ずる。この静電気が、
マスクマスのIC電子回路パターン内、または、このパ
ターンとこのパターンを囲む縮小投影露光機用の遮光枠
との間て放電し、しばしば、IC電子回路パターンを破
壊するという問題がある。
On the other hand, when a conductive film is not formed on this master mask, the following problems occur. For example, in the process of transferring the IC electronic circuit pattern of the master mask to the working mask, the master mask and the working mask are brought into close contact with each other through the resist, and when this close contact is released after the transfer, the IC electronic circuit pattern of the master mask and the working mask are Static electricity is generated between resistance 1 and . This static electricity
There is a problem in that discharge occurs within the IC electronic circuit pattern of the mask mass or between this pattern and the light-shielding frame for the reduction projection exposure machine that surrounds this pattern, often destroying the IC electronic circuit pattern.

この放電する確率は、IC電子回路パターン形状て異な
る。特に、このIC電子回路パターンと遮光枠と接続さ
れていない場合は、30%と非常に高い確率になる。ま
た、導電膜か施されている場合でも確率か低いか放電し
破壊されることかある。
The probability of this discharge differs depending on the shape of the IC electronic circuit pattern. In particular, if this IC electronic circuit pattern is not connected to the light-shielding frame, the probability is as high as 30%. Furthermore, even if a conductive film is applied, there is a low probability that it will be damaged by discharge.

本発明の目的は、IC電子回路パターンの破壊の発生確
率を大幅に低減するホl〜マスクを提供することである
An object of the present invention is to provide a mask that significantly reduces the probability of occurrence of destruction of IC electronic circuit patterns.

〔課題を解決するための手段゛] 本発明のホ1〜マスクは、透明な四角形状のカラス基板
上の中央領域に形成された金属膜によるIC電子回路パ
ターンと、このIC電子回路パターンの周囲を囲み形成
された金属膜による露光機用の遮光枠と、この遮光枠の
外周囲を囲んて形成された金属膜による導電パターンと
を備え構成される。
[Means for Solving the Problems] The mask of the present invention includes an IC electronic circuit pattern made of a metal film formed in the central region of a transparent rectangular glass substrate, and a periphery of this IC electronic circuit pattern. A light-shielding frame for an exposure machine is formed by a metal film surrounding the light-shielding frame, and a conductive pattern is formed by a metal film surrounding the outer periphery of the light-shielding frame.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示ずポ1〜マスクの平面図
である。このホ1〜マスクであるマスタマスクは、同図
に示すように、マスク本体4の中央にICC電子回路パ
ターン中形成されており、このIC電子回路パターン1
−の周囲を囲むように、縮小投影露光機用の遮光枠2か
形成されている。ここまでは、従来と同じである。
FIG. 1 shows an embodiment of the present invention and is a plan view of the mask. As shown in the figure, the master mask, which is the mask 1 to 1, is formed in the center of the mask body 4 in the ICC electronic circuit pattern.
A light-shielding frame 2 for a reduction projection exposure machine is formed so as to surround the periphery of -. Up to this point, the process is the same as before.

本発明の実施例ては、更に、この遮光枠2の周囲を囲む
ように金属膜による導電パターン3aを設けたことであ
る。この導電パターン3aを設けることにより、マスク
マスクとワーキングマスクとの密着状態を解除するとき
に生ずる静電気をICC電子回路パターン中遮光枠2だ
けでなく、この導電パターンにも帯電することができる
In the embodiment of the present invention, a conductive pattern 3a made of a metal film is further provided to surround the light shielding frame 2. By providing the conductive pattern 3a, static electricity generated when the close contact between the mask mask and the working mask is released can be charged not only to the light-shielding frame 2 in the ICC electronic circuit pattern but also to this conductive pattern.

このことによりIC電子回路パターン1の静電気帯電量
が従来より減少するなめ、放電によるIC電子回路パタ
ーンの破壊が減少する。
As a result, the amount of electrostatic charge on the IC electronic circuit pattern 1 is reduced compared to the conventional case, so that damage to the IC electronic circuit pattern due to discharge is reduced.

第2図は本発明によるもう一つの他の実施例を示すホト
マスクの平面図である。このマスタマスクの場合は、導
電パターン3bが複数本の細い線状の金属層で形成され
ている。このことにより、導電パターンの面積が小さい
か、導電パターン3bが遮光枠2に接近しているため、
実施例と同等の帯電が可能となる。この実施例は前述の
実施例に比べ、導電パターンの面積が小さくでき、パタ
ーンの作製が容易であるという利点がある。
FIG. 2 is a plan view of a photomask showing another embodiment of the present invention. In the case of this master mask, the conductive pattern 3b is formed of a plurality of thin linear metal layers. Due to this, the area of the conductive pattern is small or the conductive pattern 3b is close to the light-shielding frame 2.
Charging equivalent to that in the example is possible. This embodiment has advantages over the previous embodiments in that the area of the conductive pattern can be made smaller and the pattern can be manufactured more easily.

以上実施例で説明したが、この導電パターンは実施例に
示した形状に限定されるものでなく、本発明の主旨は、
このマスタマスク」二の遮光枠の外周囲にこの遮光枠に
接近して導体パターンが設けられていることである。
Although the embodiments have been described above, the conductive patterns are not limited to the shapes shown in the embodiments, and the gist of the present invention is to
A conductive pattern is provided around the outer periphery of the light-shielding frame of the second master mask in close proximity to the light-shielding frame.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明のマスクマスクは、IC電子
回路パターンを囲む遮光枠の外周囲に導電パターンを設
けることによって、IC電子回路パターンに帯電する静
電気量を減少させることが出来るのて、帯電された静電
気の放電によるIC電子回路パターンの破壊する確率を
大幅に減少させることが出来るという効果かある。
As explained above, the mask of the present invention can reduce the amount of static electricity charged on the IC electronic circuit pattern by providing a conductive pattern around the outer periphery of the light-shielding frame surrounding the IC electronic circuit pattern. This has the effect of greatly reducing the probability of destruction of the IC electronic circuit pattern due to electrostatic discharge.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示ずホ1〜マスクの平面図
、第2図は本発明によるもう一つの他の実施例を示ずホ
トマスクの平面図である。 1・IC電子回路パターン、2・・・遮光枠、3・a、
3b・・導電パターン、4・・・マスク本体。
FIG. 1 is a plan view of a photomask showing one embodiment of the present invention, and FIG. 2 is a plan view of a photomask showing another embodiment of the present invention. 1.IC electronic circuit pattern, 2..shading frame, 3.a,
3b... Conductive pattern, 4... Mask body.

Claims (1)

【特許請求の範囲】[Claims] 透明な四角形状のガラス基板上の中央領域に形成された
金属膜によるIC電子回路パターンと、このIC電子回
路パターンの周囲を囲み形成された金属膜による露光機
用の遮光枠と、この遮光枠の外周囲を囲んで形成された
金属膜による導電パターンとを備えたことを特徴とする
ホトマスク。
An IC electronic circuit pattern made of a metal film formed in the central area of a transparent rectangular glass substrate, a light-shielding frame for an exposure machine made of a metal film formed surrounding the IC electronic circuit pattern, and this light-shielding frame. A photomask comprising: a conductive pattern made of a metal film surrounding the outer periphery of the photomask.
JP63331534A 1988-12-29 1988-12-29 Photomask Pending JPH02178913A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63331534A JPH02178913A (en) 1988-12-29 1988-12-29 Photomask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63331534A JPH02178913A (en) 1988-12-29 1988-12-29 Photomask

Publications (1)

Publication Number Publication Date
JPH02178913A true JPH02178913A (en) 1990-07-11

Family

ID=18244735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63331534A Pending JPH02178913A (en) 1988-12-29 1988-12-29 Photomask

Country Status (1)

Country Link
JP (1) JPH02178913A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000036468A1 (en) * 1998-12-14 2000-06-22 Koninklijke Philips Electronics N.V. Photomask with a mask edge provided with a ring-shaped esd protection area
JP2015149390A (en) * 2014-02-06 2015-08-20 キヤノン株式会社 Imprint device, die, and method of manufacturing article
JP2019168677A (en) * 2018-03-23 2019-10-03 Hoya株式会社 Photomask, photomask blank, manufacturing method of photomask, and manufacturing method of electronic device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000036468A1 (en) * 1998-12-14 2000-06-22 Koninklijke Philips Electronics N.V. Photomask with a mask edge provided with a ring-shaped esd protection area
JP2015149390A (en) * 2014-02-06 2015-08-20 キヤノン株式会社 Imprint device, die, and method of manufacturing article
JP2019168677A (en) * 2018-03-23 2019-10-03 Hoya株式会社 Photomask, photomask blank, manufacturing method of photomask, and manufacturing method of electronic device

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