JPH0216586B2 - - Google Patents
Info
- Publication number
- JPH0216586B2 JPH0216586B2 JP19489783A JP19489783A JPH0216586B2 JP H0216586 B2 JPH0216586 B2 JP H0216586B2 JP 19489783 A JP19489783 A JP 19489783A JP 19489783 A JP19489783 A JP 19489783A JP H0216586 B2 JPH0216586 B2 JP H0216586B2
- Authority
- JP
- Japan
- Prior art keywords
- ceramic insulating
- nickel
- metal
- insulating pipe
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 26
- 239000000919 ceramic Substances 0.000 claims abstract description 20
- 238000007789 sealing Methods 0.000 claims abstract description 14
- 229910001096 P alloy Inorganic materials 0.000 claims abstract description 13
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000002844 melting Methods 0.000 claims abstract description 5
- 230000008018 melting Effects 0.000 claims abstract description 4
- 229910052751 metal Inorganic materials 0.000 claims description 40
- 239000002184 metal Substances 0.000 claims description 40
- 239000000463 material Substances 0.000 abstract description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 6
- 229910000679 solder Inorganic materials 0.000 abstract description 5
- 229910052759 nickel Inorganic materials 0.000 abstract description 3
- 229910045601 alloy Inorganic materials 0.000 abstract 2
- 239000000956 alloy Substances 0.000 abstract 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 1
- 229910052698 phosphorus Inorganic materials 0.000 abstract 1
- 239000011574 phosphorus Substances 0.000 abstract 1
- 238000005219 brazing Methods 0.000 description 22
- 239000000945 filler Substances 0.000 description 16
- 238000000034 method Methods 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 238000000465 moulding Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 229910000881 Cu alloy Inorganic materials 0.000 description 3
- NEIHULKJZQTQKJ-UHFFFAOYSA-N [Cu].[Ag] Chemical compound [Cu].[Ag] NEIHULKJZQTQKJ-UHFFFAOYSA-N 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052839 forsterite Inorganic materials 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- HCWCAKKEBCNQJP-UHFFFAOYSA-N magnesium orthosilicate Chemical compound [Mg+2].[Mg+2].[O-][Si]([O-])([O-])[O-] HCWCAKKEBCNQJP-UHFFFAOYSA-N 0.000 description 1
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
Abstract
Description
【発明の詳細な説明】
本発明はセラミツク絶縁物と金属との封着を用
いた容器に半導体素子を収納した半導体装置に関
するものである。従来のこのような半導体装置に
於てはセラミツク絶縁管と金属ベース部品及び封
着用金属部品とは、予めセラミツク絶縁管の内・
外形にほぼ等しい形状に成形された、例えば銀−
銅合金等よりなるロウ材を用い気密封止されてい
た。このような従来の半導体装置に於いては、容
器の組立を行なう際に、組立治具に部品ならびに
ろう材を順次セツトした後、還元雰囲気の炉中で
加熱し、ろう材を溶融することで封止している
が、形状が小さく、かつ厚さの薄いろう材を組立
治具にセツトするのは非常に手間がかかり、容器
組立の作業性が極めて悪かつた。またろう材を成
形する際にろう材が薄く、脆い為、成形の作業性
が悪く、かつ、ろう材に変形やわれを生じ歩留り
を著しく低下させ、ろう材の価格が極めて高くな
るといつた欠点を有していた。また、こうした価
格面での欠点に加え、組立の際、被ろう付部品
と、ろう材の位置ずれにより、ろう付部でろう材
量のばらつきを生じろう溜り、隙間を生じ、これ
により気密性を損なうといつた品質面での欠点を
有していた。本発明は従来の半導体装置のこのよ
うな欠点を除去することを目的とするもので、セ
ラミツク絶縁管の両端面に施された金属化層の最
外表面にニツケル−リンの合金層を形成し、この
ニツケル−リン合金層を溶融することにより金属
部品を気密封止することを特徴とするものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device in which a semiconductor element is housed in a container using sealing between a ceramic insulator and a metal. In such a conventional semiconductor device, the ceramic insulating tube, the metal base part, and the sealing metal part are connected in advance to the inside of the ceramic insulating tube.
For example, silver molded into a shape that is almost the same as the outer shape.
It was hermetically sealed using a brazing material made of copper alloy or the like. In such conventional semiconductor devices, when assembling a container, parts and brazing material are sequentially set in an assembly jig and then heated in a furnace with a reducing atmosphere to melt the brazing material. Although the container was sealed, it was very time-consuming to set the small-sized and thin brazing filler metal in the assembly jig, and the workability of assembling the container was extremely poor. Another disadvantage is that when molding the filler metal, the filler metal is thin and brittle, making the molding process difficult, and also causing deformation and cracking of the filler metal, significantly lowering the yield, and making the price of the filler metal extremely high. It had In addition to these disadvantages in terms of price, during assembly, misalignment between the parts to be brazed and the filler metal causes variations in the amount of filler metal in the brazed area, creating a pool of solder and a gap, resulting in poor airtightness. It had quality defects that could impair the quality of the product. The present invention is aimed at eliminating these drawbacks of conventional semiconductor devices, and involves forming a nickel-phosphorus alloy layer on the outermost surface of the metallized layer applied to both end faces of a ceramic insulating tube. , is characterized in that metal parts are hermetically sealed by melting this nickel-phosphorus alloy layer.
このような本発明の半導体装置に於ては容器の
組立を行なう際に組立治具には従来のロウ材は不
要で被ろう付部品のみをセツトするだけでよい
為、作業性が著しく容易であり、また所定の形状
に成形されたろう材を製作するのに比べて、ニツ
ケル−リンの合金層は例えばめつきにより容易に
形成できる為、コストを安くすることができる。
さらにこうした価格面での効果に加え、セラミツ
ク絶縁管のろう付面となる金属化層全面に、ニツ
ケル−リン合金層をめつきにより均一に形成する
ことができる為、ろう溜り、隙間等を生じること
のない、気密性に優れた半導体装置を提供するこ
とができる。次に本発明を更に詳細に説明する為
に、従来の半導体装置ならびに本発明の半導体装
置の一実施例につき図面を参照して説明する。第
１図は従来の半導体装置を示す縦断面図であり、
第２図はその組立方法を説明する為の概要図であ
る。第３図は本発明の半導体装置の一実施例を示
す縦断面図であり、第４図はその組立方法を説明
する為の概要図である。第１図に於て、１０１は
例えばアルミナ、フオルステライト、ステアタイ
ト等よりなるセラミツク絶縁管で、その両端面に
は高融点金属の例えばモリブデン、マンガン等よ
りなる金属化層１０２，１０３が形成され、ニツ
ケル等のめつき（図示せず）が施されている。該
セラミツク絶縁管１０１の一端には例えば、銅、
コバール、鉄等よりなる金属ベース部品１０４が
例えば銀−銅合金等よりなるろう材１０５により
気密封止され、他端には例えばコバール、鉄、鉄
−ニツケル合金等よりなり、キヤツプ（図示せ
ず）を気密封止する為の封着用金属部品１０６
が、例えば銀−銅合金等よりなるろう材１０７に
より気密封止されている。このようにして構成さ
れた容器１００に半導体素子１０８を収納し、半
導体素子１０８の電極（図示せず）と前記封着用
金属部品１０６とを例えば金、アルミニウム等よ
りなる金属細線１０９で電気的に接続し、前記キ
ヤツプを封着用金属部品１０６に電気抵抗溶接等
により気密封止する。このような従来の半導体装
置に於ては、容器１００の組立を行なう際に、第
２図に示すように、カーボン等よりなる組立治具
１１０に金属ベース部品１０４、ろう材１０５、
セラミツク絶縁管１０１、ろう材１０７、封着用
金属部品１０６を順次セツトし、還元雰囲気の炉
中で加熱し、ろう材１０５，１０７を溶融し、セ
ラミツク絶縁管１０１に金属ベース部品１０４、
封着用金属部品１０６を気密封止しているが、形
状が小さく、かつ厚さの薄いろう材１０５，１０
７を組立治具１１０にセツトするのは手間がかか
り、容器１００の組立の作業性が極めて悪かつ
た。また、ろう材１０５，１０７を成形する際
に、ろう材１０５，１０７は薄く、かつ脆い為、
ろう材１０５，１０７に変形やわれを生じたり、
かつ成形の作業性も悪く、ろう材１０５，１０７
の価格が極めて高くなるといつた欠点を有してい
た。また、こうした価格面での欠点に加え、組立
の際、ろう材１０５，１０７の位置ずれにより、
ろう付部でろう材量のばらつきを生、ろう溜り１
１１、隙間１１２を生じ、これにより気密性を損
なうといつた品質面での欠点を有していた。 In the semiconductor device of the present invention, when assembling the container, the conventional brazing material is not required in the assembly jig, and only the parts to be covered with braze need to be set, which greatly facilitates the work. In addition, compared to manufacturing a brazing filler metal formed into a predetermined shape, a nickel-phosphorus alloy layer can be easily formed by, for example, plating, so the cost can be reduced.
Furthermore, in addition to these cost advantages, a nickel-phosphorus alloy layer can be uniformly formed on the entire metallized layer, which is the brazing surface of ceramic insulating tubes, by plating, which causes no solder pools or gaps. It is possible to provide a semiconductor device with excellent airtightness without any problems. Next, in order to explain the present invention in more detail, a conventional semiconductor device and an embodiment of the semiconductor device of the present invention will be described with reference to the drawings. FIG. 1 is a vertical cross-sectional view showing a conventional semiconductor device.
FIG. 2 is a schematic diagram for explaining the assembly method. FIG. 3 is a longitudinal cross-sectional view showing one embodiment of the semiconductor device of the present invention, and FIG. 4 is a schematic diagram for explaining its assembly method. In FIG. 1, 101 is a ceramic insulating tube made of, for example, alumina, forsterite, steatite, etc., and metalized layers 102, 103 made of a high-melting point metal such as molybdenum, manganese, etc. are formed on both end surfaces. , nickel or the like (not shown). At one end of the ceramic insulating tube 101, for example, copper,
A metal base part 104 made of Kovar, iron, etc. is hermetically sealed with a brazing filler metal 105 made of, for example, a silver-copper alloy, and the other end has a cap (not shown) made of Kovar, iron, iron-nickel alloy, etc. ) for hermetically sealing metal parts 106
is hermetically sealed with a brazing material 107 made of, for example, a silver-copper alloy. The semiconductor element 108 is housed in the container 100 configured in this way, and the electrodes (not shown) of the semiconductor element 108 and the sealing metal part 106 are electrically connected with a thin metal wire 109 made of, for example, gold or aluminum. The cap is then hermetically sealed to the sealing metal part 106 by electrical resistance welding or the like. In such a conventional semiconductor device, when assembling the container 100, as shown in FIG. 2, a metal base component 104, a brazing material 105,
The ceramic insulating tube 101, the brazing material 107, and the metal part 106 for sealing are set in order and heated in a furnace with a reducing atmosphere to melt the brazing materials 105 and 107, and the metal base part 104,
The metal parts 106 for sealing are hermetically sealed, but the brazing materials 105 and 10 are small in shape and thin in thickness.
7 in the assembly jig 110 was time-consuming, and the workability of assembling the container 100 was extremely poor. Furthermore, when molding the brazing filler metals 105 and 107, since the brazing filler metals 105 and 107 are thin and brittle,
Deformation or cracking may occur in the brazing filler metals 105 and 107,
Also, the workability of molding is poor, and the brazing filler metal 105, 107
The disadvantage was that the price was extremely high. In addition to these disadvantages in terms of price, during assembly, due to misalignment of the brazing filler metals 105 and 107,
Variations in the amount of filler metal at the brazed part, solder pool 1
11, a gap 112 is formed, which has a defect in terms of quality, such as impairing airtightness.
本発明は従来の半導体装置のかかる欠点を除去
することを目的とするものである。第３図に於い
て、セラミツク絶縁管２０１の両端面２０２，２
０３の最外表面にあらかじめ、めつきによりニツ
ケル−リン合金層２１３，２１４を形成し、この
ニツケル−リン合金層２１３，２１４を溶融する
ことにより、セラミツク絶縁管２０１の一方の端
面に金属ベース部品２０４を、もう一方の端面に
封着用金属部品２０６を気密封止することを特徴
とするものである。なお、本実施例において、こ
の他の構成については従来の半導体装置と同じで
あるので説明は略す。このような本発明の半導体
装置に於ては、第４図に示すごとく容器２００の
組立を行なう際に、組立治具２１０には被ろう付
部品であるセラミツク絶縁管２０１、金属ベース
部材２０４、封着用金属部材２０６のみをセツト
するだけでよく、従来のロウ材が不要なため、作
業が著しく容易となる。さらに所定の形状に成形
されたろう材を製作するのに比べて、ニツケル−
リン合金層２１３，２１４はめつきにより容易に
形成できる為、その分大幅に安価にできるという
利点を有している。こうした利点に加え、ニツケ
ル−リン合金層２１３，２１４はめつきにより封
止面となるセラミツク絶縁管２０１の両端面の金
属化層２０２，２０３の全面に均一に形成できる
為、ろう溜り、隙間等の生じることのない、気密
性に優れた半導体装置を提供することができる。 The present invention aims to eliminate such drawbacks of conventional semiconductor devices. In FIG. 3, both end surfaces 202, 2 of the ceramic insulating tube 201 are
By forming nickel-phosphorus alloy layers 213 and 214 on the outermost surface of the ceramic insulating tube 201 in advance by plating, and melting the nickel-phosphorus alloy layers 213 and 214, a metal base component is formed on one end surface of the ceramic insulating tube 201. 204 is characterized in that a sealing metal component 206 is hermetically sealed on the other end surface. Note that in this embodiment, the other configurations are the same as those of the conventional semiconductor device, so the explanation will be omitted. In such a semiconductor device of the present invention, when assembling the container 200 as shown in FIG. 4, the assembly jig 210 includes a ceramic insulating tube 201, a metal base member 204, Since it is only necessary to set the sealing metal member 206 and no conventional brazing material is required, the work is considerably facilitated. Furthermore, compared to manufacturing brazing filler metal molded into a predetermined shape, nickel
Since the phosphorus alloy layers 213 and 214 can be easily formed by plating, they have the advantage of being significantly cheaper. In addition to these advantages, the nickel-phosphorus alloy layers 213 and 214 can be formed uniformly over the entire surface of the metallized layers 202 and 203 on both end faces of the ceramic insulating tube 201, which will serve as the sealing surfaces, so that there will be no wax buildup or gaps. It is possible to provide a semiconductor device with excellent airtightness that does not occur.
以上、本発明の一実施例につき、図面を参照し
て説明したが本発明の効果は封止される部品の材
質・形状等により、何ら制限を受けるものでな
く、特許請求範囲に記す全ての半導体装置に及ぶ
ことは明らかであろう。 Although one embodiment of the present invention has been described above with reference to the drawings, the effects of the present invention are not limited in any way by the material, shape, etc. of the parts to be sealed, and all It is clear that this applies to semiconductor devices.
第１図は従来の半導体装置を示す縦断面図であ
り、第２図はその組立方法を説明する為の概要図
である。第３図は本発明の半導体装置の一実施例
を示す縦断面図であり、第４図はその組立方法を
説明する為の概要図である。
１００，２００：容器、１０１，２０１：セラ
ミツク絶縁管、１０２，２０２：金属化層、１０
３，２０３：金属化層、１０４，２０４：金属ベ
ース部品、１０５：ろう材、１０６，２０６：封
着用金属部品、１０７：ろう材、１０８，２０
８：半導体素子、１０９，２０９：金属細線、１
１０，２１０：組立治具、１１１：ろう付部のろ
う溜り、１１２：ろう付部の隙間、２１３：ニツ
ケル−リン合金層、２１４：ニツケル−リン合金
層。
FIG. 1 is a vertical sectional view showing a conventional semiconductor device, and FIG. 2 is a schematic diagram for explaining its assembly method. FIG. 3 is a longitudinal cross-sectional view showing one embodiment of the semiconductor device of the present invention, and FIG. 4 is a schematic diagram for explaining its assembly method. 100, 200: Container, 101, 201: Ceramic insulating tube, 102, 202: Metallized layer, 10
3,203: Metalized layer, 104,204: Metal base component, 105: Brazing metal, 106,206: Metal component for sealing, 107: Brazing metal, 108,20
8: Semiconductor element, 109, 209: Fine metal wire, 1
10, 210: assembly jig, 111: solder pool in brazed part, 112: gap in brazed part, 213: nickel-phosphorus alloy layer, 214: nickel-phosphorus alloy layer.
Claims (1)
した半導体装置に於いて、前記セラミツク絶縁管
に設けられた金属化層の最外表面にニツケル−リ
ン合金層を形成し、該ニツケル−リン合金層を溶
融することによつて金属ベース部品及び封着用金
属部品をセラミツク絶縁管に固着したことを特徴
とする半導体装置。1. In a semiconductor device in which a semiconductor element is housed inside a ceramic insulating tube, a nickel-phosphorus alloy layer is formed on the outermost surface of a metallized layer provided on the ceramic insulating tube, and the nickel-phosphorus alloy layer is A semiconductor device characterized in that a metal base component and a metal sealing component are fixed to a ceramic insulating tube by melting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19489783A JPS6086838A (en) | 1983-10-18 | 1983-10-18 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19489783A JPS6086838A (en) | 1983-10-18 | 1983-10-18 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6086838A JPS6086838A (en) | 1985-05-16 |
| JPH0216586B2 true JPH0216586B2 (en) | 1990-04-17 |
Family
ID=16332143
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19489783A Granted JPS6086838A (en) | 1983-10-18 | 1983-10-18 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6086838A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0451779U (en) * | 1990-09-07 | 1992-04-30 | ||
| JPH04163873A (en) * | 1990-10-29 | 1992-06-09 | Tokyo Densen Kogyo Kk | Terminal connecting structure of flat cable |
-
1983
- 1983-10-18 JP JP19489783A patent/JPS6086838A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0451779U (en) * | 1990-09-07 | 1992-04-30 | ||
| JPH04163873A (en) * | 1990-10-29 | 1992-06-09 | Tokyo Densen Kogyo Kk | Terminal connecting structure of flat cable |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6086838A (en) | 1985-05-16 |
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