JPH02164075A - Thin film transistor - Google Patents

Abstract

PURPOSE:To shift threshold value in the positive direction without deteriorating a rising the characteristic by having structure, where a first metal film is opposing to a second metal film connected to a gate insulating film through an interlayer insulating film. CONSTITUTION:A gate electrode G is made of a MIM(metal-insulator-metal) construction, where an interlayer insulating film 5 is interposed between a first metal layer 3 and a second metal layer 4. Then, the gate electrode G is led out outside as an electrode to impress gate voltage on the first metal film 3, while the second metal 4 is made to oppose to an operating semiconductor layer 7 through a a gate insulating film 6. In this constitution, when gate voltage Vc is impressed on the first metal film 3 from outside, the second metal film 4 works as a true gate electrode and this potential becomes true gate voltage VGO. Thereby, threshold value can be shifted in the positive direction without deteriorating a rising characteristic.

Description

[Detailed Description of the Invention] [(Already required)] With respect to a thin film transistor for driving a liquid crystal, the purpose is to shift the threshold value in the positive direction without deteriorating the rise characteristics of the thin film transistor, and to operate the thin film transistor through a gate insulating film. A gate electrode facing the semiconductor layer is in contact with a first metal film led out to the outside as an electrode for applying a gate voltage and a second metal film in contact with the gate insulating film.
The metal film is configured to form a laminated structure in which the metal films face each other with the glabella insulating film interposed therebetween.

[Industrial application field]

The present invention relates to a thin film transistor for driving a liquid crystal.

Active matrix display devices in which display cells are driven by thin film transistors are used, along with simple matrix display devices, as thin display devices for information terminals, and liquid crystal is often used as the display medium. This thin-film transistor matrix-driven liquid crystal display device has a large capacity and can display easy-to-see gradations and moving images, so it is suitable for Pocket T.
It is being actively developed as a display device for V and various OAR devices.

Comparing the above two types, when the display capacity increases with the increase in the number of lines, the simple matrix type decreases the driving duty ratio, resulting in a decrease in contrast and viewing angle, but the active matrix type has a large number of lines. Since each pixel can be driven independently, there is an advantage that such a problem does not occur.

On the other hand, in order to solve problems such as decreased manufacturing yield and increased costs caused by the complexity of the active matrix type structure, scan path lines and data bus lines have been developed.
A facing matrix method has been developed in which the liquid crystal is separated and formed on separate substrates that are placed facing each other with the liquid crystal interposed therebetween, thereby eliminating the intersection of both pass lines.

Furthermore, the control electrode (gate) and one of the controlled electrodes (drain) of the thin film transistor that drives each liquid crystal cell are connected to the scan path line corresponding to the row of the liquid crystal cell and the adjacent scan path line with the next highest scanning order. Japanese Patent Application No. 61-212696 proposes a gate-connected facing matrix type liquid crystal display device which eliminates the need for a common pass line and completely eliminates crossing of pass lines on the substrate H.

[Conventional technology]

FIG. 5 is an exploded perspective view of the gate-connected facing matrix type active matrix liquid crystal display panel.

As can be seen in the figure, in the liquid crystal display panel of the above method, display electrodes E and thin film transistors (TPT) 2 corresponding to the display electrodes E are arranged in a matrix on a glass substrate 1, and the display electrodes E and the thin film transistors (TPT) 2 corresponding to the electrodes are arranged in a matrix. A scan path line SB is arranged to constitute a TPT substrate P, and another glass substrate disposed opposite thereto is placed on the surface facing the TFT substrate P at an angle of 1°. Data bus lines DB, which also serve as electrodes, are arranged corresponding to each column of the matrix to constitute a counter substrate P°.A liquid crystal is sandwiched between the TPT substrate l and the counter substrate 1''. Constitutes a liquid crystal display panel.

Furthermore, on the TPT substrate P side, a TP that drives each liquid crystal cell
The gate electrode G, which is the control electrode of T2, is connected to the scan path line SB of the row to which the liquid crystal cell belongs, and one of the two controlled electrodes (for convenience of explanation, this will be called the drain electrode) D is connected to the scan path line SB of the row to which the liquid crystal cell belongs. Next adjacent scan path line SB
', and the other S (which is called the source electrode) is connected to the display electrode E.

In this way, the scan path line SB and the data bus line DB are formed so as to be orthogonal to each other, but since they are formed separately on one side and the other side of a pair of glass substrates arranged opposite to each other, both path lines There is no crossover, and since the drain electrode is connected to the adjacent solar bus line SB', there is no need for a common path line, and the TPT substrate P
I was able to eliminate any line intersections at the top.

Therefore, this method has the advantage of being easy to manufacture and improving the manufacturing yield because there is no crossing of lines which is a major cause of disconnection defects.

- For power retention, since the TPT is an enhancement type, it is necessary that the off-state current when the gate bias is 0 [■] is sufficiently small (below IQ-II to IQ-1 mA); requires shifting the dark value voltage in the positive direction.

[Problems to be Solved by the Invention] In the active matrix display device as described above, it is necessary to control the threshold voltage of the thin film transistor that drives the display cell to a desired value.

The above threshold voltage originally changes depending on the material of the gate insulating film. However, by simply changing the type or quality of the insulating film, although it is possible to shift the dark value, it often deteriorates the start-up characteristics, making it difficult to fully achieve the intended purpose.

An object of the present invention is to shift the dark value in the positive direction without deteriorating the rise characteristics of a thin film transistor.

[Means for Solving the Problems] In the present invention, as shown in FIG. 1(a), the gate electrode G is formed by interposing an interlayer insulating film 5 between the first metal film 3 and the second metal film 4. The gate electrode G has a MIM (metal-insulator-metal) structure, and the first metal film 3 is led out to the outside as an electrode for applying gate voltage, and the second metal film 4 is connected to the gate insulating film 6. The active semiconductor layer 7 is opposed to the active semiconductor layer 7 via the active semiconductor layer 7. The rest may be the same as a normal thin film transistor. That is, 8 is a contact layer such as n''a-3t layer, 9 is Ti
A conductive film such as a film, S and D are source/drain electrodes, and 10 is a channel protective film.

With this structure, a gate voltage (6) is externally applied to the first metal film, but the second metal film acts as a true gate electrode, and its potential is the true gate voltage (2). . becomes.

[For production]

When the gate electrode has the above-mentioned MIM structure, the externally applied gate voltage ■. The relationship between the true gate voltage 6° and the gate voltage V varies depending on the magnitude of .

That is, the L MIM structure constitutes a parallel plate capacitor while the externally applied gate voltage 6 is relatively small. Therefore, as shown in Figure 1(b), the size F
ik CM, a capacitance 1c+ of a capacitor constituted by a second metal film 4 and an active semiconductor layer 7 facing each other with a gate insulating film 6 in between, and a capacitance formed by the expansion of a depletion layer in the active semiconductor layer. 1 ct are connected in series, so when a voltage is applied to each electrode of the TPT, the voltage is divided by the three capacitors. Therefore, the true gate voltage is ■. . ■. It is considerably smaller than .

However, ■When 6 becomes thicker than a certain value, a tunnel effect occurs and the capacity of the MIM structure becomes zero, and ■.

approaches the vfi. Figure 2 shows ■ for the above vG.
. . shows the relationship between

In this way, in the configuration of the present invention, the true gate voltage V is
Voltage ve applied to the gate electrode from the outside.

Since the true gate voltage becomes extremely small while VS2 is low, the off-state current does not increase, and when VS2 increases beyond a certain value, ■. and ■. . Since the difference between TPT and TPT decreases relatively, the current flowing through TPT increases rapidly. Therefore, only the threshold value is shifted in the positive direction without deteriorating the saturation current of the voltage-current characteristic of the TPT.

Note that since the capacitance of the MIM structure must change depending on the voltage, the thickness of the insulating film should be approximately 50 to 50 mm.
There will be 200 people.

〔Example〕

An embodiment of the present invention will be described below along with its manufacturing process on the third page (
This will be explained using a) to (C).

First, as shown in (a), a Ti film is formed on a glass substrate 1 to a thickness of approximately 500 mm using a sputtering method, and this is patterned to form a first metal film 3. Next, a Si film with a thickness of approximately 100 mm was applied as an insulating film between the eyebrows.
O □Sniff 5 was subjected to high-frequency wave plasma chemical vapor deposition (P-CVD).
) method, a Ti film is further formed thereon by a sputtering method, and this is patterned to form the second metal film 4.

Next, as shown in (b), SiN is used as the gate insulating film.
, v, 5, a-3iJ17 was used as the operating semiconductor layer, and SiO□ film 10 was used as the channel protective film, using the p-cvD method for approximately 3000 and 1000 people, respectively.

Formed to a thickness of 1000 people.

Next, as shown in (C), 5 parts other than the upper part of the channel part are
The iOz film 10 is removed by etching, and an n''a-Si layer 8 as a contact layer is formed by P-CVD.
A conductive film 9 laminated with /Af is formed by electron beam evaporation and patterned according to a predetermined pattern to form source/drain electrodes S and D.

FIG. 4 shows drain current I0 characteristics with respect to externally applied gate voltage vG of the thin film transistor according to this example obtained as described above.

In the figure, A is the characteristic curve of the thin film transistor of this example, and B is the characteristic curve of the thin film transistor of this example.
is a characteristic curve of a conventional thin film transistor shown for comparison.

The voltage applied to the second metal film 4, which is the true gate electrode, is
While the applied voltage is low, the externally applied gate voltage ■. Since the drain current is kept small, the characteristic is as if the dark value voltage had shifted in the positive direction.

When the applied voltage vG increases and exceeds a certain value, a tunnel effect occurs and the capacitance of the MIM structure becomes zero, so the applied voltage
6 is applied to the second metal film, and the decrease in on-current is minimal compared to conventional thin film transistors.

〔Effect of the invention〕

As described below, according to the present invention, the dark voltage of a thin film transistor can be shifted in the positive direction without deteriorating the rise characteristics.

Therefore, it is possible to obtain a thin film transistor suitable for driving a gate-connected facing matrix type display cell, which can have a sufficiently low off-state current when the gate voltage is 0.

FIG. 2 is an explanatory diagram of an Eve matrix.

In the figure, 1,1° is an insulating substrate (glass substrate), 2
3 is a thin film transistor (TPT), 3 is a first metal film (T
i film), 4 is the second metal film (Ti film), 5 is the interlayer insulating film (Sin film), 6 is the gate insulating film (SiNX film), 7
indicates an active semiconductor Jl (a-3i layer), and G indicates a gate electrode.

[Brief explanation of the drawing]

1(a) and 1(b) are explanatory diagrams of the configuration of the present invention, FIG. 2 is an explanatory diagram of the principle of the present invention, FIG. 3 is an explanatory diagram of one embodiment of the present invention, and FIG. 4 is an explanatory diagram of the above-mentioned embodiment. A diagram showing the electrical characteristics of the embodiment, FIG. 5 is a gate-connected opposing matrix type acte (C1). : Source R "Ray > 1 tchishi, f fire ε (
-Actually satiated core teqr, ≧go 3rd figure
L・To main t2go diagram DB data bar, r7 bu> Wanito season addition 7 season 7 bird 7 also force type ftifi 7 tri 7 sti: el'lrB diagram 5

Claims (1)

[Claims] A gate electrode (G) facing the active semiconductor layer (7) via a gate insulating film (6) is connected to the first metal film (3) led out to the outside as an electrode for applying a gate voltage, and the gate A thin film transistor characterized in that it has a laminated structure in which an insulating film (6) and a second metal film (4) in contact with each other face each other with an interlayer insulating film (5) interposed therebetween.