JPH0215943B2 - - Google Patents
Info
- Publication number
- JPH0215943B2 JPH0215943B2 JP10820782A JP10820782A JPH0215943B2 JP H0215943 B2 JPH0215943 B2 JP H0215943B2 JP 10820782 A JP10820782 A JP 10820782A JP 10820782 A JP10820782 A JP 10820782A JP H0215943 B2 JPH0215943 B2 JP H0215943B2
- Authority
- JP
- Japan
- Prior art keywords
- address
- predetermined number
- memory
- data
- column address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
- G11B27/102—Programmed access in sequence to addressed parts of tracks of operating record carriers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1806—Pulse code modulation systems for audio signals
- G11B20/1809—Pulse code modulation systems for audio signals by interleaving
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10820782A JPS58224489A (ja) | 1982-06-21 | 1982-06-21 | メモリ回路 |
US06/446,403 US4516219A (en) | 1981-12-18 | 1982-12-02 | Address designating method of memory and apparatus therefor |
DE3249898A DE3249898C2 (cs) | 1981-12-18 | 1982-12-14 | |
DE19823246254 DE3246254A1 (de) | 1981-12-18 | 1982-12-14 | Speicheradressierverfahren |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10820782A JPS58224489A (ja) | 1982-06-21 | 1982-06-21 | メモリ回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58224489A JPS58224489A (ja) | 1983-12-26 |
JPH0215943B2 true JPH0215943B2 (cs) | 1990-04-13 |
Family
ID=14478728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10820782A Granted JPS58224489A (ja) | 1981-12-18 | 1982-06-21 | メモリ回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58224489A (cs) |
-
1982
- 1982-06-21 JP JP10820782A patent/JPS58224489A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58224489A (ja) | 1983-12-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4639920A (en) | Data interpolating circuit using a two data word memory | |
US4016409A (en) | Longitudinal parity generator for use with a memory | |
JPH026150B2 (cs) | ||
US4516219A (en) | Address designating method of memory and apparatus therefor | |
JPH0215943B2 (cs) | ||
JPH07113904B2 (ja) | メモリ・アクセス装置 | |
JPH01188085A (ja) | 信号再生処理装置 | |
EP0123322B1 (en) | Address indication circuit capable of relatively shifting channel addresses relative to memory addresses | |
US5500825A (en) | Parallel data outputting storage circuit | |
JPH0145153B2 (cs) | ||
JPS6135619B2 (cs) | ||
KR100532374B1 (ko) | 광 디스크 재생 시스템의 어드레스 발생장치 및 방법 | |
JPS59193513A (ja) | インタ−リ−ブ回路 | |
JPH0465475B2 (cs) | ||
JPH0439149B2 (cs) | ||
JPH0379890B2 (cs) | ||
JP2833852B2 (ja) | ディジタル信号出力回路 | |
KR930007193Y1 (ko) | 음성 디코더 | |
JPS59152509A (ja) | ミユ−テイング装置 | |
KR890004805Y1 (ko) | 씨디롬(cd-rom) 드라이버의 디지탈 데이터 순서 변환회로 | |
JPH0421942B2 (cs) | ||
JPS59165285A (ja) | 半導体記憶素子 | |
SU1163355A1 (ru) | Устройство дл формировани кода адреса | |
JPH0352694B2 (cs) | ||
JPH0640420B2 (ja) | Pcm再生装置 |