JPH02159106A - Gain stabilizing amplifier - Google Patents

Gain stabilizing amplifier

Info

Publication number
JPH02159106A
JPH02159106A JP63312956A JP31295688A JPH02159106A JP H02159106 A JPH02159106 A JP H02159106A JP 63312956 A JP63312956 A JP 63312956A JP 31295688 A JP31295688 A JP 31295688A JP H02159106 A JPH02159106 A JP H02159106A
Authority
JP
Japan
Prior art keywords
current source
gain
transistor
emitter
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63312956A
Other languages
Japanese (ja)
Inventor
Shigero Hayashi
茂郎 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP63312956A priority Critical patent/JPH02159106A/en
Publication of JPH02159106A publication Critical patent/JPH02159106A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To stabilize the gain by connecting a variable current source to a node point where the current flowing to an amplifier stage transistor and setting the output current of the variable current source in order to offset the change of the bias current value of the amplifier stage transistor. CONSTITUTION:A variable current source IO is connected to the emitter of a transistor TRQ1 forming a normal TR amplifier, and the emitter voltage is kept at a constant level. In this case, the emitter potential V1 is compensated with connection of the current source IO. Thus the gain is never changed despite the variance of the power voltage VC.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、トランジスタを用いた利得安定化増幅器に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a gain stabilizing amplifier using transistors.

第1図は、本発明を適用した第1の実施例を示す回路図
である。本実施例は、通常のトランジスタ増幅器を構成
するトランジスタQ+のエミッタに可変電流源IOを接
続し、そのエミッタ電圧を一定に保持するものである。
FIG. 1 is a circuit diagram showing a first embodiment to which the present invention is applied. In this embodiment, a variable current source IO is connected to the emitter of a transistor Q+ constituting a normal transistor amplifier, and its emitter voltage is held constant.

ここで、可変電流源■。は電源電圧vcに対して、第2
図に示すような出力特性を呈するものとする。
Here, the variable current source ■. is the second
It is assumed that the output characteristics shown in the figure are shown.

次に、第1図に示した実施例の動作を説明する。Next, the operation of the embodiment shown in FIG. 1 will be explained.

いま、電流源I0がないとするならば、利得Aはトラン
ジスタq1を流れる電流Iによって決まるので で与えられる。ここで、e:電気素量、k :ボルツマ
ン定数、v1 :ベース・エミッタ間電圧である。
Now, assuming that there is no current source I0, the gain A is determined by the current I flowing through the transistor q1, so it is given as follows. Here, e: elementary charge, k: Boltzmann constant, v1: base-emitter voltage.

上記(1)式において、仮にVC= 5 V 、 R,
=32kQ、 R2=18kQ、 VB!=0.8 V
、 Rc=1kQ。
In the above equation (1), suppose VC=5V, R,
=32kQ, R2=18kQ, VB! =0.8V
, Rc=1kQ.

RC=1にΩとすると、vcの変動±0.5Vに対して
利得は45倍〜31.5倍と大きく変動する。しかしな
がら、電流源I0が第2図のように変化するならば、利
得はvcの変動に対して変化しない。
When RC=1 and Ω, the gain varies greatly from 45 times to 31.5 times with respect to a variation of VC of ±0.5V. However, if current source I0 varies as shown in FIG. 2, the gain does not change with respect to variations in vc.

これは、トランジスタq1を流れる電流Iで利得が決ま
るのであるが、電流源■。が無いときにはIはトランジ
スタQ+のエミッタ電位v1で決まり、vlはVCの変
動を受けるからである。そのため利得Aが変動するのに
対し、本実施例のように電流源1゜を接続すると、この
■。がエミッタ電位V、を補償してしまうため、電源電
圧vcの変動に対しても利得変化は生じないことになる
This is because the gain is determined by the current I flowing through the transistor q1, and the current source ■. This is because when there is no voltage, I is determined by the emitter potential v1 of the transistor Q+, and vl is subject to fluctuations in VC. Therefore, the gain A fluctuates, but when a current source of 1° is connected as in this embodiment, the gain A changes. Since this compensates for the emitter potential V, no change in gain occurs even with fluctuations in the power supply voltage VC.

なお、第1図に示した実施例そはエミッタ電位によりト
ランジスタを流れる電流Iが決まるため、エミッタに電
流源I0を接続したが、コレクタ側の電位で決まる場合
には第3図に示すように、コレクタに電流源■。′を接
続すればよい。このことは、FETでも同様である。
In the embodiment shown in Fig. 1, the emitter potential determines the current I flowing through the transistor, so a current source I0 is connected to the emitter, but if it is determined by the collector side potential, then the current I flowing through the transistor is determined by the emitter potential. , current source to the collector■. ′ can be connected. This also applies to FETs.

ここで、電流源は出力インピーダンスが極めて高いため
、交流動作には悪影響を及ぼさない。なお、電流源の容
量が増幅回路の特性に悪影響を与えるときは、増幅トラ
ンジスタのバイアス電流を決めるノードと当該電流源と
の間に抵抗を入れてやればよい。
Here, since the current source has extremely high output impedance, it does not adversely affect AC operation. Note that if the capacity of the current source adversely affects the characteristics of the amplifier circuit, a resistor may be inserted between the current source and the node that determines the bias current of the amplification transistor.

また、このような電流源■。およびI0′ は、電源電
圧変動だけでなく、温度変化に対してもトランジスタの
利得を補償するように設定することが可能であり、幅広
い範囲で一定の利得を有する増幅器を作ることができる
Also, such a current source ■. and I0' can be set to compensate the transistor gain not only for power supply voltage fluctuations but also for temperature changes, making it possible to create an amplifier with a constant gain over a wide range.

殊に、第3図に示した回路は光受信用プリアンプに好適
である。すなわち光受信用プリアンプは、その応答帯域
中が利得に比例するため、帯域不足では信号を伝達でき
ないし、逆に過剰ならば雑音が増大して感度が劣化して
しまう。そこで、第3図に示すように電流源■。′が無
いならば電源vc=+5Vの変動±0.5■に対して利
得が大きく変動し、帯域が設定値に対して一31%〜+
91%と大きく変動してしまう。ところが上記電流源■
。′を設けることにより帯域を一定とすることができる
In particular, the circuit shown in FIG. 3 is suitable for a preamplifier for optical reception. That is, since the response band of the optical receiving preamplifier is proportional to the gain, if the band is insufficient, the signal cannot be transmitted, and if the band is excessive, noise increases and sensitivity deteriorates. Therefore, as shown in Fig. 3, a current source ■ is used. ' If there is no ', the gain will fluctuate greatly with the fluctuation of the power supply vc = +5V ±0.5■, and the band will be -31% to + + with respect to the set value.
It fluctuates greatly at 91%. However, the above current source ■
. By providing ', the band can be made constant.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の一実施例を示す回路図、 第2図は第1図に示した電流源工。の出力特性を示す線
図、 第3図は本発明の第2の実施例を示す回路図、第4図は
第2図に示した電流源10’の出力特性を示す線図であ
る。 1o、 I。′・・・電流源、 Ql・・・トランジスタ、 vl・・・エミッタ電位。 [発明の効果] 以上説明したとおり本発明によれば、電流源を新たに設
けるという簡易な構成により電源電圧や外部環境の変化
に対しても利得を一定に保つことができるので、ローコ
ストにして他方面への応用(例えば、光受信器)が可能
となる。
FIG. 1 is a circuit diagram showing a first embodiment of the present invention, and FIG. 2 is a circuit diagram of the current source shown in FIG. 1. FIG. 3 is a circuit diagram showing the second embodiment of the present invention, and FIG. 4 is a diagram showing the output characteristics of the current source 10' shown in FIG. 1o, I. '...Current source, Ql...Transistor, vl...Emitter potential. [Effects of the Invention] As explained above, according to the present invention, the gain can be kept constant even with changes in the power supply voltage and external environment with the simple configuration of newly providing a current source, so it is possible to maintain the gain at a low cost. Applications to other fields (for example, optical receivers) are possible.

Claims (1)

【特許請求の範囲】[Claims] 1)トランジスタを用いた増幅器において、増幅段トラ
ンジスタに流入する電流を決定する節点に対し可変電流
源を接続し、前記増幅段トランジスタのバイアス電流値
変化を相殺するよう前記可変電流源の出力電流を設定す
ることを特徴とした利得安定化増幅器。
1) In an amplifier using a transistor, a variable current source is connected to a node that determines the current flowing into the amplification stage transistor, and the output current of the variable current source is adjusted to offset changes in the bias current value of the amplification stage transistor. A gain stabilizing amplifier characterized by setting.
JP63312956A 1988-12-13 1988-12-13 Gain stabilizing amplifier Pending JPH02159106A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63312956A JPH02159106A (en) 1988-12-13 1988-12-13 Gain stabilizing amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63312956A JPH02159106A (en) 1988-12-13 1988-12-13 Gain stabilizing amplifier

Publications (1)

Publication Number Publication Date
JPH02159106A true JPH02159106A (en) 1990-06-19

Family

ID=18035506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63312956A Pending JPH02159106A (en) 1988-12-13 1988-12-13 Gain stabilizing amplifier

Country Status (1)

Country Link
JP (1) JPH02159106A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08298413A (en) * 1995-04-27 1996-11-12 Nec Yamagata Ltd Emitter-grounded amplifier circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08298413A (en) * 1995-04-27 1996-11-12 Nec Yamagata Ltd Emitter-grounded amplifier circuit

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