JPH02154576A - Dc recovery device - Google Patents

Abstract

PURPOSE:To suppress the undesired fluctuation of vertical brightness by providing a clamp pulse generating means adjusting a clamp pulse output timing so that clamping is implemented only at a timing when the HD signal of one waveform is inputted. CONSTITUTION:The HD signal fed to a terminal 21 is fed to a counter 33 in a clamp pulse generating circuit 30, in which the signal is frequency-divided. That is, since the counter 33 is provided, the clamping is implemented at every other one line. As a result, in the MUSE system, since the horizontal synchronous signal (HD) is sent while being inverted at every line, the HD signal being an object of clamping has the same waveform at all times. That is, the HD signal waveform in either odd numbered line or even numbered line is subjected to clamp processing and the DC level for other period is maintained. Thus, a stable DC recovery level is maintained and a brightness difference in the vertical direction is not caused.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention provides a decoder for demodulating a band-compressed high-definition television signal into the original wideband high-definition television signal. , and particularly to its DC regenerator.

(Prior Technology) MUSE (Multiple 5UB
-Nyquest Sampling Encoding
) method has been developed (Japanese Patent Application Laid-Open No. 61-264889)
See publication. ).

The transmission signal format of the MUSE method is shown in Figure 6, the horizontal synchronization signal of the MUSE signal (hereinafter referred to as HD signal) is shown in Figure 7, and the MUSE signal format is shown in Figure 7.
FIG. 8 shows a clock recovery system diagram of the USE decoder.

In the MUSE method, the HD signal is inverted for each line, and is reset when the frame pulse has finished being sent (the HD signal of line number 3 falls), and the period of one line is caused by harmonic distortion. The resampling clock is regenerated on the receiver side based on the period of this one line (see NHK Technical Research, Vol. 39, No. 2 of 1982).

The DC regeneration method of the MUSE system is based on the average DC level of HDfl:, No. 563 in the transmission signal format of Figure 6.
Taking advantage of the fact that the line clamp level period is equal to the DC level, a clamping operation is performed for each line during the HD signal period. Further, during the clamp level period of the 563rd line, data representing an ideal DC level is transmitted, and this data is detected to reproduce the DC voltage, which is used as the clamp voltage.

FIG. 3 shows a DC regenerator that performs a clamping operation for each line.

The MUSE baseband signal input to the MUSE decoder is input to input terminal 1. Passes through low pass filter (LPF) 2,
It is supplied to the clamp circuit 3 and undergoes DC regeneration processing. DC regenerated f. The signal is input to a digital-to-analog (A/D) converter 5 via an amplifier 4 and digitized.

This digitized baseband signal is supplied to the MUSE signal processing section and the clock recovery system of the MUSE decoder.

Furthermore, this digitized baseband signal is supplied to a level detection and DC voltage regeneration circuit 10 that detects clamp level period data included in this signal and regenerates a DC voltage. This level detection and DC voltage regeneration circuit 10 includes a level detection section 11 that detects the level based on the digital code of the MUSE signal, and a DC regeneration section 12 to which the output of the level detection section 11 is supplied. In the DC reproducing section 12, the MU of the output signal from the level detecting section 11 is
The 563rd line and 112th line shown in the SE signal transmission format
The level represented by the five lines of clamp period data is reproduced in response to the clamp-in gate pulse from terminal 13. The DC voltage thus regenerated is supplied to the clamp circuit 3 as a clamp voltage.

Here, the timing of supplying the clamp voltage to the clamp circuit 3 is controlled by the clamp pulse generation circuit 20. The clamp pulse generation circuit 20 is obtained by passing the HD signal supplied to the terminal 21 through the delay circuit 22, and the switch 23 is turned on by the clamp pulse which is at a high level during the clamp period. As a result, the clamp voltage charges the capacitor C through the resistor R of the clamp circuit 3 to perform clamp processing. Note that the delay circuit 22 is
This is to obtain timing adjustment between the clock recovery system and the MUSE signal system.

FIG. 4 shows the MUSE baseband signal, the HD signal included therein, and the timing of the above-mentioned clamp pulse. In this way, the DC regeneration operation is performed every HD signal period.

As described above, in the conventional DC regeneration method in the MUSE system, a clamp operation is obtained in every HD signal period and eight DC regeneration processes are performed. However, Fig. 5(a) to (C)
As shown in (d) to (f) of the same figure, if the clamp pulse is at the correct phase position with respect to the HD signal, the reproduced DC level will be the same for each line. If the phase position of the pulse deviates from the predetermined phase position of the HD signal, the reproduced DC level will fluctuate up and down from the ideal level (indicated by the dotted line) line by line. This causes a difference in brightness from line to line, which causes deterioration in image quality, and the greater the phase shift of the clamp pulse, the greater the effect.

By the way, as a television broadcasting system, so-called scrambled broadcasting, which can only be viewed by subscribers, has recently been considered (see Japanese Patent Laid-Open No. 59122094).

An example of a scrambling method is permuting lines in the vertical direction of the screen. Because this system replaces lines in the vertical direction, the influence of brightness differences in the vertical direction is greater than in normal broadcasting. In normal broadcasting, as explained earlier, even if there is a difference in brightness between lines, the line period is constant; however, in scrambled broadcasting, when vertical lines are replaced, the period at which the brightness difference changes is indefinite (scrambled). mode), which appears as streak-like brightness differences in units of several lines, making the screen even more difficult to see.

(Problems to be Solved by the Invention) As mentioned above, in the conventional DC regeneration method in the MUSE decoder, since DC regeneration is performed by obtaining a clamping action for each line, fluctuations in the regenerated DC component are likely to occur. However, there is a problem in that unnecessary brightness differences occur line by line on the screen, degrading the image quality. In addition, if a scrambling method is further adopted in which lines are swapped in the vertical direction,
The above-mentioned luminance difference has a large width or is not constant, not only on a line-by-line basis, further deteriorating the image quality.

Therefore, this invention reduces unnecessary fluctuations in vertical brightness caused by the fact that the waveform of the HD signal that is subject to clamp processing of the MUSE signal is inverted for each line, and provides a scrambling system that replaces lines in the vertical direction. It is an object of the present invention to provide a direct current reproducing device that can effectively suppress unnecessary fluctuations in brightness in the vertical direction even when the brightness is applied.

[Structure of the Invention (Means for Solving the Problems) This invention provides a clamp pulse so that the clamp operation is performed only at the timing when one of the two waveforms of the HD signal is input. It is equipped with a clamp pulse generation means for adjusting the output timing.

(Function) With the above means, the clamping operation during the HD signal period is performed only when a signal with the same waveform is input.
There is no fluctuation in the reproduction DC level, and images with stable brightness can be obtained.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. The same parts as the DC regenerator shown in FIG. 3 will be described with the same reference numerals as in FIG. 3. The difference between the device of the present invention and the conventional device is the clamp pulse generation circuit 30.

The MUSE baseband signal input to the MUSE decoder is input to input terminal 1. Passes through low pass filter (LPF) 2,
It is supplied to the clamp circuit 3 and undergoes DC regeneration processing. The DC regenerated signal is input to a digital-to-analog (A/D) converter 5 via an amplifier 4 and digitized. This digitized baseband signal is supplied to the MUSE signal processing section and the clock recovery system of the MUSE decoder.

Furthermore, this digitized baseband signal is supplied to a level detection and DC voltage regeneration circuit 10 that detects clamp level period data included in this signal and regenerates a DC voltage. This level detection and DC voltage regeneration circuit 10 includes a level detection section 11 that detects the level based on the digital code of the MUSE signal, and a DC regeneration section 12 to which the output of the level detection section 11 is supplied. In the DC reproducing section 12, the MU of the output signal from the level detecting section 11 is
The 563rd line and 112th line shown in the SE signal transmission format
The level represented by the five lines of clamp period data is reproduced in response to the clamp-in gate pulse from terminal 13. The DC voltage thus regenerated is supplied to the clamp circuit 3 as a clamp voltage.

Here, the timing of supplying the clamp voltage to the clamp circuit 3 is controlled by the clamp pulse generation circuit 30. In the clamp pulse generation circuit 30, the HD signal supplied to the terminal 21 is supplied to the counter 33 and frequency-divided.

This HD signal is a horizontal synchronization signal created by frequency-dividing the oscillation output of a voltage-controlled oscillator controlled by a phase-locked loop circuit inside the MUSE decoder. The MUSE decoder detects and separates horizontal and vertical synchronization signals from the digital MUSE signal, inputs the separated horizontal synchronization signals to a phase-locked loop circuit, and synchronizes the voltage controlled oscillator in phase with the separated horizontal synchronization signals. It is causing oscillation. The oscillation output is then used to create a new internal horizontal synchronization signal.

Further, the counter 33 is reset by a reset pulse applied to the terminal 32, and the timing is the end of the frame pulse line (see FIG. 6). The counter 33 divides the frequency of the horizontal synchronization signal into 1/2 and outputs it, and this output signal is sent to the clock reproduction system and the MUS.
It is derived as a clamp pulse through a delay circuit 22 that obtains timing adjustment with the E signal system. This clamp pulse is at a high level during the clamp period, and switch 2
Turn on 3. As a result, the clamp voltage charges the capacitor C through the resistor R of the clamp circuit 3 to perform clamp processing.

In this way, in this embodiment, since the counter 33 is provided, the relationship between the MUSE baseband signal and the clamp pulse is as shown in FIG. 2. Therefore, the clamping operation is not performed for each line as in the past, but every other line. As a result, in the MUSE method, since the HD signal is inverted and sent line by line, the HD signal to be subjected to the clamping operation always has the same waveform. That is, of the HD signal waveform, the period of either the odd line or the even line is subjected to the clamping process, and the DC level at that time is maintained during the other period. Therefore, as before, <H
DC fluctuations between lines due to inversion of the D signal for each line do not occur, and a stable DC reproduction level is maintained. This also applies when vertical lines are replaced in scrambled broadcasting, and image quality can be improved without causing vertical brightness differences between lines or at irregular intervals. Can be done.

[Effects of the Invention] As explained above, the present invention reduces unnecessary fluctuations in vertical luminance caused by the fact that the waveform of the HD signal that is subject to clamp processing of the MUSE signal is inverted line by line. Even when scrambling is performed by exchanging lines in the vertical direction, unnecessary fluctuations in brightness in the vertical direction can be effectively suppressed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a timing chart shown to explain the operation of the circuit shown in FIG. 1, and FIG. 3 is a block diagram showing a conventional DC regeneration circuit. Figure 4 is a timing adjustment diagram shown to explain the operation of the circuit in Figure 3, Figure 5 is a waveform diagram shown to explain the problems of the conventional circuit, and Figure 6 is a signal of the MUSE method. FIG. 7 is an explanatory diagram showing the horizontal synchronization signal of the MUSE signal, and FIG. 8 is a circuit diagram showing the clock reproducing section of the MUSE decoder. 2...Low pass filter, 3...Clamp circuit, 4...
・Amplifier, 5...Analog-digital converter, 10...
- Level detection and DC regeneration circuit, 30... Clamp pulse generation circuit, 33... Counter, 34... Delay circuit, 35... Switch. Applicant's agent Patent attorney Takehiko Suzue a2>b2 No.

Claims (1)

[Scope of Claims] Means for receiving a MUSE baseband signal transmitted by a multiplex sub-sampling transmission method of a television signal;
a clamp circuit for setting the DC level of the baseband signal; an analog-to-digital conversion means for digitally converting the output baseband signal of the clamp circuit to obtain a digital baseband signal; a synchronization detection circuit that separates a vertical synchronization signal and a horizontal synchronization signal that is inverted for each line from the output of the digital-to-analog conversion means; a phase-locked loop circuit that synchronizes the oscillation frequency of the voltage-controlled oscillator in phase with the horizontal synchronization signal obtained from the voltage-controlled oscillator; a synchronization generation circuit that generates a new internal horizontal synchronization signal using the oscillation output of the voltage-controlled oscillator; a clamp level detection circuit that reproduces a DC voltage using a clamp level code included in the digital baseband signal outputted from the analog-to-digital conversion means; and a clamp level detection circuit that reproduces the DC voltage obtained by the level detection circuit to the clamp circuit. When supplied as a clamp voltage, it is reset by the frame pulse included in the digital baseband signal, and is supplied at the timing of the clamp pulse obtained by dividing the frequency of the internal horizontal synchronization signal, and the clamp operation is reversed for each line. A direct current reproducing device characterized by comprising: means for performing the reproducing operation only during the period of one of the horizontal synchronizing signal waveforms transmitted as the horizontal synchronizing signal waveform.