JPH02148342A - Memory for look-up table - Google Patents

Abstract

PURPOSE:To eliminate the need for an additional external circuit or excessive rewriting of a memory by switching ordinary operations to data-through operations by means of a switching selecting means, and when the data-through operations are selected, outputting address signals of a necessary number as data signals after selecting the data directly coupled with address pins. CONSTITUTION:When a select signal S is '0', a selector 15 connects an address input line with an address control 13 and another selector 16 connects a data output line with a data control 14. Then a memory control 12 performs ordinary operations after the control 12 is actuated by a chip select signal. When the signal S is '1', the selector 15 connects address input lines A0-A12 to a through bus line 4 and the selector 16 connects the line 4 to data output lines D0-D7. At the same time, data input-output pins directly connected with address pins are selected by means of shift codes S2, S1, and S0. Therefore, necessity of an additional external circuit or rewriting of a memory is eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a memory used as a lookup table, and more particularly to a memory added with a special function for realizing a highly functional lookup table.

(Prior Art) A lookup table is a data conversion system that obtains a memory output corresponding to the input data by manually inputting data to a memory address.

Conventionally, a look-up table has been realized by using a memory such as a normal SRAM and storing data by accessing from a CPU.

(Problem to be Solved by the Invention) However, in this method, in order to perform data through which outputs data directly from human input, it is necessary to interrupt the operation as a lookup table and rewrite the memory contents. Furthermore, as a method that does not rewrite the memory, there is a method of adding a selector to the data input/output portion as shown in FIG.

In the figure, 1 is a memory used as a lookup table, selector 2 is provided on the input side of memory 1, and selector 3 is provided on the output side of memory 1. When using the lookup table, selector 2 and selector 3 are used for input. When the line and the output line are connected to the memory 1 side and data through is performed, the selector 2 and the selector 3 are switched to connect the input line and the output line to the through bus line 4.

Whichever method is used, it takes time to rewrite the memory and complicates control. Furthermore, when prototyping a system, when the software for controlling memory rewriting is not yet complete, conventionally it was necessary to remove the memory and directly connect input and output for prototype testing and debugging, which was troublesome.

The present invention has been made in view of the above points, and its purpose is to provide a look-up table that does not require adding an external circuit or rewriting extra memory each time to perform data-through operation. The purpose is to realize memory.

(Means for Solving the Problems) The present invention for solving the above-mentioned problems has the following advantages:
switching means for switching between normal operation and data through operation in response to a selection command; a bus line that directly connects the two switching means and directly connecting the address pin and the data input/output pin; and controlling the switching means. and a control means for selecting a pin directly connected to the address pin and the data input/output pin.

(Function) The normal operation and the data through operation are switched by a switching selection command issued by the control means that controls the switching means.

In the case of data through operation, the control means for selecting the address directly connected pins selects the data pins to be directly connected to the address pins and outputs the required number of address signals as data signals.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

In the figure, 11 is a memory cell that outputs data corresponding to address data for an input address as a look-up table, 12 starts operation when selected by a chip select signal, and data is sent to memory cell 11 by a write enable signal. This is a memory control that causes writing to be performed and reading of data from the memory cell 11 using an output enable signal. 13 is an address control that provides a write address or a read address to the memory cell 11 in response to a control signal from the memory cell control 12; 14 is operated in response to a control signal from the memory control 12 to write data to or read data from the memory cell 11. Data control. Selector 15
The selector 16 switches the address line and data line to the memory cell 11 side and the through bus line 4 side using a select signal.

Next, the operation of the memory circuit of the embodiment configured as described above will be explained. When the select signal (S) is "0", the selector 15 connects the address input line to the address control 13, and the selector 16 connects the data output line to the data control 4. The memory control 12 is operated by a chip select signal and controls the address control 13 and data control 14 by a write enable signal and an output enable signal to perform normal operations of writing and reading data.

When the select signal (S) is "1", the selector 15 connects the address input line (Ao=A+z) to the through bus line 4, and the selector 16 connects the through bus line 4 to the data output line (Do=D7). do. At this time, the shift code (S2.Sl.

So) determines the 8-bit address to be output to the data line (Do - D?) formed by (R) among the 13-bit address (Ao' = A + □) output from the selector 15. Shift Code (S2゜Sl So
) through pulse line determined by 4. Selector 1
The direct connection pig which outputs via 6 is as shown in FIG. That is, the shift code (S2.SI+so) is 3
Represents the number of bits, and when it is “0”, it is A of the directly connected address.

- The 8-bit address consisting of A7 is directly connected to the data pin, and when the shift code is "1", the directly connected address is shifted by 1, and the 8-bit address A1 to A8 is the output data from the selector 16. shall be. Do the same below. The total number of pins required in this memory circuit is 30 bins as shown in FIG.

As explained above, according to this embodiment, the through operation can be realized in the lookup table without adding a special circuit or rewriting the memory contents1, and the number of pins can be reduced to 30. Compared to a conventional circuit for performing a through operation, it is possible to reduce the number of parts, that is, cost, reduce the scale of one circuit, and simplify the software control procedure (only a few bits of register operation are required). Moreover, the efficiency of prototype debugging can be improved.

Note that the present invention is not limited to the above embodiments. The select signal can be included in the shift code. That is, by providing a control mechanism that causes normal operation when the shift code is (1, 1, 1) instead of the select signal "0" that causes normal operation in the embodiment, a select signal bin is unnecessary. , the number of control pins is reduced to three, the shift code pin.

In addition to increasing the number of control pins and directly connecting 8-bit addresses to create 8-bit data as in the embodiment, for example, the address code (A).

~A5) to output 6 bits like data (Do-Ds), and address code (Ao”A,
) into data (D2-D?), etc. By making it possible to select which part of the data bits the directly connected bits are allocated to, more advanced applications become possible.

Further, in the above embodiment, a new bin was provided for the additional function, but this may be done by writing the operation mode in the memory.

(Effects of the Invention) As described above in detail, according to the present invention, it is possible to perform data through operation without adding an external circuit or rewriting extra memory each time, and it becomes practical. The above effect is significant.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of a conventional look-up table memory that performs data through, FIG. 3 is a diagram of data output of a direct address using a shift code, and FIG. The figure is an explanatory diagram of the number of pins in the embodiment. 4...Through bus line 11...Memory cell 1
2...Memory control 13...Address control] 4...Data control 1.5.16...Selector Figure 3 Patent applicant Yokogawa Medical Systems Co., Ltd. Figure 4

Claims (1)

[Claims] A switching means is provided on the input side and an output side of the memory used as a look-up table, and switches between normal operation and data-through operation in response to a selection command, and the two switching means are directly connected to connect the address pin and the data through operation. A look characterized by having a bus line directly connecting input/output pins, a control means for controlling the switching means, and a control means for selecting a pin to be directly connected between the address pin and the data input/output pin. Memory for uptables.