JPH0214550A - Manufacture of dicing line part in semiconductor device - Google Patents

Abstract

PURPOSE:To eliminate a visor-like part originating from a residual part of an oxide film and to prevent a stress of a molding resin from being extended to a transistor or the like around a chip by a method wherein a process to etch and remove an interlayer film in a dicing line part together with the oxide film formed under it is executed in such a way that the oxide film is not left in a region where the interlayer film has been removed. CONSTITUTION:A gate wiring process and a source-drain diffusion process are executed on a semiconductor substrate 1; after that, an oxide film 2 is formed on it; a stepped part 1a is produced in the semiconductor substrate 1. An interlayer film 3 composed of PSG or the like is formed on it. Then, the interlayer film 3 is overetched by using a mask. During this process, the interlayer film 3 in a dicing line part and the oxide film 2 under it are etched and removed. This operation is executed in such a way that the oxide film 2 is not left in a region where the interlayer film 3 has been removed. This is achieved when the etching time is made longer than a conventional operation. Then, a metal wiring process is finished; after that, a protective film 4 such as a nitride film or the like is formed and etched.

Description

[Detailed Description of the Invention] C+7F Industrial Application Field] The present invention relates to a method for manufacturing a dicing line portion of a semiconductor device, and particularly relates to a highly reliable method of manufacturing a dicing line portion of a semiconductor device. be.

[Prior Art] FIGS. 2A to 2D show a conventional manufacturing process of a dicing line portion of a semiconductor device, and are shown in cross-sectional views.

Referring to FIG. 2A, a semiconductor substrate 1 (for example, a silicon substrate) is prepared. The semiconductor substrate 1 is divided into an actual pattern part and a dicing line part. This semiconductor substrate 1 is obtained after completing the process of gate wiring and source/drain diffusion. A slightly raised oxide film 2 is formed on the semiconductor substrate 1, and a stepped portion 1a is formed on the semiconductor substrate 1.

On such a semiconductor substrate 1, PSG (phosp
An interlayer film 3 made of a material such as holographic glass is formed.

Next, in order to make contact with the already formed electrodes (not shown), the interlayer film 3 is over-etched by wet or dry etching using a mask. This over-etching is carried out so that no etching residue remains in the thick part of the interlayer film 3 (such a part exists, although it is not shown in the figure). At this time, referring to FIG. 2B, the interlayer film 3 in the dicing line portion and the oxide film 2 thereunder are etched and removed at the same time. This etching is carried out so that a small amount of oxide film remains 2a so that the stepped portion 1a of the dicing line portion does not become too sharp. After that, perform metal wiring (
(not shown).

Next, after completing the metal wiring process, referring to FIG. 2C,
A protective film 4 made of a nitride film or the like is formed on the semiconductor substrate 1 using a plasma chemical vapor deposition method (hereinafter referred to as plasma CVD method) or the like.

Next, referring to FIG. 2D, using a suitable mask, the protective film 4 at the dicing line portion is removed by dry etching. At this time, the etching also goes under the aforementioned remaining oxide film 2a, and that portion of the semiconductor substrate 1 is gouged out, so that the oxide film remaining 2a becomes like an eaves 5. Note that this etching is performed simultaneously with the etching of the bonding pad (not shown).

Next, it is sealed with molding resin and finished into a semiconductor device.

[Problems to be Solved by the Invention] The conventional method for manufacturing a dicing line portion of a semiconductor device is configured as described above, and with reference to FIG. It is characterized by leaving a slight amount of . However, such oxide film remaining portion 2
If part a is left, an overhang 5 will be formed in the subsequent metal wiring process (not shown) and the etching process of the protective film 4, as shown in FIG. 2D. If such an eaves 5 exists, and the eaves 5 are later sealed with a mold resin, the stress of the mold resin will be applied to the eaves 5, which may sometimes deteriorate the reliability of semiconductor elements such as transistors around the chip (current leakage). etc.).

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a dicing line portion of a semiconductor device, which can increase the reliability of the semiconductor device.

[Means for Solving the Problems] The present invention relates to a method for manufacturing a dicing line portion of a semiconductor device, and includes a step of preparing a semiconductor substrate after finishing gate wiring and source/drain diffusion steps, An oxide film is formed on the semiconductor substrate, and an interlayer film is further formed thereon, further comprising a step of etching away the interlayer film together with the oxide film formed thereunder at the dicing line portion, The etching removal step is performed so as not to leave the oxide film in the region where the interlayer film has been removed.

[Operation] When removing the interlayer film at the dicing line part by etching together with the oxide film formed below,
Since this is done so that no oxide film is left behind, no eaves are formed from the remaining oxide film, unlike in the conventional method.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1D are cross-sectional views showing the steps of an embodiment of the present invention.

Referring to FIG. 1A, a semiconductor substrate 1 (for example, a silicon substrate) is prepared. This semiconductor substrate 1 includes gate wiring,
This is after completing the sword/drain diffusion process. A slightly raised oxide film 2 is formed on the semiconductor substrate 1, and thereby a stepped portion 1a is formed on the semiconductor substrate 1. On such a semiconductor substrate 1, PSG
(phospho 5ilicate glass
), etc., is formed.

Next, in order to make contact with the already formed electrodes (not shown), the interlayer film 3 is over-etched by wet or dry etching using a mask. This overetching occurs in a thicker part of the interlayer film 3 (although it is not shown in the figure, there is such a part).
This is done in such a way that no etching residue remains. At this time, the interlayer film 3 in the dicing line portion and the oxide film 2 thereunder are also removed by etching. Referring to FIG. 1B, this etching process is carried out so as not to leave the oxide film 2 in the area where the interlayer film 3 has been removed. That is, unlike the conventional method, no oxide film remains. This can be achieved by making the etching time longer than before.

This etching is performed by wet or dry etching which is highly selective to the semiconductor substrate 1. after that,
Perform metal wiring (not shown).

Next, after completing the metal wiring process, referring to FIG. 1c,
A protective film 4 made of a nitride film or the like is formed on the semiconductor substrate 1 by plasma CVD.

Next, referring to FIG. 1D, the protective film 4 at the dicing line portion is etched by dry etching using a mask. In this way, a semiconductor device in which a dicing line portion is formed is obtained.

In this case, since there is no remaining oxide film that has conventionally occurred, no oxide film overhang is formed. Therefore, even if the semiconductor device is later sealed with molding resin, the stress of the molding resin will not be applied to transistors or the like around the chip.

Therefore, the reliability of the semiconductor device does not deteriorate.

In addition, although the case where a silicon substrate was used as a semiconductor substrate was demonstrated in the said Example, this invention is not limited to this. Furthermore, in the above embodiment, PS is used as the interlayer film.
Although the case where G is used has been described, the present invention is not limited to this.

Although the method of manufacturing a dicing line portion of a semiconductor device according to the present invention has been described above with reference to specific embodiments, the present invention can be modified into various other forms without departing from its spirit or main characteristics. It can be carried out in Therefore, the above-mentioned embodiments are merely illustrative of vehicles in all respects;
It should not be interpreted in a limited manner. The scope of the present invention is indicated by the claims, and is not restricted in any way by the main text of the specification. Furthermore, all modifications and changes that come within the scope of equivalents of the claims are intended to be within the scope of the present invention.

[Effects of the Invention] As explained above, according to the present invention, when the interlayer film in the dicing line portion is etched and removed together with the oxide film formed thereunder, it is possible to remove the interlayer film in such a way that no remaining part of the oxide film remains. Therefore, the eaves derived from the remaining oxide film are not formed as in the conventional case. Therefore, even if the semiconductor device is later sealed with a molding resin, the stress of the molding resin will not be applied to transistors or the like around the chip. As a result, the reliability of the semiconductor device is improved.

[Brief explanation of the drawing]

FIGS. 1A, 1B, 1C, and 1D are cross-sectional views showing the steps of an embodiment of the present invention. FIGS. 2A, 2B, 2C, and 2D are cross-sectional views showing a conventional manufacturing method for a dicing line portion of a semiconductor device in the order of steps. In the figure, 1 is a semiconductor substrate, 2 is an oxide film, and 3 is an interlayer film. In each figure, the same reference numerals indicate the same or corresponding parts. agent

Claims (1)

[Claims] A method for manufacturing a dicing line portion of a semiconductor device, comprising the step of preparing a semiconductor substrate after completing a gate wiring and source/drain diffusion process, and forming an oxide film on the semiconductor substrate. and an interlayer film is further formed, further comprising a step of etching away the interlayer film together with the oxide film formed thereunder in the dicing line portion, and the etching removal step includes the step of etching away the interlayer film together with the oxide film formed thereunder. 1. A method for manufacturing a dicing line portion of a semiconductor device, wherein the oxide film is not left in a region where the oxide film is removed.