JPH02144946A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH02144946A JPH02144946A JP29872988A JP29872988A JPH02144946A JP H02144946 A JPH02144946 A JP H02144946A JP 29872988 A JP29872988 A JP 29872988A JP 29872988 A JP29872988 A JP 29872988A JP H02144946 A JPH02144946 A JP H02144946A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- resin
- sealing resin
- inner lead
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 47
- 239000011347 resin Substances 0.000 claims abstract description 27
- 229920005989 resin Polymers 0.000 claims abstract description 27
- 238000007789 sealing Methods 0.000 abstract description 17
- 238000004299 exfoliation Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 3
- 241000272168 Laridae Species 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、樹脂封止型半導体装置に係り、特に装置外
形の薄形化に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a resin-sealed semiconductor device, and particularly relates to making the outer shape of the device thinner.
第３図は、例えば特開昭５９−９２５５６号公報に示さ
れた従来の樹脂封止型半導体装置を示す断面図であり、
１は半導体素子、２はリードフレームのアウターリード
部、３はリードフレームのインナーリード部、４はイン
ナーリード部３と半導体素子１とを接着固定するための
接合層、５は半導体素子１上の電極であり、６はこの電
極５とインナーリード部３をつなぐワイヤ、７は前記半
導体素子１、リードフレームのインナーリード部３、接
合層４、ワイヤ６等を封止する封止樹脂である。FIG. 3 is a sectional view showing a conventional resin-sealed semiconductor device disclosed in, for example, Japanese Patent Laid-Open No. 59-92556.
1 is a semiconductor element, 2 is an outer lead portion of the lead frame, 3 is an inner lead portion of the lead frame, 4 is a bonding layer for adhesively fixing the inner lead portion 3 and the semiconductor element 1, and 5 is a layer on the semiconductor element 1. Reference numeral 6 denotes an electrode, a wire connecting the electrode 5 and the inner lead portion 3, and 7 a sealing resin for sealing the semiconductor element 1, the inner lead portion 3 of the lead frame, the bonding layer 4, the wire 6, and the like.
従来の樹脂封止型半導体装置は以上のように構成されて
おり、最近の表面実装型パッケージ（ガルウィング、Ｊ
リード等）の装置外形が薄形化する傾向の中では、第４
図に示すように、半導体素子１の上下両側の封止樹脂７
の厚さが薄くなってしまう。Conventional resin-sealed semiconductor devices are configured as described above, and recent surface mount packages (gull wing, J
With the trend toward thinner device outlines (leads, etc.),
As shown in the figure, the sealing resin 7 on both the upper and lower sides of the semiconductor element 1
becomes thinner.
そのため、半導体装置を基板（図示せず）に実装する際
の昇温時に、半導体素子１と封止樹脂７の熱膨張係数が
大きく異なる（半導体素子；約３．５Ｘ １０−’／”
Ｃ、封止樹脂；約２ Ｘ １０−’／”Ｃ） コトカら
、半導体素子１の裏面と封止樹脂７との界面が剥離して
、半導体素子１の端部に接する封止樹脂７に応力が集中
し、第５図に示すようなりラック８が生じるという問題
点があった。Therefore, when the temperature rises when the semiconductor device is mounted on a substrate (not shown), the thermal expansion coefficients of the semiconductor element 1 and the sealing resin 7 differ greatly (semiconductor element: approximately 3.5X 10-'/''
C, sealing resin; approximately 2 x 10-'/''C) From Kotoka, the interface between the back surface of the semiconductor element 1 and the sealing resin 7 peels off, and the sealing resin 7 in contact with the edge of the semiconductor element 1 peels off. There was a problem in that stress was concentrated and a rack 8 as shown in FIG. 5 was formed.
この発明は、上記のような問題点を解消するためになさ
れたもので、実装時の樹脂クラックを防止できる樹脂封
止型半導体装置を得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a resin-sealed semiconductor device that can prevent resin cracks during mounting.
この発明に係る半導体装置は、半導体素子がリードフレ
ームのインナーリード部に取り付けられ樹脂封止成型さ
れた半導体装置において、前記半導体素子のインナーリ
ード部が取り付けられていない面に窪みを設けたことを
特徴とするものである。A semiconductor device according to the present invention is a semiconductor device in which a semiconductor element is attached to an inner lead part of a lead frame and molded with a resin, in which a recess is provided on a surface of the semiconductor element to which the inner lead part is not attached. This is a characteristic feature.
この考案における半導体装置は、半導体素子裏面に窪み
が設けられているので、封止樹脂と半導体素子間の密着
力が機械的に増すため、昇温時に生じる半導体素子裏面
と封止樹脂の界面の剥離が抑えられ、樹脂クラックを防
止する。In the semiconductor device according to this invention, since the recess is provided on the back surface of the semiconductor element, the adhesion between the encapsulating resin and the semiconductor element is mechanically increased. Peeling is suppressed and resin cracks are prevented.
以下、この発明の一実施例を図について説明する。第１
図において、１は半導体素子、２はリードフレームのア
ウターリード部、３はリードフレームのインナーリード
部、４はインナーリード部３と半導体素子１とを接着固
定するための接合層、５は半導体素子１上の電極であり
、６はこの電極５とインナーリード部３をつなぐワイヤ
、７は封止樹脂、９は半導体素子１の裏面に設けられた
窪みである。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, 1 is a semiconductor element, 2 is an outer lead part of the lead frame, 3 is an inner lead part of the lead frame, 4 is a bonding layer for adhesively fixing the inner lead part 3 and the semiconductor element 1, and 5 is a semiconductor element. 1 is an electrode, 6 is a wire connecting this electrode 5 and the inner lead part 3, 7 is a sealing resin, and 9 is a recess provided on the back surface of the semiconductor element 1.
次に動作について説明する。半導体素子１の裏面に設け
られた窪み９に封止樹脂７が充てんされているので、半
導体素子１と封止樹脂７の界面の密着力が機械的に増え
る。そのため、実装時に昇温されても、半導体素子１の
裏面と封止樹脂７の界面の剥離が抑えられ、樹脂７のク
ラックを防止する。Next, the operation will be explained. Since the recess 9 provided on the back surface of the semiconductor element 1 is filled with the sealing resin 7, the adhesion force at the interface between the semiconductor element 1 and the sealing resin 7 is mechanically increased. Therefore, even if the temperature rises during mounting, separation of the interface between the back surface of the semiconductor element 1 and the sealing resin 7 is suppressed, and cracking of the resin 7 is prevented.
なお、第５図に示すように、インナーリード部３と電極
５を直接接続した半導体装置において、その半導体素子
１の裏面に窪み９を設けても同様の効果を得る。Note that, as shown in FIG. 5, in a semiconductor device in which the inner lead portion 3 and the electrode 5 are directly connected, a similar effect can be obtained by providing a depression 9 on the back surface of the semiconductor element 1.
以上のように、この発明によれば半導体素子のインナー
リード部の接合面以外の面（特に裏面）に窪みを設けた
ので、半導体素子と封止樹脂間の密着力が増し、実装作
業の際、温度を上げても剥離が生じにくくなり、樹脂ク
ラックが防止される。As described above, according to the present invention, since the recess is provided on the surface other than the bonding surface (especially the back surface) of the inner lead portion of the semiconductor element, the adhesion between the semiconductor element and the encapsulating resin is increased, and during mounting work. Even if the temperature is raised, peeling is less likely to occur, and resin cracks are prevented.
第１図はこの発明の一実施例による半導体装置を示す側
面断面図、第２図はこの発明の他の実施例による半導体
装置を示す側面断面図、第３図、第４図は従来の半導体
装置を示す側面断面図、第５図は従来の半導体装置に封
止樹脂クラックが発生した状態を示す側面断面図である
。
図において、１は半導体素子、２はアウターリード部、
３はインナーリード部、４は接合層、５は電極、６はワ
イヤ、７は封止樹脂、９は窪みである。
なお、図中同一符号は同−又は相当部分を示す。FIG. 1 is a side sectional view showing a semiconductor device according to one embodiment of the present invention, FIG. 2 is a side sectional view showing a semiconductor device according to another embodiment of the invention, and FIGS. 3 and 4 are conventional semiconductor devices. FIG. 5 is a side sectional view showing a conventional semiconductor device in which cracks have occurred in the sealing resin. In the figure, 1 is a semiconductor element, 2 is an outer lead part,
3 is an inner lead portion, 4 is a bonding layer, 5 is an electrode, 6 is a wire, 7 is a sealing resin, and 9 is a recess. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
付けられ樹脂封止成型された半導体装置において、前記
半導体素子のインナーリード部が取り付けられていない
面に窪みを設けたことを特徴とする半導体装置。1. A semiconductor device in which a semiconductor element is attached to an inner lead part of a lead frame and molded with resin, characterized in that a recess is provided in a surface of the semiconductor element to which the inner lead part is not attached.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63298729A JP2694871B2 (en) | 1988-11-26 | 1988-11-26 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63298729A JP2694871B2 (en) | 1988-11-26 | 1988-11-26 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02144946A true JPH02144946A (en) | 1990-06-04 |
| JP2694871B2 JP2694871B2 (en) | 1997-12-24 |
Family
ID=17863517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63298729A Expired - Fee Related JP2694871B2 (en) | 1988-11-26 | 1988-11-26 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2694871B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5256903A (en) * | 1990-02-28 | 1993-10-26 | Hitachi Ltd. | Plastic encapsulated semiconductor device |
| WO2004082018A2 (en) * | 2003-03-11 | 2004-09-23 | Infineon Technologies Ag | Electronic component comprising a semiconductor chip and a plastic housing, and method for producing the same |
| US6891252B2 (en) | 2001-02-20 | 2005-05-10 | Infineon Technologies Ag | Electronic component with a semiconductor chip and method of producing an electronic component |
| JP2014192347A (en) * | 2013-03-27 | 2014-10-06 | Murata Mfg Co Ltd | Resin-sealed electronic equipment and electronic device with the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5815225A (en) * | 1981-07-21 | 1983-01-28 | Seiko Epson Corp | Semiconductor device substrate |
| JPS62252156A (en) * | 1986-04-25 | 1987-11-02 | Hitachi Ltd | Semiconductor device |
-
1988
- 1988-11-26 JP JP63298729A patent/JP2694871B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5815225A (en) * | 1981-07-21 | 1983-01-28 | Seiko Epson Corp | Semiconductor device substrate |
| JPS62252156A (en) * | 1986-04-25 | 1987-11-02 | Hitachi Ltd | Semiconductor device |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5256903A (en) * | 1990-02-28 | 1993-10-26 | Hitachi Ltd. | Plastic encapsulated semiconductor device |
| US6891252B2 (en) | 2001-02-20 | 2005-05-10 | Infineon Technologies Ag | Electronic component with a semiconductor chip and method of producing an electronic component |
| WO2004082018A2 (en) * | 2003-03-11 | 2004-09-23 | Infineon Technologies Ag | Electronic component comprising a semiconductor chip and a plastic housing, and method for producing the same |
| WO2004082018A3 (en) * | 2003-03-11 | 2004-11-11 | Infineon Technologies Ag | Electronic component comprising a semiconductor chip and a plastic housing, and method for producing the same |
| US7508083B2 (en) | 2003-03-11 | 2009-03-24 | Infineon Technologies Ag | Electronic component comprising a semiconductor chip and a plastic housing, and method for producing the same |
| JP2014192347A (en) * | 2013-03-27 | 2014-10-06 | Murata Mfg Co Ltd | Resin-sealed electronic equipment and electronic device with the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2694871B2 (en) | 1997-12-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |