JPH02141116U - - Google Patents

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Publication number
JPH02141116U
JPH02141116U JP4997089U JP4997089U JPH02141116U JP H02141116 U JPH02141116 U JP H02141116U JP 4997089 U JP4997089 U JP 4997089U JP 4997089 U JP4997089 U JP 4997089U JP H02141116 U JPH02141116 U JP H02141116U
Authority
JP
Japan
Prior art keywords
circuit
output
impedance matching
input signal
amplifier circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4997089U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4997089U priority Critical patent/JPH02141116U/ja
Publication of JPH02141116U publication Critical patent/JPH02141116U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の増幅回路の第1の実施例を
示す回路図、第2図は、同第2の実施例を示す回
路図、第3図は、従来のA級の増幅回路の一例を
示す図、第4図は、第3図に示した回路による信
号増幅動作を示す図である。 10,16,18……トランス、11A,11
B……トランジスタ、12,14……抵抗器、1
3……電源、15……出力回路、17……チヨー
クコイル。
FIG. 1 is a circuit diagram showing a first embodiment of the amplifier circuit of the present invention, FIG. 2 is a circuit diagram showing the second embodiment, and FIG. 3 is a circuit diagram of a conventional class A amplifier circuit. FIG. 4, which is a diagram showing an example, is a diagram showing a signal amplification operation by the circuit shown in FIG. 3. 10, 16, 18...transformer, 11A, 11
B...Transistor, 12, 14...Resistor, 1
3...power supply, 15...output circuit, 17...chiyoke coil.

Claims (1)

【実用新案登録請求の範囲】 直流バイアスを用いて入力信号の増幅を行なう
増幅回路において、 前記入力信号を増幅する増幅手段の出力段に、
当該増幅手段によつて増幅された出力信号に含ま
れる直流分を除去する直流分除去回路を接続し、
当該直流分除去回路の後段に、出力回路とのイン
ピダンス整合を行なうインピーダンス整合手段を
接続したことを特徴とする増幅回路。
[Claims for Utility Model Registration] In an amplifier circuit that amplifies an input signal using a DC bias, an output stage of an amplification means for amplifying the input signal,
Connecting a DC component removal circuit that removes a DC component included in the output signal amplified by the amplification means,
An amplifier circuit characterized in that an impedance matching means for performing impedance matching with an output circuit is connected to a subsequent stage of the DC component removal circuit.
JP4997089U 1989-04-27 1989-04-27 Pending JPH02141116U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4997089U JPH02141116U (en) 1989-04-27 1989-04-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4997089U JPH02141116U (en) 1989-04-27 1989-04-27

Publications (1)

Publication Number Publication Date
JPH02141116U true JPH02141116U (en) 1990-11-27

Family

ID=31568113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4997089U Pending JPH02141116U (en) 1989-04-27 1989-04-27

Country Status (1)

Country Link
JP (1) JPH02141116U (en)

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