JPS6213012U - - Google Patents
Info
- Publication number
- JPS6213012U JPS6213012U JP10289785U JP10289785U JPS6213012U JP S6213012 U JPS6213012 U JP S6213012U JP 10289785 U JP10289785 U JP 10289785U JP 10289785 U JP10289785 U JP 10289785U JP S6213012 U JPS6213012 U JP S6213012U
- Authority
- JP
- Japan
- Prior art keywords
- output
- audio signal
- side terminal
- control circuit
- output transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005236 sound signal Effects 0.000 claims 3
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第1図はこの考案の一実施例にかかるグラフイ
ツクイコライザの回路図、第2図はこのグラフイ
ツクイコライザにミユーテイング回路を接続した
場合の回路図、第3図は従来のグラフイツクイコ
ライザの回路図、第4図は従来のグラフイツクイ
コライザにミユーテイング回路を接続した場合の
回路図である。
1……プリアンプ、2,7〜13……抵抗、3
,16,19……カツプリングコンデンサ、4,
5……トランジスタ。
Figure 1 is a circuit diagram of a graphical equalizer according to an embodiment of this invention, Figure 2 is a circuit diagram when a muting circuit is connected to this graphical equalizer, and Figure 3 is a circuit diagram of a conventional graphical equalizer. , FIG. 4 is a circuit diagram when a muting circuit is connected to a conventional graphic equalizer. 1...Preamplifier, 2,7-13...Resistor, 3
,16,19... Coupling capacitor, 4,
5...transistor.
Claims (1)
力トランジスタの制御側端子に出力される音声信
号の周波数帯域を複数の部分周波数帯域に分割し
、各部分周波数帯域ごとに前記出力トランジスタ
の利得を加減して前記出力段トランジスタの被制
御側端子に出現する次段増幅されるべき音声信号
の周波数特性を制御するように構成された周波数
特性制御回路において、前記プリアンプから出力
される音声信号が前記出力トランジスタの制御側
端子に直接入力されかつ前記出力トランジスタが
固定バイアス電流で動作するように構成されてい
ることを特徴とする周波数特性制御回路。 The frequency band of the audio signal output from the preamplifier that controls the first stage amplification of the input source to the control side terminal of the output transistor is divided into a plurality of partial frequency bands, and the gain of the output transistor is adjusted or subtracted for each partial frequency band. In a frequency characteristic control circuit configured to control the frequency characteristics of an audio signal to be amplified in the next stage that appears at a controlled side terminal of an output stage transistor, the audio signal output from the preamplifier controls the output transistor. 1. A frequency characteristic control circuit, wherein the frequency characteristic control circuit is configured such that a bias current is input directly to a side terminal and the output transistor operates with a fixed bias current.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10289785U JPS6213012U (en) | 1985-07-08 | 1985-07-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10289785U JPS6213012U (en) | 1985-07-08 | 1985-07-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6213012U true JPS6213012U (en) | 1987-01-26 |
Family
ID=30974958
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10289785U Pending JPS6213012U (en) | 1985-07-08 | 1985-07-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6213012U (en) |
-
1985
- 1985-07-08 JP JP10289785U patent/JPS6213012U/ja active Pending
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