JPH02140937A - Silicon substrate - Google Patents
Silicon substrateInfo
- Publication number
- JPH02140937A JPH02140937A JP29500788A JP29500788A JPH02140937A JP H02140937 A JPH02140937 A JP H02140937A JP 29500788 A JP29500788 A JP 29500788A JP 29500788 A JP29500788 A JP 29500788A JP H02140937 A JPH02140937 A JP H02140937A
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- oxygen
- silicon
- semiconductor device
- atoms
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 47
- 239000010703 silicon Substances 0.000 title claims abstract description 47
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 47
- 239000000758 substrate Substances 0.000 title claims abstract description 46
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 26
- 239000001301 oxygen Substances 0.000 claims abstract description 26
- 230000007547 defect Effects 0.000 claims abstract description 13
- 239000013078 crystal Substances 0.000 claims abstract description 12
- 239000002244 precipitate Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 22
- 239000010408 film Substances 0.000 abstract description 11
- 238000005247 gettering Methods 0.000 abstract description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 6
- 230000007423 decrease Effects 0.000 abstract description 6
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 6
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 5
- 239000000126 substance Substances 0.000 abstract description 2
- 239000010409 thin film Substances 0.000 abstract description 2
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 3
- 239000000356 contaminant Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001556 precipitation Methods 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はシリコン基板に関し、特に汚染不純物や微小欠
陥のゲッター能力をもつイントリンシックゲッタリング
用シリコン基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a silicon substrate, and more particularly to a silicon substrate for intrinsic gettering that has the ability to getter contaminants and minute defects.
〔従来の技術J
イントリンシックゲッタリン、グ(以下IGと略す)は
、シリコン基板内部の結晶欠陥領域に半導体装置製造過
程で潜入する汚染不純物や微小欠陥をゲッターする技術
である。[Prior Art J Intrinsic gettering (hereinafter abbreviated as IG) is a technology for gettering contaminant impurities and minute defects that sneak into crystal defect regions inside a silicon substrate during the manufacturing process of semiconductor devices.
従来この種のシリコン基板では、シリコン基板表面数μ
mから数十μmの深さでは酸素析出による結晶欠陥の無
い領域であるので、シリコン基板内部に比べ酸素濃度が
極端に低く10”乃至1o17原子/cot(ASTM
F−121−76による測ぬ以下同様)であった。Conventionally, with this type of silicon substrate, the silicon substrate surface has a
At a depth of several tens of micrometers from m, there are no crystal defects due to oxygen precipitation, so the oxygen concentration is extremely low compared to the inside of the silicon substrate.
F-121-76 was unexpected (the same applies hereafter).
単結晶中の酸素は転位を固着しシリコン基板の機械的強
度をあげる働きがあることが一般に知られている。しか
し、酸素濃度が1×1018原子/cm3より低いとそ
の働きが急激に低下する。It is generally known that oxygen in a single crystal has the function of fixing dislocations and increasing the mechanical strength of a silicon substrate. However, when the oxygen concentration is lower than 1×10 18 atoms/cm 3 , its function decreases rapidly.
上述した従来のイントリンシックゲッタリング用シリコ
ン基板は、表面の酸素濃度が1016乃至loH程度と
なっているため、シリコン基板表面の機械的強度の低下
がある。従って、このようなシリコン基板に半導体装置
を設けた場合、半導体装置の構成物質である酸化シリコ
ン膜や窒化シリコン膜等のパターン端部での応力により
転位等の結晶欠陥が導入されやすいという欠点がある。Since the above-described conventional silicon substrate for intrinsic gettering has a surface oxygen concentration of about 1016 to loH, the mechanical strength of the silicon substrate surface is reduced. Therefore, when a semiconductor device is provided on such a silicon substrate, there is a drawback that crystal defects such as dislocations are easily introduced due to stress at the pattern edges of the silicon oxide film, silicon nitride film, etc. that are the constituent materials of the semiconductor device. be.
特に最近の高密度、高集積化した半導体装置においては
顕著にみられる。This is particularly noticeable in recent high-density, highly integrated semiconductor devices.
これら結晶欠陥が導入された半導体装置では、半導体素
子の電気特性の劣化を招き、歩留りの低下を引き起こし
、ひいては信頼性の低下にもなる。In a semiconductor device into which these crystal defects are introduced, the electrical characteristics of the semiconductor element deteriorate, resulting in a decrease in yield and, in turn, a decrease in reliability.
本発明のシリコン基板は、I X 10 ”g子/dよ
り高い濃度の酸素を含む表面を有している。The silicon substrate of the present invention has a surface containing oxygen at a concentration higher than I x 10''g/d.
上述した従来のシリコン基板に対し、本発明はイントリ
ンシックゲッタリング用シリコン基板でありながら、シ
リコン基板表面の酸素濃度が1×10′″原子/dより
高く、シリコン基板表面で半導体装置を構成するシリコ
ンと異なる物質の応力に十分耐えうる機械的強度を持つ
。In contrast to the conventional silicon substrate described above, the present invention is a silicon substrate for intrinsic gettering, but the oxygen concentration on the silicon substrate surface is higher than 1 x 10'' atoms/d, and a semiconductor device is configured on the silicon substrate surface. It has sufficient mechanical strength to withstand the stress of materials different from silicon.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例におけるPNダイオードの逆
方向電流・電圧特性を示す図である。FIG. 1 is a diagram showing the reverse current/voltage characteristics of a PN diode in an embodiment of the present invention.
すなわち、シリコン基板内部で結晶欠陥層が、表面付近
で無欠陥層がそれぞれ形成され、1.4×101′原子
/dの酸素を表面から裏面まで均一に含むシリコン基板
に通常の方法で半導体素子を形成して半導体装置を完成
させ、その特性を測定した。第1図において、曲線Aは
従来のシリコン基板に用いた場合の、曲線Bは本実施例
の特性曲線である。なお、この従来のシリコン基板は表
面の酸素濃度が3X10”原子/aIIである。That is, a crystal defect layer is formed inside the silicon substrate, a defect-free layer is formed near the surface, and a semiconductor element is formed by a normal method on a silicon substrate that uniformly contains 1.4 x 101' atoms/d of oxygen from the front surface to the back surface. A semiconductor device was completed by forming a semiconductor device, and its characteristics were measured. In FIG. 1, curve A is the characteristic curve when a conventional silicon substrate is used, and curve B is the characteristic curve of this embodiment. Note that this conventional silicon substrate has a surface oxygen concentration of 3×10″ atoms/aII.
第1図から明らかな様に、従来のシリコン基板を用いた
半導体装置に比べ本実施例では逆バイアスに対する電流
は極めて小さい。As is clear from FIG. 1, the current for reverse bias is extremely small in this embodiment compared to a conventional semiconductor device using a silicon substrate.
本願発明者が曲線A、Bの測定結果が得られた試料の表
面の結晶欠陥を選択エツチング法により観察したところ
、本発明の試料には、結晶欠陥が全く観察されなかった
が、従来のシリコン基板を用いた試料には10個/dの
転位が半導体素子分離のフィールド酸化シリコン膜のパ
ターン端部に観察された。これは、本発明のシリコン基
板では、表面の酸素濃度が1.4X10”原子/aaと
高いために、シリコン基板表面がフィールド酸化シリコ
ン膜の応力に十分耐えたためである。When the inventor of the present application observed the crystal defects on the surface of the samples from which the measurement results of curves A and B were obtained using the selective etching method, no crystal defects were observed in the samples of the present invention, whereas conventional silicon In the sample using the substrate, 10 dislocations/d were observed at the pattern end of the field silicon oxide film for semiconductor element isolation. This is because in the silicon substrate of the present invention, the surface oxygen concentration was as high as 1.4×10'' atoms/aa, so the silicon substrate surface could sufficiently withstand the stress of the field silicon oxide film.
以上のように、本実施例によれば、フィールド酸化シリ
コン膜のパターン端部で結晶欠陥の発生がなく、PN接
合の逆方向電流が減少し高性能かつ高品質の半導体装置
を高歩留りで得ることができる。As described above, according to this embodiment, there are no crystal defects at the pattern ends of the field silicon oxide film, the reverse current of the PN junction is reduced, and high performance and high quality semiconductor devices can be obtained at a high yield. be able to.
第2図は本発明の他の実施例のシリコン基板中の酸素濃
度をSIMS(2次イオン質量分析)により測定した時
の深さ方法の分布図である。本発明のシリコン基板を得
るためには、例えば以下の処理を施せば良い。まず、1
.8X10”原子/−の酸素を含むシリコン基板を12
00℃で3時間の熱処理を施し、シリコン基板表面付近
の酸素を外方拡散するとシリコン基板表面の酸素濃度は
10′′原子/dとなる(第2図(a))、次に、70
0℃4時間の熱処理を施し酸素濃度が高いシリコン基板
内部に酸素析出核を成長させる。この後、既知のLPC
UD (減圧気相成長)法により窒化シリコン膜を圧さ
60μmシリコン基板に被着し、1200℃、3時間の
熱処理を施すとシリコン基板内部から表面へ酸素が拡散
する。(第2図−(b))。これらの処理を施せば、本
発明のシリコン基板が得られる。FIG. 2 is a distribution diagram of the depth method when oxygen concentration in a silicon substrate is measured by SIMS (secondary ion mass spectrometry) according to another embodiment of the present invention. In order to obtain the silicon substrate of the present invention, the following treatment may be performed, for example. First, 1
.. 12 silicon substrates containing 8X10” atoms/- of oxygen
When heat treatment is performed at 00°C for 3 hours and oxygen near the silicon substrate surface is diffused outward, the oxygen concentration on the silicon substrate surface becomes 10'' atoms/d (Fig. 2(a)).
Heat treatment is performed at 0° C. for 4 hours to grow oxygen precipitation nuclei inside the silicon substrate, which has a high oxygen concentration. After this, the known LPC
A silicon nitride film is deposited on a silicon substrate to a thickness of 60 μm using the UD (low pressure vapor deposition) method, and heat treated at 1200° C. for 3 hours to cause oxygen to diffuse from the inside of the silicon substrate to the surface. (Figure 2-(b)). By performing these treatments, the silicon substrate of the present invention can be obtained.
この実施例では、シリコン基板表面の酸素濃度をあげる
方法として、表面に酸素の耐拡散マスクとして窒化シリ
コン膜な被着し、シリコン基板内部の酸素を表面に拡散
させたが、イオン注入等で酸素を導入してもかまわない
。In this example, as a method of increasing the oxygen concentration on the surface of the silicon substrate, a silicon nitride film was deposited on the surface as an oxygen diffusion-resistant mask to diffuse the oxygen inside the silicon substrate to the surface. It is okay to introduce.
以上説明したように本発明は、イントリンシックゲッタ
リング用シリコン基板において、1×101″原子/a
aより高い酸素濃度の表面を有するシリコン基板とする
ことにより、シリコン基板表面の機械的強度の低下がな
くなる効果がある。As explained above, the present invention provides a silicon substrate for intrinsic gettering with 1 x 101'' atoms/a.
By using a silicon substrate having a surface with an oxygen concentration higher than a, there is an effect that the mechanical strength of the silicon substrate surface does not decrease.
従って、本発明のシリコン基板に半導体装置を設けるこ
とにより、半導体装置の機械物質である酸化シリコン膜
や窒化シリコン膜等の薄膜パターン端部での応力に対し
ても転位等の結晶欠陥が導入されにくく、半導体素子の
電気特性の劣化がなく、高品質の半導体装置を高歩留り
で提供することができる。Therefore, by providing a semiconductor device on the silicon substrate of the present invention, crystal defects such as dislocations are not introduced even under stress at the edge of a thin film pattern such as a silicon oxide film or a silicon nitride film, which is a mechanical substance of the semiconductor device. It is possible to provide high-quality semiconductor devices at a high yield without deteriorating the electrical characteristics of semiconductor elements.
第1図は本発明の一実施例におけるPNダイオードの逆
方向電流−電圧特性を示す図、第2図(a) 、 (b
)は本発明の他の実施例のシリコン基板中の酸素濃度を
SIMSにより測定した深さ方向の分布図である。
代理人 弁理士 内 原 晋
茅
菌
(α)
θ、l
÷Lノ<Aアズ
lθ(V)
第
茅
圀(b)FIG. 1 is a diagram showing the reverse current-voltage characteristics of a PN diode in an embodiment of the present invention, and FIGS. 2(a) and (b)
) is a distribution diagram in the depth direction of the oxygen concentration in a silicon substrate measured by SIMS in another example of the present invention. Agent Patent Attorney Uchihara Shin Kaya (α) θ, l ÷ Lノ<A as l θ (V) Dai Kayakuni (b)
Claims (1)
シリコン基板の表面を無欠陥層としたシリコン基板にお
いて、1×10^1^8原子/cm^3より高い濃度の
酸素を含む表面を有することを特徴とするシリコン基板The inside of the silicon substrate has a crystal defect layer caused by oxygen precipitates,
A silicon substrate whose surface is a defect-free layer, characterized by having a surface containing oxygen at a concentration higher than 1×10^1^8 atoms/cm^3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29500788A JPH02140937A (en) | 1988-11-21 | 1988-11-21 | Silicon substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29500788A JPH02140937A (en) | 1988-11-21 | 1988-11-21 | Silicon substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02140937A true JPH02140937A (en) | 1990-05-30 |
Family
ID=17815129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29500788A Pending JPH02140937A (en) | 1988-11-21 | 1988-11-21 | Silicon substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02140937A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1873823A1 (en) * | 2006-06-26 | 2008-01-02 | SUMCO Corporation | Method of producing bonded wafer |
-
1988
- 1988-11-21 JP JP29500788A patent/JPH02140937A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1873823A1 (en) * | 2006-06-26 | 2008-01-02 | SUMCO Corporation | Method of producing bonded wafer |
US7507641B2 (en) | 2006-06-26 | 2009-03-24 | Sumco Corporation | Method of producing bonded wafer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3143473B2 (en) | Silicon-on-porous silicon; manufacturing method and material | |
US5244819A (en) | Method to getter contamination in semiconductor devices | |
JPS62500414A (en) | 3-V and 2-6 group compound semiconductor coating | |
EP0449589A1 (en) | Method of producing a SOI structure | |
JPH0555230A (en) | Soi wafer and manufacture thereof | |
JP2998330B2 (en) | SIMOX substrate and method of manufacturing the same | |
US11646208B2 (en) | Method for manufacturing semiconductor device | |
JPH02140937A (en) | Silicon substrate | |
JPH0410544A (en) | Manufacture of semiconductor device | |
JPS62176145A (en) | Manufacture of semiconductor substrate | |
JPH0297015A (en) | Heat treatment method | |
JPH04206932A (en) | Semiconductor device and manufacture thereof | |
JP2518378B2 (en) | Method for manufacturing semiconductor device | |
JPH0282578A (en) | Manufacture of thin film transistor | |
JPH10214843A (en) | Manufacturing method of semiconductor substrate | |
JPS58132919A (en) | Manufacture of semiconductor device | |
KR100390909B1 (en) | Method for gettering semiconductor device | |
JPS6149427A (en) | Manufacture of semiconductor device | |
JP2689946B2 (en) | Manufacturing method of infrared detector | |
JPH02218109A (en) | Method of forming silicon leyar in when lating layer | |
JPH03166726A (en) | Method and device for forming silicon oxide | |
KR0124562B1 (en) | Method of forming the isolation layer on a bipolar device | |
JP2002289819A (en) | Simox substrate | |
JPH03136324A (en) | Manufacture of semiconductor device | |
JPH0396223A (en) | Forming method for soi structure |