JPH02140916A - Crystal growth of semiconductor thin film - Google Patents

Abstract

PURPOSE:To form a large crystal grain diameter and control position of crystal grain boundary by projecting an energy beam on an amorphous semiconductor thin film repeatedly at certain intervals for forming seeds and by recrystallizing the amorphous semiconductor thin film by a specific low-temperature heat treatment with the seeds as crystal nucleus. CONSTITUTION:An amorphous silicon thin film 1-2 is accumulated on an amorphous insulation substrate 1-1 and then an energy beam 1-3 which is focused in spot shape is irradiated to this amorphous silicon thin film 1-2 in steps with certain gaps to allow seeds 1-4 to be formed on the amorphous silicon thin film 1-2. Furthermore, the amorphous silicon thin film 1-2 is subject to solid phase growth with the seeds 1-4 as crystal nucleus and the solid growth anneal temperature is set to 5000 to 700 deg.C. In this kind of low-temperature annealing, only crystal grains with crystal orientation having small crystal growth activation energies are allowed to grow selectively and also slowly and to become large. With this, a large crystal grain diameter 1-6 can be obtained and the location of the crystal grain boundary 1-6 can also be controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for growing a semiconductor thin film with excellent crystallinity on an amorphous insulating substrate such as a quartz substrate or a glass substrate.

[Prior art] A polycrystalline silicon thin film with a large crystal grain size and uniform crystal orientation is formed on an amorphous insulating substrate or an amorphous insulating substrate.
Alternatively, the method for forming a single crystal silicon thin film is 5O
I (Silicon On In5ulato
r) known as technology. (SOI structure formation technology, industrial book). Broadly classified, there are recrystallization methods, epitaxial methods, insulating layer embedding methods, and bonding methods. Recrystallization methods are classified into two types: a method in which silicon is melted and recrystallized by laser annealing or electron beam annealing, and a solid phase growth method in which silicon is grown in a solid phase without raising the temperature to a melting temperature. The solid phase growth method is superior in that it can be recrystallized at a relatively low temperature.

It has also been reported that crystal grains in silicon thin films grew despite low-temperature heat treatment at 550°C. (
IEEE Electron Device
L et ter s, vo 1.
EDL-8, No.

8, p361. August 1987).

[Problem N to be solved by the invention] In the solid phase growth method, a single crystal silicon sheet is required as a starting point for crystal growth. In the absence of the single crystal silicon sheet, the activation energy for solid phase growth is small, but the activation energy i for nucleation is large, so a higher temperature heat treatment is first performed to generate the nuclei. Requires long processing time. Numerous crystal grains grow due to the nuclei existing randomly in the silicon film, and each of the crystal grains does not grow large. Also, because the growth of crystal grains is random, the obtained recrystallized silicon T! IF
I have no idea where the grain boundaries exist in A. Furthermore, the crystal orientation is not aligned. Therefore, when a thin film semiconductor device such as a thin film transistor is manufactured using such a recrystallized silicon thin film, the variation in characteristics within the same substrate is large, making it impractical.

In conventional methods in which crystal growth is performed by scanning an energy beam such as a laser beam or an electron beam over the entire surface of a substrate, non-uniform crystal growth occurs due to the scanning of the energy beam irradiation. The surface shape is highly uneven. Warping of the amorphous insulating substrate also poses a problem. This problem becomes particularly serious when a glass substrate with a low softening temperature is used.

The present invention solves the above-mentioned problems associated with the SOI method, particularly energy beam annealing, and forms a flat silicon thin film with a uniform and large crystal grain size over the entire surface of the substrate. The purpose is to control the position. The present invention also provides a method for manufacturing a thin film semiconductor device such as a thin film transistor with excellent characteristics on an amorphous insulating substrate such as a quartz substrate or a glass substrate.

[Means for Solving the Problems] The method for growing crystals of a semiconductor thin film of the present invention involves depositing an amorphous semiconductor thin film on an amorphous insulating substrate, and focusing the method onto the amorphous semiconductor thin film in the form of a spot. A sheet is formed by irradiating the energy beam stepwise at intervals, and the amorphous semiconductor N film is recrystallized by low-temperature heat treatment at 500°C to 700'C using the sheet as a core. shall be.

[Example] In FIG. 1(a), 1-1 is an amorphous insulating substrate.

A quartz substrate, a glass substrate, or the like is used. Si
A Si substrate covered with O2 may also be used. When using a quartz substrate or a 51 substrate covered with SiO2, it can withstand a high temperature process of 1200°C, but
When using a glass substrate, the softening temperature is low, so the
Limited to low temperature processes below 0°C. First, a thin amorphous silicon JPJI-2 is deposited on an amorphous insulating substrate 1-1. It is desirable that the amorphous silicon thin film 1-2 is uniform, does not contain minute crystallites, and does not have any nuclei for crystal growth. In the case of the LPCVD method, conditions are suitable where the devoting temperature is as low as possible and the devoting speed is fast.

When using silane gas (SiH), the temperature is 500 ”C~
Decomposition and deposition is possible at a debo temperature of about 560° C., or about 300° C. to 500° C. when disilane gas (Si2Ha) is used. Trisilane gas (Si3es) has a lower decomposition temperature.

If the debo temperature is increased, the deposited film becomes polycrystalline, so
There is also a method of temporarily making it amorphous by implanting Si ions.

In the case of the plasma CVD method, film formation is possible even when the substrate temperature is 500° C. or lower. Further, if hydrogen plasma or argon plasma treatment is performed immediately before the deposition, cleaning of the substrate surface and film formation can be performed continuously. The photo-excited CVD method is also effective in that low-temperature deposition at 500° C. or less, cleaning of the substrate surface, and film formation can be performed continuously. E
In the case of a high vacuum evaporation method such as the B evaporation method, since the film is porous, oxygen from the atmosphere is easily taken into the film, which hinders crystal growth. In order to prevent this, it is effective to densify the crotch by performing low temperature heat treatment at about 300'C to 500C before taking it out from the vacuum atmosphere. The sputtering method is similar to the high vacuum evaporation method.

In order to form a sheet of crystal growth on the amorphous silicon thin film that does not contain nuclei formed in this way, an energy beam focused into a spot shape is applied stepwise to the amorphous silicon thin film 1 at intervals. -2 Irradiate the surface. This situation is shown in FIG. 1(b). 1-3 represents an energy beam, and 1-4 is a sheet generated by irradiation with the energy beam 1-3. The binding energy of 5i-3i is about 1.83 eV. Therefore, it is necessary to irradiate an energy beam with an energy of 1.83 eV or more. The energy beam may be a laser beam or an electron beam.

As the laser beam, an argon laser with an oscillation wave length of 500 nm or a XeCl excimer laser with an oscillation wave length of 308 nm is used. The energy per photon is 2.41 eV.

It is 4.03eV. The output is usually several watts to several tens of watts. It is better to make the beam diameter as small as possible. This laser beam 1-3 is irradiated stepwise at intervals as shown in FIG. 1(b). The spacing is approximately twice the solid phase growth distance.

For example, if solid phase growth advances 5 μm from the sheet, L = 10
It can be μm. On the other hand, in the case of an electron beam, an electron beam with an accelerating voltage of several kV to several tens of kV and a current of several mA is narrowed down to a beam of about several hundred people and irradiated. The pond is similar to that of a laser beam. In this way, sheets 1-4 are formed at intervals on the amorphous silicon thin film 1-2.

Next, the amorphous silicon thin film 1111-2 is grown in solid phase using the sheet 1-4 as a nucleus. The solid phase growth method is
Furnace annealing using a quartz tube is convenient.

As the annealing atmosphere, nitrogen gas, hydrogen gas, argon gas, helium gas, etc. are used. Annealing may be performed in a high vacuum atmosphere of 1×10 −8 to I×10 ”” Torr. Solid phase growth annealing temperature is 500
℃~700℃. In such low-temperature annealing, only crystal grains having a crystal orientation with a small activation energy for crystal growth grow selectively, and moreover, they grow slowly and to a large size. The solid phase growth of the amorphous silicon thin film 1-2 starts from the contact surface between the sheet 1-4 and the amorphous silicon thin film 1-2, and progresses radially around this area. The situation is shown in FIG. 1(C). 1-5 is sheet 1-4
It shows a crystalline phase that has grown in a solid phase with . This figure shows an intermediate stage in the solid phase growth process. FIG. 1(d) shows how solid-phase growth progresses and grains grown from both directions collide with each other at the midpoint between two adjacent sheets, forming a grain boundary 1-6. Said sheet 1-
4 and the grain boundary 1-6 becomes a crystal phase. As mentioned earlier, if the sheet spacing, that is, the step irradiation spacing of the energy beam, is set to, for example, 20 μm.

Crystal phase 1-5 is a crystalline region of 20 μm on each side centered on the sheet. In this way, a large-grain polycrystalline silicon thin film in which the locations of grain boundaries are controlled is produced.

The large grain polycrystalline silicon thin film produced using the present invention is
An example of application to a thin film transistor will be explained with reference to FIG. As shown in Figure 1(d), grain boundaries 1-6
Since the location of the crystal phase 1 is known, avoid this location and
A thin film transistor is manufactured so that -5 becomes a channel region. A large-grain polycrystalline silicon thin film substrate produced as described above is shown in FIG. 2(a). 2-1 is an amorphous insulating substrate. 2-2 is a sheet, and 2-3 is a crystal phase formed by solid phase growth. 2-4 is a grain boundary. Next, the silicon thin film is patterned by photolithography to form an island shape as shown in FIG. 2(b). At this time, the patterning is performed so that the crystal phase 2-3 is located at the center of the island pattern. Next, Figure 2 (C
), a gate oxide film 2-5 is formed. The method for forming the gate oxide film is LPCVD method,
Alternatively, photo-excited CVD method, plasma oxidation method, E
5 such as CR plasma CVD method, vacuum evaporation method, plasma oxidation method, high pressure oxidation method, etc.
There is a low temperature method below 00'C. The gate oxide film formed by the low-temperature method becomes an excellent film that is denser and has fewer interface states by heat treatment. Amorphous insulating substrate 2
When using a quartz substrate as -1, a thermal oxidation method can be used. The thermal oxidation method includes a dry oxidation method and a wet oxidation method, but the dry oxidation method is more suitable because the oxidation temperature is as high as 1000° C. or more, but the film quality is excellent.

Next, as shown in FIG. 2(d), the gate electrode 2-6
form. At this time, the gate electrode 2-6 is connected to the grain boundary 2
-4 and sheet 2-2 so as not to overlap. Therefore, the silicon under the gate electrode 2-6 becomes a crystalline phase. The gate electrode material may be polycrystalline silicon thin film, molybdenum silicide, metal film such as aluminum or chromium, or IT.
A transparent conductive film such as O or 5n02 can be used. Film forming methods include CVD, sputtering, vacuum evaporation, and the like, but detailed description thereof will be omitted here.

Subsequently, as shown in FIG. 2(e), the gate electrode 2-
Impurity 1 is ion-implanted using 6 as a mask to form a source region 2-7 and a drain region 2-8 in a self-aligned manner. In the figure, 2-3 is a completely crystalline region, which becomes the channel region of a λ(OS) type thin film transistor. Since the crystal grain boundary 2-4 is buried in the drain region 2-8, it affects the transistor characteristics. has no adverse effect.

As the impurity, P'' or As' is used when fabricating an Nch transistor, and Bo, etc. is used when fabricating a Pch transistor. As the impurity addition method, in addition to ion implantation, laser doping or plasma There are methods such as a doping method. When a quartz substrate is used as the amorphous insulating substrate 2-1, a thermal diffusion method can be used. The impurity concentration is I x 10
” to lXl0”am-”.

Subsequently, as shown in FIG. 2(f), an interlayer insulating film 2-
Layer 9. As the interlayer insulation film material, an oxide film, a nitride film, or the like is used. The film thickness may be any thickness as long as the insulation is good, but it is usually from several thousand to several micrometers. A simple method for forming the nitride film is the LPCVD method or the plasma CVD method. For the reaction, a mixed gas of ammonia gas (NH3), silane gas, and nitrogen gas, or a mixed gas of silane gas and nitrogen gas, etc. is used.

Here, hydrogen plasma method or hydrogen ion implantation method,
Alternatively, if hydrogen ions are introduced by a method such as hydrogen diffusion from a plasma nitride film, defects such as dangling bonds existing at the gate oxide film interface are inactivated. Such a hydrogenation step may be performed before laminating the glabellar insulating film 2-9.

Next, as shown in FIG. 2<g>, contact holes are formed in the interlayer insulating film and the gate insulating film, contact electrodes are formed, and a source electrode 2-10 and a drain electrode 2-10 are formed.
11. The source electrode and drain electrode are formed of a metal material such as aluminum. In this way, a thin film transistor is formed.

[Effects of the Invention] Conventionally, it was unknown how many crystal grain boundaries existed in the channel region of a thin film transistor. It was not possible to know where the grain boundaries were located or how large the grains were. However, according to the present invention,
Large grain sizes can be obtained, and the locations of grain boundaries can also be controlled. Since it is now possible to use only the crystal region excluding this crystal grain boundary portion as a channel region, it is possible to turn on thin film transistors more easily than before.
The current increases and the OFF current decreases. In addition, the threshold voltage is also reduced, and transistor characteristics are greatly improved. Variations in transistor characteristics are extremely small.

Since it has become possible to produce a silicon thin film with excellent crystallinity in which the location of crystal grain boundaries is controlled on an amorphous insulating substrate, this will greatly contribute to the development of SOI technology. There is only one layer of the silicon thin film. Furthermore, since the sheet is formed by step irradiation with an energy beam, the number of steps such as photo steps does not increase at all. Since it can be manufactured using a low-temperature process of 600° C. or lower, it is possible to use a glass substrate that is inexpensive and has a low heat-resistant temperature. Even though an excellent silicon thin film can be obtained, the cost does not increase.

Since it is possible to fabricate thin film transistors with excellent characteristics on an amorphous insulating substrate, sufficient high-speed operation can be achieved even when applied to an active matrix substrate in which a driver circuit is integrated on the same substrate. Furthermore, it has great effects on reducing power supply voltage, reducing current consumption, and improving reliability.

Further, since it is possible to manufacture the device by a low-temperature process at 600° C. or lower, it is highly effective in reducing the cost and increasing the area of the active matrix substrate.

When the present invention is applied to a contact image sensor in which a charging conversion element and its scanning circuit are integrated on the same chip, it is possible to increase the reading speed, increase the resolution, and increase the gradation. produce an effect. Once high-resolution single-sensitivity is achieved, a close-contact image sensor for color reading will be developed.
It is also easy to apply. Of course, this has great effects in reducing power supply voltage, reducing current consumption, and improving reliability.

Also, since it can be produced by a low-temperature process,
Close-contact image sensor chip can be made longer,
- A reading device for large-sized facsimiles such as A4 or A3 size can be realized using a book chip. Therefore, it is possible to avoid the troublesome and unreliable technique of joining two sensor chips, and the mounting yield is also improved.

In addition to quartz and glass substrates, sapphire substrates (
A 120 g ) or M g O-A l 20
A crystalline insulating substrate such as 3°BP or CaF2 can also be used.

Although the description has been given above using a thin film transistor as an example, the present invention can also be applied to elements using thin films such as bipolar transistors or heterojunction bipolar transistors. Also, S○ like a three-dimensional device
The present invention can also be applied to elements using engineering technology.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are process diagrams showing a method for growing crystals of a semiconductor thin film according to the present invention. FIGS. 2(a) to 2(g) are process diagrams of a thin film transistor showing an example in which the present invention is applied to a thin film transistor. 1-1; amorphous insulating substrate 1-3; energy beam 1-4; sheet 1-5; crystal phase 1-6; crystal grain boundary 2-3; Masayoshi Kamiyanagi (other I) (b) (C) Figure 1 (a) (b) (C) Figure 2 (e) (f) Figure 2

Claims (1)

[Claims] An amorphous semiconductor thin film is deposited on an amorphous insulating substrate, and a spot-shaped energy beam is irradiated stepwise at intervals on the amorphous semiconductor thin film to form a sheet. A method for growing crystals of a semiconductor thin film, characterized in that the amorphous semiconductor thin film is recrystallized by low-temperature heat treatment at 500° C. to 700° C. using the amorphous semiconductor thin film as a core.