JPH02138636A - Diagnosing system for multiplex system in its operation mode - Google Patents

Abstract

PURPOSE:To diagnose a comparator in its operation mode by converting one of a pair of output data under its operation into the different data to input this data into the comparator for decision of the data normalcy and outputting the other non-converted output data when the data normalcy is confirmed. CONSTITUTION:A deciding part 13 sets periodically the diagnostic modes and converts one of a pair of output data into the prescribed data to output this to a comparator 5 after inversion for example. When the comparator 5 outputs a discordance signal, the normalcy of the comparator 5 is decided. At the same time, the other normal non-converted output data is outputted. Then the abnormality is decided when no answer is received for a prescribed period of time or the output of the discordance signal is confirmed. Then an error process like a degenerating operation, etc., is carried out. As a result, the comparator 5 can be diagnosed during its operation and therefore the reliability is improved for a multiplex system which is operated for 24 hours.

Description

[Detailed Description of the Invention] (Summary) The present invention relates to a method for diagnosing a multiplexed system during operation, and an object of the present invention is to diagnose, during operation, a comparison circuit that outputs when the output data of each processing system matches. A check method during the operation of a multiplexed system in which multiple processing systems perform the same processing, each output data is compared by a comparison circuit, and output when they match, and the diagnostic mode is set at predetermined time intervals. a mode setting section; a conversion section that converts any one set of output data into corresponding predetermined data and inputs it to a comparison circuit when set to diagnostic mode; and the comparison circuit when a mismatch is notified in the diagnosis mode. A determination unit is provided that determines that the output data is normal and also outputs other unconverted output data, and determines that the output data is abnormal when there is a match notification or no notification. The data is converted and input to a comparison circuit to determine normality, and when it is determined to be normal, other non-converted output data is output.

[Industrial application field]

The present invention relates to improvements in diagnostic methods during operation of multiplexed systems.

In recent years, there has been a demand for highly reliable computer systems, and highly reliable systems with multiplex configurations have been developed.

For example, in a system in which the central processing units are duplicated and the processing results are compared and output when they match, correct results cannot be obtained if the comparison circuit itself breaks down.

Therefore, it is necessary to check the normality of the comparison circuit.
Conventionally, a method of diagnosing (checking) when the power is turned on has been adopted, but in recent years, this has been difficult in systems that operate less than 24 hours a day.Therefore, a multiplex system that can check the comparison circuit during operation has been developed. A diagnostic method during operation is required.

[Conventional technology]

FIG. 4 is an explanatory diagram of a conventional diagnostic method.

The duplex system shown in Fig. 4 consists of two sets of central processing units C.
PU 1 and CPU 2 are made to perform the same processing, and the comparison circuit 5 compares the respective processing results. When they match, one of the two held in the comparison circuit 5 (for example, CPU 1
This method outputs the output (output of 1) to an output circuit 5 such as a register, and when there is a mismatch, one CPU performs degenerate operation.

Here, the diagnosis of each system and the comparison circuit 5 is carried out prior to operation when the power is turned on, and the diagnosis of each system is as follows.
CPU 1 and CPU 2 perform self-diagnosis, and the comparison circuit 5 diagnoses, for example, 5VP (SERVICE PRO
The diagnostic circuit 3 of the CESSOR) inputs specific data (same data or different data) to the comparison circuit 5,
Diagnose based on match/mismatch, and if everything is normal, start operation.

[Question 8 to be solved by the invention] A fault that outputs a match signal when there is a mismatch is not detected during operation and requires periodic diagnosis, but for a 24-hour operating system, it is necessary to There is a problem in that conventional methods of diagnosis are sometimes not applicable.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a method for diagnosing a comparison circuit during operation of a multiplexing system.

[Means to solve the problem]

In order to achieve the above object, the diagnostic method during operation of the multiplexing system of the present invention includes a diagnostic mode setting section (11) that sets the diagnostic mode at predetermined time intervals, as shown in FIG. and a converter (20) that converts any one set of output data into corresponding predetermined data and inputs it to the comparison circuit (5) when the diagnostic mode is set, and a converter (20) that converts any one set of output data into corresponding predetermined data and inputs it to the comparison circuit (5), and a converter that is notified of a discrepancy in the diagnostic mode. A determining unit (13) is provided which determines that the comparison circuit is normal when the comparison circuit is normal and outputs other non-converted output data, and determines that the comparison circuit is abnormal when there is a match notification or no notification.

[For production]

The diagnostic mode is periodically set, and any set of output data is converted into predetermined data, for example inverted, and outputted to the comparison circuit 5.

When the comparison circuit 5 outputs a mismatch signal, the comparison circuit is determined to be normal, and other normal unconverted output data is output, and when there is no response for a predetermined time or a match signal is output, it is determined to be abnormal. to handle errors such as degenerate operation.

〔Example〕

Embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram of the diagnostic system of the embodiment, and FIG. 3 is a flowchart of the diagnostic process.

In this embodiment, an example is shown in which an inverter 16 for inverting the logic of data is provided in each processing system (CPU) as the converter 20, and the CPU on the side set to the diagnostic mode inverts the logic and outputs it. In Figure 3, CPU A, CPU B
are two sets of central processing units that constitute a redundant system,
Each of them is equipped with an inversion section 16, and when in the operation mode, output data DA and DB, which are the same processing results, are outputted to the comparison circuit 5, and one CPU set to the diagnostic mode inverts the output data by the inversion section 16. 5 is the comparison circuit to be diagnosed, CPU A, CPU
It compares the output data OA and DB of B and outputs a match signal or a mismatch signal, and if they match in the operation mode, it outputs the specified system (C
Outputs the output data of P [J
3b (CPU B side) that outputs the output data of the system specified; 11 is a diagnostic mode setting unit that sets the diagnostic mode when the power is turned on and for a certain period of time, for example, every hour; 13 is a determination unit When the diagnostic mode is set, the match/mismatch signal of the comparison circuit 5 is monitored to determine whether the comparison circuit 5 is correct or not, and if it is normal (mismatch), one CPU that is not set to the diagnostic mode is activated. A device that outputs a specified data sending signal and notifies the recovery mechanism 14 in the case of an abnormality. 14 is a recovery mechanism, which disconnects one of CI"U and degenerates when an abnormality in the comparison circuit 5 is detected. 15 is a data input unit which is configured with a common memory and stores data to be processed; 16 is a data input unit for each C;
When outputting the processing results with the inverting unit installed in the PU,
If the diagnostic mode is set, the output data is inverted and output to the comparator circuit 5. 6 is an output circuit, which is composed of, for example, a register. 12 is an error generating section, which is identified at the first ``A h disconnection''. data 3
4 is output to the comparator circuit 5 via the OR gate 4. 4 is an OR gate.

Note that the diagnosis mode setting section 11. The error occurrence unit 12° determination unit 135 and recovery mechanism 14 are provided in the SVP 10.

With the diagnostic system configured as described above, the diagnostic mode is set at regular intervals, and diagnostic processing is performed as follows. (
(See FIG. 3) (1) The diagnostic mode setting unit 11 first sets the CPU A to the diagnostic mode and notifies the determining unit 13.

(2) When CPIIA outputs output data DA, 1
If it is the diagnostic mode, the reversing unit 16
The logic of the output data DA is inverted and outputted, and since cpUB is not in the diagnostic mode, the output data DB is not inverted and outputted as is.

(3) The determination unit 12 receives the mismatch signal 31 from the comparison unit circuit 5.
When this is output, the comparison circuit 5 is determined to be normal and a data sending signal 33b is output.

As a result, the uninverted output data DB of CPUB is output to the output circuit 6.

(4) When the coincidence signal 30 is output, or when no signal is output even after a certain period of time has elapsed, the comparator circuit 5 is determined to be abnormal, and the recovery mechanism 14 is notified.

(5) The recovery mechanism 14 disconnects the comparison circuit 5 and sets it to a degenerate operation mode in which either CPU A or CPU B outputs one output data to the output circuit 6.

(6) If it is determined that the above diagnostic process is normal, then the CPtI B side is set to the diagnostic mode, the CPU A is set to the operational mode, and the same diagnostic process is performed.

In this case, when the comparison unit i5 outputs the mismatch signal 31, the output data DA of the CPU A is output to the output circuit 6.

(7) If the comparison circuit 5 is determined to be normal as described above, the other comparison circuits are diagnosed, and if all are normal, the operation mode is returned to.

As described above, by inverting the logic of one of the processing results during operation and inputting it to the comparator circuit 5, the normality of the comparator circuit 5 can be determined, and since normal output data is output, there is no need to interfere with the operation. There is no.

Note that when the power is turned on, specific data 34 is input from the error generating section 12 to the comparison circuit 5 for diagnosis.

In the above embodiment, the output data is inverted and outputted to the comparator circuit 5. However, it is also possible to invert the logic of the input data read from the data input section 15 and output the processing result to the comparator circuit 5. Similar results are obtained.

It goes without saying that the present invention is not limited to a duplex system, but can be applied to any device that detects data matching in a triple system or more.

FIG. 2 is a block diagram of the diagnostic system according to the embodiment, FIG. 3 is a flowchart of the diagnostic process, and FIG. 4 is an explanatory diagram of the conventional diagnostic method.

In the figure, CPU A and CPU B are central processing units, 4 is an OR gate, 5 is a comparison circuit, 6 is an output circuit, and 10 is a svp.
.

11 is a diagnostic mode setting section, 12 is an error generation section, 13 is a determination section, 14 is a recovery mechanism, 15 is a data input section, 16 is an inversion section, and 20 is a conversion section.

[Effects of the Invention] The present invention provides a multiplex system diagnosis method for diagnosing a comparison circuit using processing data during operation.
Since it can be diagnosed during operation, it has a great effect on improving the reliability of multiplexed systems such as 24-hour operation.

[Brief explanation of the drawing]

Figure 1 is a diagram of the principle of the present invention. Principle diagram of the present invention Figure 1 Example diagnostic system block diagram Figure 2 Diagnosis processing flowchart M Figure 3 Figure 4

Claims (1)

[Scope of Claims] A diagnostic method during operation of a multiplexed system in which a plurality of processing systems perform the same processing, each output data is compared in a comparison circuit (5), and output when they match, the method comprising: A diagnostic mode setting section (11) that sets the diagnostic mode at time intervals; and a comparing circuit (5) that converts any one set of output data into corresponding predetermined data when the diagnostic mode is set.
A conversion unit (20) that inputs input into the circuit determines that the comparison circuit is normal when a mismatch is notified in the diagnostic mode and outputs other unconverted output data, and determines that it is abnormal when a match is notified or no notification is received. A determination unit (13) is provided, which converts any one set of output data out of the output data in operation into different data and inputs it to the comparison circuit to determine normality, and when it is determined to be normal, converts it into different data. A diagnostic method during operation of a multiplex system characterized by outputting unconverted output data.