JPH02138437U - - Google Patents

Info

Publication number
JPH02138437U
JPH02138437U JP1989047553U JP4755389U JPH02138437U JP H02138437 U JPH02138437 U JP H02138437U JP 1989047553 U JP1989047553 U JP 1989047553U JP 4755389 U JP4755389 U JP 4755389U JP H02138437 U JPH02138437 U JP H02138437U
Authority
JP
Japan
Prior art keywords
bridge
integrated circuit
hybrid integrated
circuit board
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989047553U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989047553U priority Critical patent/JPH02138437U/ja
Publication of JPH02138437U publication Critical patent/JPH02138437U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例を示す混成集積回
路装置の要部の斜視図であり、第2図は従来の混
成集積回路装置の要部を示す斜視図である。 図において、1……半導体素子、2……金属細
線、6……アース電極、7……ブリツジ、8……
厚膜回路基板である。なお、各図中の同一符号は
同一または相当部分を示す。
FIG. 1 is a perspective view of a main part of a hybrid integrated circuit device showing an embodiment of this invention, and FIG. 2 is a perspective view of a main part of a conventional hybrid integrated circuit device. In the figure, 1...semiconductor element, 2... thin metal wire, 6... ground electrode, 7... bridge, 8...
It is a thick film circuit board. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 回路基板上にメタライズされたアース電極と半
導体素子の電極とをブリツジを介して電気的に接
続した混成集積回路装置において、前記回路基板
を熱伝導性に優れた材料で構成し、前記ブリツジ
を平面実装可能な直方体の金属製もしくはメタラ
イズしたセラミツク製としたことを特徴とする混
成集積回路装置。
In a hybrid integrated circuit device in which a ground electrode metallized on a circuit board and an electrode of a semiconductor element are electrically connected via a bridge, the circuit board is made of a material with excellent thermal conductivity, and the bridge is made of a flat surface. A hybrid integrated circuit device characterized by being a mountable rectangular parallelepiped made of metal or metallized ceramic.
JP1989047553U 1989-04-20 1989-04-20 Pending JPH02138437U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989047553U JPH02138437U (en) 1989-04-20 1989-04-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989047553U JPH02138437U (en) 1989-04-20 1989-04-20

Publications (1)

Publication Number Publication Date
JPH02138437U true JPH02138437U (en) 1990-11-19

Family

ID=31563582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989047553U Pending JPH02138437U (en) 1989-04-20 1989-04-20

Country Status (1)

Country Link
JP (1) JPH02138437U (en)

Similar Documents

Publication Publication Date Title
JPH02138437U (en)
JPS63114001U (en)
JPH0281044U (en)
JPH0474443U (en)
JPS6293890U (en)
JPH0231067U (en)
JPS64301U (en)
JPH0336145U (en)
JPH0181026U (en)
JPH0158956U (en)
JPH0487659U (en)
JPS63170964U (en)
JPH01165699U (en)
JPS6249204U (en)
JPS62128674U (en)
JPH0267673U (en)
JPS61132284U (en)
JPS6413718U (en)
JPH0330440U (en)
JPH0459158U (en)
JPH01137625U (en)
JPS6039255U (en) integrated element
JPS61182109U (en)
JPH01137501U (en)
JPS61149334U (en)