JPH02130905A - Parallel chip element structure - Google Patents

Parallel chip element structure

Info

Publication number
JPH02130905A
JPH02130905A JP63285061A JP28506188A JPH02130905A JP H02130905 A JPH02130905 A JP H02130905A JP 63285061 A JP63285061 A JP 63285061A JP 28506188 A JP28506188 A JP 28506188A JP H02130905 A JPH02130905 A JP H02130905A
Authority
JP
Japan
Prior art keywords
chip
parallel
elements
chip element
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63285061A
Other languages
Japanese (ja)
Inventor
Makoto Kano
真 狩野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63285061A priority Critical patent/JPH02130905A/en
Publication of JPH02130905A publication Critical patent/JPH02130905A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To highly efficiently package a plurality of parallel chip elements on a substrate by packaging the elements after the elements are integrally constituted as one component. CONSTITUTION:A plurality of two or more chip elements 1, such as an angular chip resistance, laminated ceramic capacitor, Ta chip capacitor, etc., are connected with an electrode 3 for soldering in parallel with each other so as to integrally constitute the elements 1 to form one component. When the component constituted in such way is packaged, parallel chip element structures can be packaged on the packaging space of the substrate having a limited area with high efficiency.

Description

【発明の詳細な説明】 〔産業上の利用分野］ 本発明は、チップ素子を構成する構造に関する［発明の
概要コ 本発明は、基板実装について用いられるチップ素子に於
いて、このチップ素子を並列にし同一キャップをかぶせ
部品実装面積を効率よくする様に［従来の技術］ 従来の基板実装について用いられるチップ素子。Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a structure constituting a chip element. [Conventional technology] A chip element used in conventional board mounting.

は、単一の素子で構成されており、抵抗、コンデンサ等
容々を基板上に構成されたパターンへ実装し並列回路を
組むものであった。It consisted of a single element, and resistors, capacitors, etc. were mounted on a pattern formed on a substrate to form a parallel circuit.

［発明が解決しようとする課題］ しかし、前述の従来技術では、高密度実装化や多様化が
進むにつれ、基板上への部品実装スペースも限られ、部
品実装面積も制約を受けるという問題点を有する。そこ
で本発明は、このような問題点を解決するもので、その
目的とするところは、部品実装面積の限られた実装スペ
ースを効率よく実装するところにある。[Problems to be Solved by the Invention] However, with the above-mentioned conventional technology, as the density of mounting and diversification progresses, the space for mounting components on the board is limited, and the area for mounting components is also restricted. have The present invention is intended to solve these problems, and its purpose is to efficiently mount components in a limited mounting space.

［Ｈ題を解決するための手段］ 本発明の並列チップ素子構造は、基板実装に用いられる
並列チップ素子構造に於いて、複数個の前記並列チップ
素子をあらかじめ、一部品として構成することを特徴と
する。[Means for Solving Problem H] The parallel chip element structure of the present invention is characterized in that, in the parallel chip element structure used for board mounting, a plurality of the parallel chip elements are configured in advance as one component. shall be.

［実施例コ 第１図は、従来のチップ素子の構成図であり、角型チッ
プ抵抗、積層セラミック、コンデンサーチップタンタル
コンデンサ、等が有り、チップ素子１とはんだ肘用電極
２で構成されている。[Example 1] Figure 1 is a block diagram of a conventional chip element, which includes a square chip resistor, a multilayer ceramic, a capacitor chip tantalum capacitor, etc., and is composed of a chip element 1 and a soldering elbow electrode 2. .

第２図は、従来のチップ素子１を使用した実装図であり
、並列回路を構成した場合、パターンを並列回路分引き
廻しておき、そこヘチツ、プ素子を実装する様にするも
のである。FIG. 2 is a mounting diagram using the conventional chip element 1. When a parallel circuit is constructed, the pattern is routed for the parallel circuit and the chip element is mounted there.

第６図は、本発明の並列チップ素子構造の構成図であり
、角型チップ抵抗、積層セラミック、コンデンサ、チク
ブタンタルコンデンサ等の組合せをしたものである。そ
の組合せのチップ素子１を２個以上並列に並べ、各電極
を従来のはんだ肘用電極２よりも大きくした、はんだ対
電極（大）３にて固定したものである。FIG. 6 is a block diagram of the parallel chip element structure of the present invention, which is a combination of square chip resistors, multilayer ceramics, capacitors, tantalum capacitors, etc. Two or more chip elements 1 of this combination are arranged in parallel, and each electrode is fixed with a solder counter electrode (large) 3 that is larger than the conventional solder elbow electrode 2.

第４図は、本発明の実装図であり、従来の一素子一パタ
ーンのパターンから、並列回路の場合、−パターンを引
き廻すことで、並列チップ素子４を実装し得る様にした
ものである。FIG. 4 is a mounting diagram of the present invention. In the case of a parallel circuit, a parallel chip element 4 can be mounted by routing a - pattern from the conventional one-element-one-pattern pattern. .

ここに挙げた実施例は、あくまでも一実施例にすぎない
ものである。The embodiments listed here are merely examples.

［発明の効果コ 以上述べた様に、本発明によれば、基板実装について用
いられるチップ素子に於いて、２個以上の並列チップ素
子を構成して、基板上に実装することにより、面積の限
られた実装スペースを効率よく実装することが可能とな
る。[Effects of the Invention] As described above, according to the present invention, in a chip element used for board mounting, by configuring two or more parallel chip elements and mounting them on a board, the area can be reduced. It becomes possible to efficiently implement the limited mounting space.

特に、小型化された製品の基板実装に於いては、顕著な
効果を有す、る。Particularly, it has a remarkable effect when mounting miniaturized products on boards.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来のチップ素子の構成図。第２図は、従来
のチップ素子を使用した実装図。第３図は、本発明の並
列チップ素子構造の構成図。第４図は、本発明の実装図
。 １・・・・・・・・・チップ素子 ２・・・・・・・・・はんだ肘用電極 ５・・・・・・・・・はんだ肘用電極（大）４・・・・
・・・・・並列チップ素子 以上FIG. 1 is a configuration diagram of a conventional chip element. FIG. 2 is a mounting diagram using a conventional chip element. FIG. 3 is a block diagram of the parallel chip element structure of the present invention. FIG. 4 is an implementation diagram of the present invention. 1... Chip element 2... Soldering elbow electrode 5... Soldering elbow electrode (large) 4...
...Parallel chip elements or more

Claims (1)

【特許請求の範囲】[Claims] 基板実装に用いられる並列チップ素子構造に於いて、複
数個の前記並列チップ素子をあらかじめ一部品として構
成する事を特徴とする並列チップ素子構造。A parallel chip element structure used for board mounting, characterized in that a plurality of the parallel chip elements are configured in advance as one component.
JP63285061A 1988-11-11 1988-11-11 Parallel chip element structure Pending JPH02130905A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63285061A JPH02130905A (en) 1988-11-11 1988-11-11 Parallel chip element structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63285061A JPH02130905A (en) 1988-11-11 1988-11-11 Parallel chip element structure

Publications (1)

Publication Number Publication Date
JPH02130905A true JPH02130905A (en) 1990-05-18

Family

ID=17686654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63285061A Pending JPH02130905A (en) 1988-11-11 1988-11-11 Parallel chip element structure

Country Status (1)

Country Link
JP (1) JPH02130905A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04133475U (en) * 1991-05-31 1992-12-11 日本電気株式会社 Mounting structure for surface mount components
EP0901137A2 (en) * 1997-09-05 1999-03-10 Kemet Electronics Corporation Multiple element capacitor
JP2006351898A (en) * 2005-06-17 2006-12-28 Matsushita Electric Ind Co Ltd Printed board unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04133475U (en) * 1991-05-31 1992-12-11 日本電気株式会社 Mounting structure for surface mount components
EP0901137A2 (en) * 1997-09-05 1999-03-10 Kemet Electronics Corporation Multiple element capacitor
EP0901137A3 (en) * 1997-09-05 2000-04-05 Kemet Electronics Corporation Multiple element capacitor
JP2006351898A (en) * 2005-06-17 2006-12-28 Matsushita Electric Ind Co Ltd Printed board unit

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