JPH02130862A - Semiconductor assembly material - Google Patents

Semiconductor assembly material

Info

Publication number
JPH02130862A
JPH02130862A JP63284678A JP28467888A JPH02130862A JP H02130862 A JPH02130862 A JP H02130862A JP 63284678 A JP63284678 A JP 63284678A JP 28467888 A JP28467888 A JP 28467888A JP H02130862 A JPH02130862 A JP H02130862A
Authority
JP
Japan
Prior art keywords
die pad
stress
pad
resin
protrusions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63284678A
Other languages
Japanese (ja)
Inventor
Akinori Shindo
昭則 進藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63284678A priority Critical patent/JPH02130862A/en
Publication of JPH02130862A publication Critical patent/JPH02130862A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the strength of a die pad itself, to alleviate a deformation due to thermal stress, and to simultaneously reduce an internal crack by dispersing the influence (stress) of outer resin by providing protrusions at the lower part of the pad. CONSTITUTION:Protrusions 2 are provided at the lower part of a die pad 1. Thus, the strength of the pad 1 itself is increased, stress received from sealing resin 6 is dispersed to alleviate the deformation of the pad 1 due to resin stress, and an internal crack is resultantly suppressed. The protrusion may not be square post but be conical or columnar. The protrusions may be regularly disposed or irregularly located.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体集積回路の製造工程である半導体組立工
程において、ダイパッド材として適用して好適な半導体
組立材料に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor assembly material suitable for use as a die pad material in a semiconductor assembly process, which is a manufacturing process of semiconductor integrated circuits.

[従来の技術] 従来第1図に・示す様なパッケージ形態を有する工O,
LSI等の素子固定用のダイパッド材としては、厚さ約
150μr!L程度の平担な金属板が使用されていた。
[Prior art] Conventionally, there is a package O, which has a package form as shown in Fig. 1.
As a die pad material for fixing elements such as LSI, the thickness is about 150 μr! A flat metal plate of about L size was used.

ここでダイ゛パッドとは、半導体素子を固定するための
ものであり、特に半導体素子より外部への電気的接続を
行な5ための組立作業(ワイヤーボンディング)及び樹
脂封止作業を可能せしめる金属性の板状のものである。
Here, the die pad is used to fix a semiconductor element, and is a metal that enables assembly work (wire bonding) and resin sealing work for electrically connecting the semiconductor element to the outside. It is a sexual plate-like thing.

これは樹脂封止される半導体素子にはすべて使用される
This is used for all semiconductor devices that are sealed with resin.

よって、ダイパッドと素子は、グイボンド材と呼ばれる
(例えば銀ペーストなど)接着剤により接着されており
、さらにダイパッド面積は、半導体素子面積をカバーし
うるものとなっている。
Therefore, the die pad and the element are bonded together with an adhesive called a Guibond material (for example, silver paste), and the area of the die pad can cover the area of the semiconductor element.

[発明が解決しようとする課題] 一般に半導体素子の樹脂封止には、プラスチック系樹脂
、シリコン系樹脂等が用いられる。ここで特にプラスチ
ック系樹脂の場合を例にとると、樹脂封止されているダ
イパッドと封止樹上自体の物性の違い(熱膨張率等々)
などにより、熱ストレス(冷熱の衡激)などを受げた場
合、ダイパッドの変形により鵠パッケージにダイパッド
角の部分より内部クラック(亀裂)が発生する。
[Problems to be Solved by the Invention] Plastic resins, silicone resins, and the like are generally used for resin encapsulation of semiconductor elements. Taking the case of plastic resin as an example, there are differences in physical properties (coefficient of thermal expansion, etc.) between the resin-sealed die pad and the sealing tree itself.
If the package is subjected to thermal stress (the imbalance of cold and heat) due to such reasons, the die pad will deform and internal cracks will occur at the corners of the die pad.

また、このクランクは外部まで達する場合もあり、素子
の劣化、損傷を引き起こす原因となり工Oの信頼性を著
しく損なう。
In addition, this crank may reach the outside, causing deterioration and damage to the elements and significantly impairing the reliability of the workpiece.

周知の通り、ICは、産業、民生など用途を問わずあら
ゆる分野において利用されており、前述した様な熱スト
レスを受けうる場所での使用も多く、実用上も非常に大
きな問題でありた。
As is well known, ICs are used in all kinds of fields, including industrial and consumer applications, and are often used in places where they can be subjected to heat stress as described above, which poses a very big problem in practical terms.

[課麗を解決するための手段] 本発明は前述した問題点を解決するためになされたもの
であり、ダイパッド下部に突起物を設けることにより、
ダイパッド自体の強度を増し熱応力による変形を緩和す
ると同時に外部樹脂の影響(応力)を分散させ内部クラ
ックを減少させるものである。
[Means for solving problems] The present invention has been made to solve the above-mentioned problems, and by providing a protrusion at the bottom of the die pad,
This increases the strength of the die pad itself and alleviates deformation caused by thermal stress, while at the same time dispersing the influence (stress) of the external resin and reducing internal cracks.

なお、所望の突起物は、グイフレーム成形時にエツチン
グある丸・はプレスにより容易に得ることが可能である
Note that the desired protrusions can be easily obtained by pressing etched circles during molding of the Gui frame.

[実施例] 本実施例を第1図(1、(、c)に示す。[Example] This example is shown in FIG. 1 (1, (,c)).

第1図Cb)はICパッケージの断面、第1図(C)は
ダイパッドの下方斜視図である。
FIG. 1Cb) is a cross section of the IC package, and FIG. 1C is a downward perspective view of the die pad.

この様な構造を有するダイパッドを使用したところ、従
来と同一条件下での試験において、クラックによる不良
は発生しなかった。
When a die pad having such a structure was used, no defects due to cracks occurred in tests under the same conditions as conventional ones.

これは、ダイパッド下部に突起を設げたことにより、ダ
イパッド自体の強度が増したこと、並びに、封止樹脂か
ら受ける応力が分散したことにより、従来見られた様な
、樹脂応力によるダイパッドの変形が緩和され、結果的
に内部クラックの発生を抑制したものである。
This is because the strength of the die pad itself has been increased by providing a protrusion at the bottom of the die pad, and the stress received from the sealing resin has been dispersed, so that the deformation of the die pad due to resin stress as seen in the past has been avoided. As a result, the occurrence of internal cracks is suppressed.

なお、本実施例では四角柱状の突起物をダイパッド下部
に設けたが、この突起物は四角柱でなく、円錐状であっ
ても良(、円柱状であっても良い。
In this embodiment, a quadrangular prism-shaped protrusion is provided at the bottom of the die pad, but this protrusion may be conical (or cylindrical) instead of a quadrangular prism.

すなわち、突起物の形状は問わず金属面に複数個の突起
を有すれば良いのである。
That is, the shape of the protrusions does not matter, as long as the metal surface has a plurality of protrusions.

また、突起物は、規則的に配置しても不規則に配置され
てもかまわない。
Further, the protrusions may be arranged regularly or irregularly.

5・・−・・・・・・リード、リードフレーム4・・・
・・・・・・半導体素子(チップ)5・・・・・・・・
・Auワイヤー 6・・・・・・・・・封止樹脂 [発゛明の効果コ 本発明によれば樹脂の熱応力によるダイパッドの変形を
抑制し5ることから過大な熱ストレスが加わった場合に
おいてもパッケージにクラックの発生することのない、
より信頼性の高い半導体集積回路を提供することができ
る。
5...--Lead, lead frame 4...
・・・・・・Semiconductor element (chip) 5・・・・・・・・・
・Au wire 6・・・・・・・・・Sealing resin [Effects of the invention According to the present invention, deformation of the die pad due to thermal stress of the resin is suppressed 5, so that excessive thermal stress is not applied. No cracks will occur in the package even in the case of
A more reliable semiconductor integrated circuit can be provided.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(α)は、本実施例に用いた代表的な工Cのパッ
ケージ外観図であり、第1図(b)は、工C断面図、第
1図CC)は第1図(b)の図中ダイパッド部1及び2
の下方斜視図である。 第1図(b)各部の説明 1・・・・・・・・・ダイパッド 2・・・・・・・・・ダイパッド突起 以上
Fig. 1 (α) is an external view of the package of a typical machine C used in this example, Fig. 1 (b) is a sectional view of the machine C, and Fig. 1 CC) is a package appearance diagram of a typical machine C used in this example. ) Die pad parts 1 and 2 in the figure
FIG. Figure 1 (b) Description of each part 1...Die pad 2...Die pad protrusion or more

Claims (1)

【特許請求の範囲】[Claims] 半導体素子の組立工程において、前記半導体素子を固定
するために用いられている金属からなる素子の固定板(
以下ダイパッドと称する。)の裏面に、形状、大きさ、
位置、の規則性に拘らない突起物を有することを特徴と
する半導体組立材料。
In the semiconductor element assembly process, an element fixing plate (made of metal) used for fixing the semiconductor element (
Hereinafter, it will be referred to as a die pad. ) on the back side, the shape, size,
A semiconductor assembly material characterized by having protrusions regardless of the regularity of their positions.
JP63284678A 1988-11-10 1988-11-10 Semiconductor assembly material Pending JPH02130862A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63284678A JPH02130862A (en) 1988-11-10 1988-11-10 Semiconductor assembly material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63284678A JPH02130862A (en) 1988-11-10 1988-11-10 Semiconductor assembly material

Publications (1)

Publication Number Publication Date
JPH02130862A true JPH02130862A (en) 1990-05-18

Family

ID=17681565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63284678A Pending JPH02130862A (en) 1988-11-10 1988-11-10 Semiconductor assembly material

Country Status (1)

Country Link
JP (1) JPH02130862A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9076776B1 (en) * 2009-11-19 2015-07-07 Altera Corporation Integrated circuit package with stand-off legs
CN113857646A (en) * 2021-10-27 2021-12-31 中国航空制造技术研究院 Fixing method of part to be welded suitable for linear friction welding

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9076776B1 (en) * 2009-11-19 2015-07-07 Altera Corporation Integrated circuit package with stand-off legs
CN113857646A (en) * 2021-10-27 2021-12-31 中国航空制造技术研究院 Fixing method of part to be welded suitable for linear friction welding

Similar Documents

Publication Publication Date Title
US6175149B1 (en) Mounting multiple semiconductor dies in a package
JP3007023B2 (en) Semiconductor integrated circuit and method of manufacturing the same
US6297547B1 (en) Mounting multiple semiconductor dies in a package
US5434106A (en) Integrated circuit device and method to prevent cracking during surface mount
US6157074A (en) Lead frame adapted for variable sized devices, semiconductor package with such lead frame and method for using same
US6306684B1 (en) Stress reducing lead-frame for plastic encapsulation
KR930020649A (en) Lead frame, semiconductor integrated circuit device using same, and manufacturing method thereof
JPH03177060A (en) Lead frame for semiconductor device
US6313519B1 (en) Support for semiconductor bond wires
US6414379B1 (en) Structure of disturbing plate having down set
US6583511B2 (en) Semiconductor device and a method of producing the same
JPH02130862A (en) Semiconductor assembly material
JPH0384958A (en) Manufacture of multichip package
KR920007155A (en) Semiconductor device and manufacturing method thereof
US20080157297A1 (en) Stress-Resistant Leadframe and Method
US20060197199A1 (en) Leadframe, coining tool, and method
JPS60120543A (en) Semiconductor device and lead frame used therefor
JPH0621132A (en) Semiconductor device and manufacture thereof
KR0155441B1 (en) Semiconductor package
JPH0758273A (en) Lead frame and semiconductor device using same
KR930011189A (en) Lead frame structure and wire bonding method of semiconductor device
JPH0437050A (en) Resin seal type semiconductor device
KR950000051Y1 (en) Semiconductor chip
JPH01179351A (en) Plastic-molded semiconductor device and its manufacture
KR950013052B1 (en) Semiconductor package