JPH02126237U - - Google Patents
Info
- Publication number
- JPH02126237U JPH02126237U JP3373189U JP3373189U JPH02126237U JP H02126237 U JPH02126237 U JP H02126237U JP 3373189 U JP3373189 U JP 3373189U JP 3373189 U JP3373189 U JP 3373189U JP H02126237 U JPH02126237 U JP H02126237U
- Authority
- JP
- Japan
- Prior art keywords
- storage unit
- fixed storage
- microprogram
- stores
- start address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002159 abnormal effect Effects 0.000 claims 1
- 230000005856 abnormality Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図はこの考案の一実施例による計算機を示
す構成図、第２図は、この考案の計算機における
マイクロプログラムの処理シーケンスのフローチ
ヤート、第３図は、従来の計算機の構成図、第４
図は、従来の計算機におけるマイクロプログラム
の処理シーケンスのフローチヤートである。
図において、１……マイクロＲＯＭ部、２……
中央演算処理部、３……マツプＲＯＭ部、４……
セレクタ、５ａ〜５ｂ……カウンタ、６……ドラ
イバ、７……表示器である。なお、図中同一ある
いは相当部分には同一符号を付して示してある。
FIG. 1 is a block diagram showing a computer according to an embodiment of this invention, FIG. 2 is a flowchart of a microprogram processing sequence in the computer of this invention, FIG. 3 is a block diagram of a conventional computer, and FIG.
The figure is a flowchart of a microprogram processing sequence in a conventional computer. In the figure, 1... micro ROM section, 2...
Central processing unit, 3...Map ROM unit, 4...
Selector, 5a-5b...counter, 6...driver, 7...display device. It should be noted that the same or corresponding parts in the figures are indicated by the same reference numerals.
Claims (1)
央演算処理部と、上記演算処理部に対して処理シ
ーケンスを記載したマイクロ固定記憶装置部と、
上記マイクロ固定記憶装置部に対して、その処理
すべきマイクロプログラムの開始アドレスが収納
されているマツプ固定記憶装置部と、上記中央演
算処理部の演算結果かまたは上記マツプ固定記憶
装置部の出力した開始アドレスかを選択するセレ
クタとを備えた計算機において、ある所定の命令
を実行する上での最長時間を設定出来るカウンタ
、最短時間を設定出来るカウンタとマイクロプロ
グラムの処理シーケスが上記設定時間範囲以外費
やした時、異常を表示するためのドライバ及び表
示器を付加することによつて、マイクロプログラ
ムの異常処理シーケンスが発生した場合、外部に
表示出来ることを特徴とする計算機。 a central arithmetic processing unit that executes predetermined instructions and has arithmetic processing capability; a micro fixed storage unit that stores a processing sequence for the arithmetic processing unit;
For the micro fixed storage unit, there is a map fixed storage unit that stores the start address of the microprogram to be processed, and a map fixed storage unit that stores the start address of the microprogram to be processed, and a map fixed storage unit that stores the calculation result of the central processing unit or the output of the map fixed storage unit. In a computer equipped with a selector that selects the start address, there is a counter that can set the longest time to execute a given instruction, a counter that can set the minimum time, and a microprogram processing sequence that takes outside the above set time range. 1. A computer characterized in that when an abnormal processing sequence of a microprogram occurs, it can be displayed externally by adding a driver and a display device for displaying the abnormality.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3373189U JPH02126237U (en) | 1989-03-24 | 1989-03-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3373189U JPH02126237U (en) | 1989-03-24 | 1989-03-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02126237U true JPH02126237U (en) | 1990-10-17 |
Family
ID=31537626
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3373189U Pending JPH02126237U (en) | 1989-03-24 | 1989-03-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02126237U (en) |
-
1989
- 1989-03-24 JP JP3373189U patent/JPH02126237U/ja active Pending