JPH02108155U - - Google Patents

Info

Publication number
JPH02108155U
JPH02108155U JP1707389U JP1707389U JPH02108155U JP H02108155 U JPH02108155 U JP H02108155U JP 1707389 U JP1707389 U JP 1707389U JP 1707389 U JP1707389 U JP 1707389U JP H02108155 U JPH02108155 U JP H02108155U
Authority
JP
Japan
Prior art keywords
storage unit
fixed storage
microprogram
stores
start address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1707389U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1707389U priority Critical patent/JPH02108155U/ja
Publication of JPH02108155U publication Critical patent/JPH02108155U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例による計算機を示
す構成図、第2図は、この考案の計算機における
マイクロプログラムの処理シーケンスのフローチ
ヤート、第3図は、従来の計算機の構成図、第4
図は、従来の計算機におけるマイクロプログラム
の処理シーケンスのフローチヤートである。 図において、1は、マイクロROM部、2は、
中央演算処理部、3は、マツプROM部、4は、
セレクタ、5は、カウンタ、6は、ドライバ、7
は、表示器である。なお、図中同一あるいは相当
部分には同一符号を付して示してある。
FIG. 1 is a block diagram showing a computer according to an embodiment of this invention, FIG. 2 is a flowchart of a microprogram processing sequence in the computer of this invention, FIG. 3 is a block diagram of a conventional computer, and FIG.
The figure is a flowchart of a microprogram processing sequence in a conventional computer. In the figure, 1 is a micro ROM section, 2 is
3 is a central processing unit; 3 is a map ROM unit; 4 is a
Selector, 5, counter, 6, driver, 7
is an indicator. It should be noted that the same or corresponding parts in the figures are indicated by the same reference numerals.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定の命令を実行し、演算処理能力を持つた中
央演算処理部と、上記演算処理部に対して処理シ
ーケンスを記載したマイクロ固定記憶装置部と、
上記マイクロ固定記憶装置部に対して、その処理
すべきマイクロプログラムの開始アドレスが収納
されているマツプ固定記憶装置部と、上記中央演
算処理部の演算結果かまたは上記マツプ固定記憶
装置部の出力した開始アドレスかを選択するセレ
クタとを備えた計算機において、ある所定の時間
を設定出来るカウンタとマイクロプログラムの処
理シーケンスが上記設定時間以上費やした時、異
常を表示するためのドライバ及び表示器を付加す
ることによつて、マイクロプログラムの異常処理
シーケンスが発生した場合、外部に表示出来るこ
とを特徴とする計算機。
a central arithmetic processing unit that executes predetermined instructions and has arithmetic processing capability; a micro fixed storage unit that stores a processing sequence for the arithmetic processing unit;
For the micro fixed storage unit, there is a map fixed storage unit that stores the start address of the microprogram to be processed, and a map fixed storage unit that stores the start address of the microprogram to be processed, and a map fixed storage unit that stores the calculation result of the central processing unit or the output of the map fixed storage unit. In a computer equipped with a selector for selecting a start address, a counter capable of setting a certain predetermined time, and a driver and a display device for displaying an abnormality when a microprogram processing sequence takes more than the above set time are added. A computer characterized in that, when an abnormal processing sequence of a microprogram occurs, it can be displayed externally.
JP1707389U 1989-02-16 1989-02-16 Pending JPH02108155U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1707389U JPH02108155U (en) 1989-02-16 1989-02-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1707389U JPH02108155U (en) 1989-02-16 1989-02-16

Publications (1)

Publication Number Publication Date
JPH02108155U true JPH02108155U (en) 1990-08-28

Family

ID=31230552

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1707389U Pending JPH02108155U (en) 1989-02-16 1989-02-16

Country Status (1)

Country Link
JP (1) JPH02108155U (en)

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