JPH02125508A - Input circuit - Google Patents

Abstract

PURPOSE:To obtain an input circuit proper to applications with a wide in-phase input voltage range and using a signal whose potential between two lines is small like a receiver in the two-wire communication system by selecting an output within a proper operating range in outputs of two operational amplifier circuits comprising components of different conduction type. CONSTITUTION:An input terminal 2 is connected to each noninverting input of operational amplifier circuits 31, 32 comprising different conduction type elements and an input terminal 1 is connected to inverting inputs. A signal inputted to the input terminal 2 and a signal VR are compared by an operational amplifier circuit 33 and in the case of a voltage higher than the signal VR, the output of the operational amplifier circuit 33 is VDD, a transmission gate 21 is turned on and an output signal of the operational amplifier circuit 31 appears at an output terminal 3. Moreover, when the voltage is lower than the VR conversely, the output of the operational amplifier circuit 33 goes to a GND level, a transmission gate 22 is turned on and an output signal of the operational amplifier circuit 32 appears at the output terminal 3.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an input circuit, and in particular, the present invention relates to an input circuit, and in particular, to a receiver in a two-wire communication system, a signal having a wide common-mode input voltage range and a small potential difference between two wires is used. This invention relates to an input circuit suitable for applications using.

[Conventional technology]

Conventionally, the circuit shown in FIG. 2 has been used as this type of input circuit. The configuration of FIG. 2 was similar to that of FIG. 3 or 4. First, FIG. 3 will be explained.

1 is an inverting input terminal, 2 is a non-inverting input terminal, and 3 is a voltage output terminal. A resistor 12 and a field effect transistor 4 constitute a bias circuit, and field effect transistors 5 and 6
, 7, 8.9 constitute a differential amplifier circuit, and field effect transistors 10.11 constitute a voltage output circuit.

In this circuit, the bias current is determined by the resistor 12 and the field effect transistor 4, and since the field effect transistors 4 and 9 constitute a current mirror, the bias current also flows to the differential amplifier circuit.

The voltage between the inverting input terminal 1 and the non-inverting input terminal 2 is amplified by a differential amplifier circuit, and the field effect transistor 1
The voltage is amplified by a voltage output circuit configured with a voltage of 0.11, and is output to the voltage output terminal 3.

The same applies to FIG. The difference between Fig. 3 and Fig. 4 is the difference in the constituent transistors. In the case of the configuration shown in Fig. 3, the common-mode input voltage range ranges from ground potential (hereinafter referred to as GND) +α to power supply voltage (hereinafter referred to as GND). VDD
), which corresponds to the range 51 in Figure 5, and the fourth
In the case of the configuration shown in the figure, it is from GND to VDD-α,
This is the range 52 in FIG.

[Problem to be solved by the invention]

Conventional input circuits have the following drawbacks because they are configured to output the output of a differential amplifier circuit via a voltage output circuit.

Taking FIG. 3 as an example, when the potentials of the inverting input terminal 1 and the non-inverting input terminal 2 are lowered, the drain potential of the field effect transistor 9 is also lowered accordingly.

In field effect transistor 9, the gate.

Source-to-source voltage V. When the relationship between the voltage vns between 3 and the drain and source is Van<Vos VT (where ■ is the threshold voltage FE of the field effect transistor 7.8°9), the drain current of the field effect transistor 9 is When V[<V T (however, VtN is the voltage at the input terminal 1.2), the drain current of the field effect transistor 9 becomes zero and it no longer operates as an input circuit.

Therefore, when such an input circuit is used as a receiving amplifier in a two-wire communication system, there is a drawback that when the common mode input voltage decreases, the receiving signal is no longer received, making communication impossible.

Further, the same applies to FIG. 4, and in the case of FIG. 4, there is a drawback that when the common mode input voltage becomes high, the received signal cannot be received.

The above drawbacks are serious in input circuits for receivers using two-wire communication systems, which require a wide input voltage range and have a small potential difference between input terminals.

[Means to solve the problem]

The input circuit of the present invention has first and second operational amplifier circuits configured with elements of different conductivity types, each of which has its non-inverting input and inverting input connected in parallel, and its output. The data input of the signal selection circuit is connected to the selection signal, one input is connected to an arbitrary constant voltage source, the other input is connected to the input terminal, and the output of the third operational amplifier circuit is connected to the signal selection circuit. The configuration is such that the output of is used as the output terminal.

〔Example〕

Next, one embodiment of the present invention will be described.

Operational amplifier circuits 31 and 3 configured with elements of different conductivity types
Input terminal 21 is connected to each non-inverting input of 2, and input terminal 1 is connected to the inverting input.

Here, the operational amplifier circuit 31 has a configuration as shown in FIG.

The common mode input voltage range is the range 51 in FIG. Further, the operational amplifier circuit 32 has a configuration as shown in FIG.

The common mode input voltage range is the range 52 in FIG.

Next, the non-inverting input of the operational amplifier circuit 33 is connected to the input terminal 2.
A constant voltage source 35 (hereinafter referred to as VR) is connected to the inverting input terminal. The set voltage range of VR is greater than or equal to the lower limit of the common-mode input voltage range of the operational amplifier circuit 31 and less than or equal to the upper limit of the common-mode input voltage range of the operational amplifier circuit 32, that is, 5 in FIG.
Set to a range of 3.

As described above, the signal input to the input terminal 2 and VR are compared by the operational amplifier circuit 33, and if the voltage is higher than VR, the output of the operational amplifier circuit 33 becomes VDD, the transmission gate 21 is turned on, and the operational amplifier circuit 31 output signals appear at output terminal 3.

Conversely, if the voltage is lower than VR, the operational amplifier circuit 33
The output becomes GND, the transmission gate 22 is turned on, and the output signal of the operational amplifier circuit 32 appears at the output terminal 3.

Furthermore, since the amplitudes of the signals input to the input terminals 1 and 2 are minute, the input terminal 1 may be used as the non-inverting input of the operational amplifier circuit 33 in addition to this embodiment.

〔Effect of the invention〕

As explained above, the present invention can change the power supply voltage from the ground potential to the power supply voltage by selecting the output of two operational amplifier circuits composed of elements of different conductivity types, which is within the appropriate operating range. Because it operates as an amplifier over a wide input range up to It has the effect of communicating.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a conventional circuit diagram, and FIGS. 3 and 4 are examples of the configuration of an operational amplifier circuit. FIG. 5 is an explanatory diagram showing the operating range of FIGS. 3 and 4. FIG. 1 to 5, 1.2...input terminal, 3...output terminal, 4-11...field effect transistor, 12...
... Resistor, 21.22 ... Transmission gate, 25 ... Power supply ffDD), 26
・・・・・・Ground (GND), 31~33.35・
...Operation amplifier circuit, 34... Constant voltage source (
V R), 51.52...Common mode input voltage range,
53... Setting range of constant voltage source. Agent: Patent Attorney Uchihara Shinjutsu Figure 3 Figure 4

Claims (1)

[Claims] The input terminal 1 is connected in parallel to the non-inverting input of each of the first and second operational amplifier circuits, which are configured with elements of different conductivity types, and the input terminal 2 is connected to the inverting input in parallel, so that the first and second operational amplifier circuits are connected in parallel. The output signal of is used as a data input, input terminal 1 or input terminal 2 is connected to a non-inverting input or an inverting input as a selection signal input, and an arbitrary constant voltage source is connected to the remaining inputs.
An input circuit characterized in that a signal selection circuit connected to an output of an operational amplifier circuit has an output terminal as an output terminal of the selection circuit which outputs one of the data inputs.