JPH02124639A - Synthesized signal generator - Google Patents
Synthesized signal generatorInfo
- Publication number
- JPH02124639A JPH02124639A JP63278010A JP27801088A JPH02124639A JP H02124639 A JPH02124639 A JP H02124639A JP 63278010 A JP63278010 A JP 63278010A JP 27801088 A JP27801088 A JP 27801088A JP H02124639 A JPH02124639 A JP H02124639A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- comparator
- frequency
- reference signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 101710162453 Replication factor A Proteins 0.000 claims 1
- 102100035729 Replication protein A 70 kDa DNA-binding subunit Human genes 0.000 claims 1
- 239000000284 extract Substances 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 abstract description 5
- 230000003247 decreasing effect Effects 0.000 abstract description 3
- 230000010355 oscillation Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 238000001514 detection method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
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- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、RF出力の周波数を確実に基準信号に同期さ
せる装置等に使用するだめのシンセサイズド信号発生装
置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a synthesized signal generation device for use in devices that reliably synchronize the frequency of an RF output with a reference signal.
従来の技術
第2図は従来のシンセサイズド信号発生装置の構成を示
している。第2図において、1は周波数変換器であり、
RF倍信号基準信号Aとを合成して(RF信号士基準信
号A)の成分の信号を低域通過フィルタ2に出力する。Prior Art FIG. 2 shows the configuration of a conventional synthesized signal generator. In FIG. 2, 1 is a frequency converter;
The RF multiplied signal and the reference signal A are combined and a signal of the component (RF signal multiplied reference signal A) is output to the low-pass filter 2.
3はコンパレータであり、低域通過フィルタ2の出力信
号を整形して位相比較器4に出力する。5は積分器であ
り、位相比較器4の出力信号を積分して電圧制御発振器
6に出力する。電圧制御発振器6は、積分器5の出力信
号で周波数制御されたRF倍信号周波数変換器1に出力
する。A comparator 3 shapes the output signal of the low-pass filter 2 and outputs it to the phase comparator 4. 5 is an integrator which integrates the output signal of the phase comparator 4 and outputs it to the voltage controlled oscillator 6. The voltage controlled oscillator 6 outputs a frequency-controlled RF signal to the frequency converter 1 using the output signal of the integrator 5.
次に上記従来例の動作について説明する。第2図におい
て、基準信号A、 Bが入力されると、周波数変換器
1がRF倍信号基準信号Aとの和およ3 ベージ
び差成分の信号を出力し、低域通過フィルタ2がRF倍
信号基準信号Aとの差成分の信号だけを取り出し、コン
パレータ3がこのRF倍信号基準信号Aとの差成分の信
号を波形整形する。位相比較器4が上記の整形されたR
F倍信号基準信号Aとの差成分の信号と基準信号Bとを
位相比較してその位相差信号を出力し、積分器5がこの
位相差信号を積分し、電圧制御発振器60周周波数変換
器v丁として出力する。この時、電圧制御発振器6の発
振周波数が基準信号Aと基準信号Bとの和に近づく方向
に上記位相差信号を積分することによって、電圧制御発
振器6のRF比出力周波数が基準信号Aと基準信号Bに
収束するように制御することができる。Next, the operation of the above conventional example will be explained. In FIG. 2, when the reference signals A and B are input, the frequency converter 1 outputs the sum of the RF multiplied signal and the reference signal A and the signal of the 3Bage difference component, and the low-pass filter 2 outputs the RF Only the signal of the difference component from the double signal reference signal A is taken out, and the comparator 3 shapes the waveform of the signal of the difference component from the RF double signal reference signal A. The phase comparator 4 has the above shaped R
The signal of the difference component from the F-fold signal reference signal A and the reference signal B are phase-compared and the phase difference signal is outputted, and the integrator 5 integrates this phase difference signal. Output as v-cho. At this time, by integrating the phase difference signal in the direction in which the oscillation frequency of the voltage controlled oscillator 6 approaches the sum of the reference signal A and the reference signal B, the RF ratio output frequency of the voltage controlled oscillator 6 is adjusted to the reference signal A and the reference signal B. It can be controlled to converge to signal B.
このように、上記従来のシンセサイズド信号発生装置で
も、RF比出力周波数を基準信号に同期させることがで
きる。In this way, even with the conventional synthesized signal generator described above, the RF specific output frequency can be synchronized with the reference signal.
発明が解決しようとする課題
しかしながら、上記従来のシンセサイズド信号発生装置
では、RF比出力周波数が基準信号の周波数よりも一定
値以上高くなると、(周波数変換器〜低域通過フイVり
)の帯域制限により周波数変換後の信号が検出できなく
なり、RF比出力周波数を基準信号に同期させることが
できないという問題点があった。Problems to be Solved by the Invention However, in the conventional synthesized signal generation device described above, when the RF specific output frequency becomes higher than the frequency of the reference signal by a certain value or more, the (frequency converter ~ low pass filter) There was a problem in that the frequency-converted signal could not be detected due to the band limit, and the RF specific output frequency could not be synchronized with the reference signal.
本発明はこのような従来の問題点を解決するものであり
、RF比出力周波数を確実に基準信号に同期させること
ができる優れたシンセサイズド信号発生装置を提供する
ことを目的とするものである。The present invention solves these conventional problems, and aims to provide an excellent synthesized signal generator that can reliably synchronize the RF specific output frequency with the reference signal. be.
課題を解決するための手段
本発明は上記目的を達成するために、コンパレータ3の
出力と周波数変換器1の出力とに、それぞれ信号の有無
を検出する検出器と、その検出器の出力信号なRF倍信
号基準信号Aとの差成分が一定周波数範囲内かどうかの
識別信号に変換して出力する識別回路とを設け、この識
別回路の出力信号で位相比較器を制御し、RF倍信号基
準信号Aとの差成分が一定周波数範囲内になるまで電圧
制御発振器6の発振周波数を下げる方向に位相差5 ノ
・−ノ
信号を出力し続けるようにしたものである。Means for Solving the Problems In order to achieve the above object, the present invention includes a detector for detecting the presence or absence of a signal at the output of the comparator 3 and the output of the frequency converter 1, respectively, and the output signal of the detector. An identification circuit is provided which converts the difference component from the RF multiplied signal reference signal A into an identification signal indicating whether or not it is within a certain frequency range and outputs the identification signal, and the output signal of this identification circuit controls the phase comparator, and the RF multiplied signal reference The phase difference signal 5 continues to be output in the direction of lowering the oscillation frequency of the voltage controlled oscillator 6 until the difference component from the signal A falls within a certain frequency range.
作用
したがって、本発明によれば上記のようにRF倍信号基
準信号Aとの差成分が一定周波数範囲内になるまで発振
周波数を下げる方向に位相差信号を出力し続けることに
よって、発振器の周波数を確実に基準信号に同期させる
ことができるという効果を有する。Therefore, according to the present invention, as described above, the frequency of the oscillator is decreased by continuing to output the phase difference signal in the direction of lowering the oscillation frequency until the difference component from the RF multiplied signal reference signal A falls within a certain frequency range. This has the effect of reliably synchronizing with the reference signal.
実施例
第1図は本発明の一実施例の構成を示すものである。第
1図において、従来例と同一機能のブロックには同一番
号を付与しである。7は検出器Aであり、周波数変換器
1の出力信号を検出して、識別回路9に検出信号を出力
する。8は検出器Bであり、コンパレータ3の出力信号
を検出して、識別回路9に検出信号を出力する。Embodiment FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, blocks having the same functions as those of the conventional example are given the same numbers. A detector A 7 detects the output signal of the frequency converter 1 and outputs a detection signal to the identification circuit 9. A detector B 8 detects the output signal of the comparator 3 and outputs a detection signal to the identification circuit 9.
次に上記実施例の動作について説明する。上記実施例に
おいて、検出器A7が周波数変換器1の出力信号を検出
できず、同時に検出器B8がコンパレータ3の出力信号
を検出できない間、識別口6 ページ
路9は位相比較器4に、電圧制御発振器6の発振周波数
を下げる方向に位相差信号を出力させる制御信号を出力
し続ける。検出器A7が周波数変換器1の出力信号を検
出するか、検出器B8がコンパレータ3の出力信号を検
出すると、識別回路9は位相比較器4の出力を制御する
信号を出力しなくなる。Next, the operation of the above embodiment will be explained. In the above embodiment, while the detector A7 cannot detect the output signal of the frequency converter 1, and at the same time the detector B8 cannot detect the output signal of the comparator 3, the identification port 6 and the page path 9 supply the phase comparator 4 with the voltage It continues to output a control signal that outputs a phase difference signal in the direction of lowering the oscillation frequency of the controlled oscillator 6. When the detector A7 detects the output signal of the frequency converter 1 or the detector B8 detects the output signal of the comparator 3, the identification circuit 9 stops outputting the signal for controlling the output of the phase comparator 4.
このように、上記実施例によれば、検出器A7が周波数
変換器1の出力信号を検出するか、検出器B8がコンパ
レータ3の出力信号を検出するまで、識別回路9が位相
比較器4に、電圧制御発振器6の発振周波数を下げる方
向に位相差信号を出力させる制御信号を出力し続け、コ
ンパレータ3の出力信号を一定周波数範囲内に引き込む
ことによって、発振器の周波数を確実に基準信号に同期
させることができるという効果を有する。In this way, according to the above embodiment, the identification circuit 9 is connected to the phase comparator 4 until the detector A7 detects the output signal of the frequency converter 1 or the detector B8 detects the output signal of the comparator 3. , by continuing to output a control signal that outputs a phase difference signal in the direction of lowering the oscillation frequency of the voltage controlled oscillator 6 and pulling the output signal of the comparator 3 within a certain frequency range, the frequency of the oscillator is reliably synchronized with the reference signal. It has the effect of being able to
発明の効果
本発明は上記実施例より明らかなように、RF倍信号基
準信号Aとの差成分が一定周波数範囲内になるまで発振
周波数を下げる方向に位相差信号71\−7
を出力し続けることによって、発振器の周波数を確実に
基準信号に同期させることができるという効果を有する
。Effects of the Invention As is clear from the above embodiment, the present invention continues to output the phase difference signal 71\-7 in the direction of lowering the oscillation frequency until the difference component from the RF multiplied signal reference signal A falls within a certain frequency range. This has the effect that the frequency of the oscillator can be reliably synchronized with the reference signal.
第1図は本発明の一実施例における信号発生装置の概略
ブロック図、第2図は従来の信号発生装置の概略ブロッ
ク図である。
1・・・周波数変換器、2・・・低域通過フィルタ、3
・・・コンパレータ、4・・・位相比較器、5・・・積
分器、6・・・電圧制御発振器、7・・・検出器A、8
・・・検出器B、9・・・識別回路FIG. 1 is a schematic block diagram of a signal generator according to an embodiment of the present invention, and FIG. 2 is a schematic block diagram of a conventional signal generator. 1... Frequency converter, 2... Low pass filter, 3
... Comparator, 4... Phase comparator, 5... Integrator, 6... Voltage controlled oscillator, 7... Detector A, 8
...Detector B, 9...Identification circuit
Claims (1)
この周波数変換器の出力信号からRF信号と基準信号A
との差成分の信号だけを取り出す低域通過フィルタと、
この低域通過フィルタの出力信号を整形するコンパレー
タと、このコンパレータの出力信号と上記周波数変換器
の出力信号から、上記RF信号と基準信号Aとの差成分
が一定周波数範囲内かどうかを検出して識別信号を出力
する識別回路と、この識別回路の出力信号で制御される
上記コンパレータの出力信号と基準信号Bとの位相を比
較してその位相差信号を出力する位相比較器と、この位
相比較器の出力信号を積分する積分器と、この積分器の
出力信号の電圧に応じて発振周波数が変化して上記RF
信号を送出する電圧制御発振器とを具備するシンセサイ
ズド信号発生装置。a frequency converter that synthesizes the RF signal and the reference signal A;
From the output signal of this frequency converter, the RF signal and the reference signal A are
A low-pass filter that extracts only the signal of the difference component between the
A comparator shapes the output signal of this low-pass filter, and detects whether the difference component between the RF signal and the reference signal A is within a certain frequency range from the output signal of this comparator and the output signal of the frequency converter. an identification circuit that outputs an identification signal using the identification circuit; a phase comparator that compares the phase of the output signal of the comparator controlled by the output signal of the identification circuit with the reference signal B and outputs a phase difference signal; The RF
A synthesized signal generation device comprising a voltage controlled oscillator that sends out a signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63278010A JPH02124639A (en) | 1988-11-02 | 1988-11-02 | Synthesized signal generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63278010A JPH02124639A (en) | 1988-11-02 | 1988-11-02 | Synthesized signal generator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02124639A true JPH02124639A (en) | 1990-05-11 |
Family
ID=17591379
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63278010A Pending JPH02124639A (en) | 1988-11-02 | 1988-11-02 | Synthesized signal generator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02124639A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4881464A (en) * | 1972-02-02 | 1973-10-31 | ||
JPS5854683A (en) * | 1981-09-29 | 1983-03-31 | Nec Corp | Bonding and sealing device |
-
1988
- 1988-11-02 JP JP63278010A patent/JPH02124639A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4881464A (en) * | 1972-02-02 | 1973-10-31 | ||
JPS5854683A (en) * | 1981-09-29 | 1983-03-31 | Nec Corp | Bonding and sealing device |
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