JPH02121366A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To make each total area of a drain and a source region constant so as to eliminate the anisotropy of an element due to asymmetry by a method wherein two active elements in a current mirror circuit are composed of two MISFETs, one has a shadow region on a source electrode side and the other has a shadow region on a drain electrode, connected with each other in parallel. CONSTITUTION:A MISFET is used as an active element, in a current mirror. A phenomenon such as a shadow region occurs even in the MISFET, and it occurs on the same side toward channels 21 and 22. For instance, provided that the shadow regions occur on the left side of the channels, they occur on a drain electrode side in the channel 21 and a source electrode side in the channel 22, so that an active element is composed of two MISFETs, which are different from each other in electric characteristics due to anisotropy, connected in parallel. As the anisotropy is caused by the asymmetry of the MISFETs in structure, all the anisotropies are gathered through two kinds of MISFETs, and the MISFETs are connected together in parallel, so that all the anisotropy of an active element can be canceled out.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to electronic circuit technology, and is particularly suitable for use in semiconductor integrated circuits.

``Prior art J'' Conventionally, MISFETs used in current mirror circuits have been fabricated with a pattern as shown in Figure 2(a).The rectangle 1 is the ion implantation region, and the rectangle 2 is the gate electrode. The ion implantation is performed at an angle of about 7 degrees with respect to the crystal axis perpendicular to the wafer surface in order to prevent the impurity concentration from increasing deep in the wafer due to channeling.

In the Selfaline process, ion implantation is performed after the gate electrode is formed. The state at this time is shown in Fig. 2(b). Fig. 2(b) is A-
This corresponds to the cross section of A'. The diffusion electrode area 11.12 in FIG. 2(a) corresponds to 11' and 12' in FIG. 2(b). The gate portion above the channel 21 in FIG. 2(a) corresponds to 21' in FIG. 2(b), and 31 is a gate oxide film.

Even if the pattern of the ion implantation region is rectangular as shown in Figure 2(a) 1, 1 in Figure 2(a) is similar to 11 and 1 because the gate electrode and gate oxide film shield the ion flow.
It is divided into two regions, ie, regions 11' and 12' in FIG. 2 Tb).

However, since the ion implantation has an angle as described above, there are 4
A shadow area as shown in 1 occurs. As a result, even though the pattern is symmetrical as shown in Figure 2(a), the actual device structure becomes asymmetrical as shown in Figure 2(b), and the electrical characteristics also exhibit anisotropy depending on the direction of the current. It turns out.

Therefore, in a current mirror circuit in which the electrical characteristics (threshold voltage, β) of the reference current large output side MISFET and the constant current output side MISFET must be completely the same, due to the anisotropy, the MISFET patterns are the same. Even so, the electrical characteristics are no longer the same, and the constant current output differs by about 10% from the base lit current. In particular, if the base 4 current input side MISFET and the constant current output side MISFET have a common source region, the above two MISFETs will inevitably
The difference is large because the electrodes where the shadow regions occur in the SFETs are different.

Furthermore, anisotropy in electrical properties is also caused by pattern deviation during patterning by lithography. The anisotropy in this case is due to the difference in area between the source region and the train region.

[Problem to be solved by the invention] However, the conventional technology
The drawback is that it is difficult to obtain the desired accurate current mirror effect.

The present invention aims to solve the drawbacks seen in the prior art, and focuses on the fact that the anisotropy of the electrical characteristics of MISFET is caused by the ion implantation angle and pattern misalignment.
By improving the shape of MISFET, MISF
The purpose is to eliminate the anisotropy of the electrical characteristics of ET and obtain an accurate current mirror effect.

[Means for Solving the Problem 1] Consisting of first and second MISFETs having the same electrical characteristics, the first MISFET has its source electrode connected to a common power supply terminal, and its gate electrode and drain electrode connected to a reference current input. The second MISFET has its source electrode connected to the common power supply terminal.

In each MISFET of the current mirror circuit in which the gate electrode is connected to the reference current input terminal and the drain electrode is connected to the constant current output terminal, a train region is arranged in the center, and gate electrodes of the same potential are placed between the drain regions. The structure is characterized in that source regions of the same potential are provided so as to sandwich this structure.

[Function] According to the above configuration of the present invention, the two active elements in the current mirror circuit have a shadow region on the source electrode side.
Since it is configured by parallel connection of ISFET and MISFET on the drain electrode side, the electrical characteristics are different from those of the two types of M
The total area of the drain region and the source region remains unchanged, and the anisotropy due to the asymmetry of the elements disappears from the characteristics of the two active elements in the current mirror circuit.

[Example] FIG. 1 shows an example of the present invention. 1 is a pattern of an ion implantation region, and 2 is a pattern showing a portion where a conductive material for forming a gate electrode (hereinafter referred to as gate electrode material) is left. When polysilicon is used as the gate electrode material and ion implantation is performed, 11. ll', 12 becomes a diffusion electrode.

Depending on the voltage level or the direction of the current, 11, ll
', 12 determines which one becomes the drain electrode, but 1
Stray capacitance will be smaller if wiring is made such that 2 becomes the drain electrode. In this example, 12 is a drain electrode, and 11 and 11' are source electrodes having the same potential. Therefore, 2
Channels 1 and 22 are composed of two MISFETs.

Hereinafter, the two MISFETs on the reference current input side and the constant current output side that constitute the current mirror circuit are respectively referred to as active elements, and the MISFETs consisting of the channels 21 and 22 described above are referred to as active elements.
will be simply referred to as MISFET to distinguish between them.

The MISFET is used as an active element of a current mirror circuit. Although there is a phenomenon in which shadow regions occur in the MISFET, they occur on the same side with respect to channels 21 and 22. For example, in FIG. 1, if it occurs on the left side of the channel, 21 is on the drain electrode side, and 2
2 is on the source electrode side, and one active element is constituted by parallel connection of two types of MI 5FETs having different electrical characteristics due to anisotropy. Anisotropy is MIS
Since this is due to the asymmetry of the FET structure, all the anisotropy is covered by the two types of MISFETs, and since the two types are connected in parallel, the anisotropy of all active elements disappears. It turns out. Therefore, all active elements have the same electrical characteristics and exhibit a precise current mirror effect.

Furthermore, even if the pattern in Fig. 1 causes pattern shift in the left and right directions, the area of the drain region 12 and the areas 11 and 11'
Since the total area of the source region does not change, even if a pattern shift occurs, the effect on the electrical characteristics is extremely small.

[Effects of the Invention] As explained above, the above action makes it possible to eliminate the anisotropy caused by the ion implantation angle and pattern deviation in the characteristics of the elements constituting the current mirror circuit.
A highly accurate current mirror effect can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a pattern of a MISFET showing an embodiment of the present invention. FIGS. 2(a) and 2(b) are a pattern diagram according to the prior art and a sectional view taken along line AA' of a MISFET according to the pattern. 1... Rectangle indicating ion implantation region 2... Pattern for forming gate electrode 11 ・ 11 ′ l 2 ・ 12゛ 21 ゛ 31 ・ 41 ・ Source region ・ Source region / drain region at the same potential as 11・Drain region ・Channel region Gate electrode ・Channel fIlI region ・Gate oxide film ・Shadow region Above Applicant Seiko Epson Co., Ltd. Representative Patent Attorney 1 Masaori Uma (@1 person) Figure 2 (
a) Figure 2(b)

Claims (1)

[Claims] Consisting of first and second MISFETs having the same electrical characteristics, the first MISFET has its source electrode connected to a common power supply terminal, its gate electrode and drain electrode connected to a reference current input terminal, and the second MISFET In each MISFET of the current mirror circuit, the source electrode is connected to the common power supply terminal, the gate electrode is connected to the reference current input terminal, and the drain electrode is connected to the constant current output terminal, a drain region is arranged in the center, A current mirror circuit characterized in that gate electrodes having the same potential are provided sandwiching the drain region, and source regions having the same potential are provided sandwiching this structure.