JPH0212110A - Production of optical integrated circuit - Google Patents

Abstract

PURPOSE:To allow cutting out of chips with high accuracy and excellent mass productivity and yield by forming V-grooves for cleavage to the prescribed positions of a wafer by anisotropic etching, imparting stresses over the entire part of the wafer to concentrate the stresses to the V-grooves and to progress the cleavage and simultaneously cutting out the many circuit chips. CONSTITUTION:The V-grooves 43 having 70.6 deg. vertical angle are formed to an Si single crystal substrate 41 as the etching rate varies with the (100) face and (111) face which are crystal bearings when the wafer which is the Si single crystal substrate 41 formed with mask patterns 42 is immersed for a prescribed period of time in an etching soln. such as KOH soln. of nearly a boiling point. The depth of the grooves 43 can be controlled as desired by the width of the mask patterns. The grooves 43 are respectively formed in the directions perpendicular and horizontal directions of the facet 45 of the wafer and thereafter, the stresses are concentrated along the grooves 43 to cleave the wafer, by which the light guide circuit chips 44 are obtd. The accuracy of the sizes of the optical integrated circuit chips to be cut out is improved in this way, by which the yield is improved and mass production is enabled.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an improvement in a method for forming a wafer, which is an optical integrated circuit forming substrate, into a plurality of optical waveguide circuit chips in the production of optical integrated circuits.

<Prior Art> FIGS. 4 and 5 show examples of conventional techniques for optical integrated circuits. Fourth
The figure shows an integrated optical demultiplexing circuit for a wavelength division multiplexing transmission system by Takami et al. (National Conference of the Institute of Electronics and Communication Engineers, 1985, NCLl 050). A collimation and condensing lens 13 and a transmission type diffraction grating 12 are formed, and input/output fibers 14 and 15 are provided at both ends 16 of the substrate. Figure 2 shows T, 5UHARA at, al (Appl
, Phys, Let t,, VOL.

40, No, 2. P, 120. (1982)
) is an example in which a grating demultiplexer 22 and a photodiode 23 are integrated into a thin optical waveguide film 24 on a silicon substrate 21. In addition, in FIG. 5, 25 is the input fiber, 2
6 is the end face of the waveguide film. These circuits are so-called hybrid optical integrated circuits in which the basic element is an optical waveguide circuit formed on a silicon substrate, which is combined with light-receiving and emitting elements, fibers, and electronic circuits. In such an optical integrated circuit, a plurality of circuits are formed on a wafer by photolithography technology, and each circuit is then cut out and used as a chip, similar to the LSI manufacturing technology. When cutting into chips, LSI requires only cutting with a peripheral blade, but in optical integrated circuits, in order to obtain good connection characteristics between the waveguide circuit and the fiber, as shown in Fig. 4,
The smoothness of the waveguide circuit end faces 16 and 26 in FIG. 5 must be made to be less than a fraction of the wavelength used.

For this reason, in the conventional manufacturing of this type of optical integrated circuit, when cutting chips, a method is adopted in which the end face of the waveguide circuit is optically polished after cutting, or a method is created in which creases are formed along the orientation of the crystal substrate. .

<Problems to be Solved by the Invention> However, the former method of optically polishing the end face of the waveguide after cutting requires complicated cutting and polishing steps, requires a long time, and does not cause damage to the end face of the thin film waveguide. It was difficult to obtain a better yield than this. On the other hand, in the latter method of cutting the seeds along the orientation of the crystal substrate, the thin film waveguide is cut simultaneously with the crystal seeds, so that a good waveguide end face can be easily obtained.

Here, an example of the process of cutting out chips by the conventional inter-fold method is shown in FIG. 6. First, as shown in FIG. Alternatively, insert the inter-fold pot 34 into a part (thick line part), and then use a blade to insert the inter-fold pot 34 into the crease pot 34 (b).
), apply stress F and unfold into a strip. next,
As shown in the same figure (c), a side pot 3
4, apply stress in the same way, and finally chip 32
get. In this type of crease method, it is difficult to increase mass productivity and yield due to the number of times of making scratches and applying stress (and the working conditions are complicated). It was also difficult to apply it accurately.

The purpose of the present invention is to solve the above-mentioned drawbacks of the prior art, and to solve the above-mentioned drawbacks of the prior art, in order to cut chips having optically good waveguide circuit end faces from a wafer in the production of optical integrated circuits. The purpose of this invention is to provide a chip cutting method that is excellent in mass production and yield.

Means for Solving the Problems> The present invention provides a method for cutting out chips having optically good waveguide circuit end faces from a wafer on which optical integrated circuits are formed, on the wafer surface opposite to the waveguide circuit forming side. Horizontal and vertical V-shaped grooves are formed at a predetermined pitch with respect to the facets that determine the crystal orientation of the wafer by anisotropic etching, and then stress is applied to the entire groove to form a ■-shaped groove. In this method, stress is concentrated on the wafer, the wafer is folded all at once, and a large number of chips are cut out at the same time. Compared to conventional techniques, V-shaped grooves, which are lateral scars, can be formed with high precision by photolithography, resulting in improved chip cutting work efficiency and yield.

Embodiment FIGS. 1, 2, and 3 show an embodiment of the optical integrated circuit manufacturing method according to the present invention. For single-crystal substrates such as Si, it is possible to perform anisotropic etching in which the etch rate varies depending on the crystal orientation by using a specific etching solution, and various types of substrate processing utilizing this have been reported.

Figure 1 shows a V-groove formation method by anisotropic etching of a Si single crystal substrate.
When a wafer, which is a Si single crystal substrate 41 on which is formed, is immersed in an etching solution such as a KO solution near the boiling point for a predetermined period of time, the Si single crystal is The substrate 41 has an apex angle of 70.6°
A V-shaped groove 43 is formed. The depth of the V-shaped groove 43 can be arbitrarily controlled by the width of the mask pattern. As shown in FIG. 4(b), V-shaped grooves 43 are formed vertically and horizontally with respect to the facets 45 on the sea urchin, and then these V-shaped grooves 4 are formed.
The wafer is seeded by concentrating stress along the lines 3 to obtain an optical waveguide circuit chip 44. Figure 2 shows the V-groove formation process on an optical waveguide circuit forming wafer. In the figure, 51 is an S1 single crystal substrate, 52 is a 5i02 layer formed by thermal oxidation, etc., and 53 is a waveguide in which light waves are confined. The circuit core layer 54 is a cladding layer having a lower refractive index than the core layer, and 55 and 55' are metal layers for etching masks, which are made of different materials so as not to be corroded by the same etching solution.

The waveguide circuit has a structure in which a core layer 53 is surrounded by a cladding layer 54, and the above-mentioned thermally oxidized Si is applied to the substrate side cladding layer 54.
When an O2 film is used, a 5iO7 film formed by sputtering or the like may be used as the upper cladding layer. An organic resist film 56 is formed on the back side of the waveguide circuit surface of the substrate on which the waveguide circuit core layer 53, cladding layer 54, and metal layer 55 are formed as shown in the figure (a), as shown in the figure (b). Then, a predetermined V-shaped groove pattern 58 is provided by photolithography (FIG. 3(c)).

After this, the metal film 55' and the 5i02 film 52 are removed in the same figure (
As shown in d), the V-shaped groove pattern 58 is removed by etching and immersed in a KOH solution close to the boiling point for a predetermined period of time to obtain the V-shaped groove 57 shown in +8). V-shaped grooves 57 in vertical and horizontal directions, respectively
In the process shown in FIG. 3, stress is concentrated and applied to the V-shaped groove 57 of the evaporator 61, which is then separated, and an optical waveguide circuit chip is cut out. That is, as shown in FIG. 3, a wafer 61 with a V-shaped groove 62 formed therein is sandwiched between two transparent adhesive films 64, and the periphery of this film 64 is hermetically fixed to an opening 66 of a box 65. do. Thereafter, air is introduced through the air inlet 67 of the box to increase the pressure inside the box 65 and apply stress to the center of the wafer 61, thereby concentrating the stress on the V-shaped groove 62 and performing seed separation. Beam 69 in Fig. 3 is the open plane. after that,
Remove the film 64 from the opening 66 of the box 65 and confirm that the chip 63 is cut and 9 removed. In this state, chip 63
are held by an adhesive film 64 and aligned in the same manner as a wafer, making subsequent chip handling easier. In this way, in the present invention, V-shaped grooves for deburring are formed with high precision by anisotropic etching of a Si single crystal substrate, and stress is applied over the entire surface of the wafer to form creases all at once, compared to conventional techniques. This method not only improves the workability and yield of cutting out optical integrated circuit chips, but also eliminates the need to replace blades and diamond needles.

<Effects of the Invention> As explained above, the present invention provides for forming V-shaped grooves between folds at predetermined positions on the wafer when cutting optical AM circuit chips from a wafer on which optical integrated circuits are formed. This method is formed by anisotropic etching of a crystal substrate, and by applying stress to the entire surface of the wafer, the stress is concentrated in the V-shaped groove to advance the seeds, and a large number of circuit chips are cut out at the same time, resulting in the following effects: play.

(2) The depth of the V-groove can be arbitrarily controlled by setting the dimensions of the etching mask pattern, and it is possible to flexibly set the interseating conditions in response to changes in the thickness and size of the substrate to be interseated.

■ It becomes possible to increase the precision of the dimensions of the optical integrated circuit chips to be cut out.

- Since V-grooves between seeds are formed by etching, there is no wear on blades or needles (and the yield of cutting work can be improved).

■ Mass production of optical integrated circuit chips becomes possible because all types are processed at once.

[Brief explanation of the drawing]

1 to 3 relate to one embodiment of the present invention, and FIG. 1 (
al is a cross-sectional view of the V-shaped groove formed in the wafer, and FIG.
1 is a perspective view of a wafer in which V-shaped grooves are formed perpendicularly and parallel to the facets, FIGS. (
b) is a perspective view and a cross-sectional view of a wafer to which stress is applied, FIGS. 4 and 5 are explanatory diagrams of a conventional optical integrated circuit, respectively, and FIGS. 1 is a process diagram showing a conventional cutting technique. In the drawing, 11 is a thin optical waveguide film, 12 is a transmission diffraction grating, 13 is a lens, 14 is an input fiber, 15 is an output fiber, and 16 is an end face of the waveguide film. , 21 is a silicon substrate, 22 is a grating demultiplexer, 23 is a photodiode, 24 is a thin film leading wave film, 25 is an input fiber, 26 is a waveguide film end face, 31 is a Si single crystal substrate wafer, 32 is an optical integrated circuit Chip, 33 is a blade or diamond needle, 34 is an instant pot, 35 is a facet, 41. 51, 61 is a Si single crystal substrate (wafer), 42 is an etching mask, 43. 57, 62 is a ■-shaped groove, 44. 63 is an optical integrated circuit chip, 45 is a facet, 52 is a SiO□ film, 53 is a waveguide circuit core layer, 54 is a waveguide circuit cladding layer, 55.55' is a metal layer, 56 is an organic resist layer, 64 is an adhesive 65 is an airtight box, 66 is an upper frame portion of the box, 67 is an air inlet, 68 is an air outlet, and 69 is an inter-fold surface. Fig. 1(a)

Claims (2)

[Claims] (1) In manufacturing optical integrated circuits whose basic elements are optical waveguide circuits formed on silicon substrates, a wafer, which is a crystalline substrate on which multiple optical integrated circuits are formed, is cut into chips for individual optical integrated circuits. At this time, a vertical V-shaped groove and a horizontal V-shaped groove are formed on the wafer at a predetermined pitch with respect to the facets by anisotropic etching, and the V-shaped groove is formed by applying stress to the entire wafer. A method for manufacturing an optical integrated circuit, comprising cleaving the wafer at once along the V-shaped groove by concentrating stress on the wafer, and dividing the wafer into a plurality of chips. (2) In claim 1, the wafer in which the V-shaped groove is formed is sandwiched between two adhesive films, the periphery of the adhesive film is fixed, and the center of the wafer is sandwiched between two adhesive films. A method for manufacturing an optical integrated circuit, characterized in that stress is concentrated in the V-shaped groove by expanding the part due to a pressure difference.