JPH07162098A - Method for automatically positioning optical device array to optical fiber - Google Patents

Method for automatically positioning optical device array to optical fiber

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Publication number
JPH07162098A
JPH07162098A JP5303166A JP30316693A JPH07162098A JP H07162098 A JPH07162098 A JP H07162098A JP 5303166 A JP5303166 A JP 5303166A JP 30316693 A JP30316693 A JP 30316693A JP H07162098 A JPH07162098 A JP H07162098A
Authority
JP
Japan
Prior art keywords
substrate
array
optical fiber
degrees
optical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5303166A
Other languages
Japanese (ja)
Inventor
Masami Sasaki
誠美 佐々木
Kazunori Miura
和則 三浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5303166A priority Critical patent/JPH07162098A/en
Publication of JPH07162098A publication Critical patent/JPH07162098A/en
Withdrawn legal-status Critical Current

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  • Semiconductor Lasers (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To position an optical device array to optical fibers with no adjustment by engaging two Si substrates processed by special anisotropic etching and by patterning V grooves to attach optical fibers in place and pads and lead terminals to attach an optical device array. CONSTITUTION:An engagement recess 25, V grooves to fix optical fibers at right angles from this recess 25, lead terminals 27, and solder pads 28 are formed on a (100) Si substrate 22. The side walls of the recess 25 and the V grooves 26 cross the substrate 22 face at 54.74 deg.. On the other hand, a recess 29 provided in a (110) Si substrate 23 has a (111) face which crosses the substrate 23 face at 35.26 deg. and a (111) face which crosses it at 90 deg.. A microlens array 30 for LD array use is formed at the middle position of the recess 29 of the Si substrate 23. After both substrates are diced into chips, both the substrates 22,23 are engaged, and an LD array 32 is attached to the position of a solder pad 28, and optical fibers 33 are inserted into V grooves 26 to fix.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は光素子アレイと光ファイ
バとの位置決めを無調整で行なえる光素子アレイと光フ
ァイバとの自動位置決め方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for automatically positioning an optical element array and an optical fiber which can position the optical element array and the optical fiber without adjustment.

【0002】近年の情報処理分野においては演算処理の
高速化と大容量化が必要であり、これを実現するために
は光並列伝送が必要で、レーザダイオードアレイ(LD
アレイ),フォトダイオードアレイ(PDアレイ)と光
ファイバ,光導波路などとの高精度の位置合わせが必要
である。
In the field of information processing in recent years, it has been necessary to speed up and increase the capacity of arithmetic processing. To realize this, optical parallel transmission is necessary, and a laser diode array (LD) is required.
Arrays, photodiode arrays (PD arrays) and optical fibers, optical waveguides, etc. must be aligned with high precision.

【0003】[0003]

【従来の技術】図8はLDアレイ1と複数の光ファイバ
2よりなる光ファイバアレイ3との従来の位置合わせ方
法を示すもので、LDアレイ1と光ファイバアレイ3は
それぞれ、はんだ付け可能なブロック4,5の上に接着
固定してあり、各ブロック4,5には把手6,7が二個
づつ設けてあり、はんだ層8を介して基板9の上に置
き、ヒータ10に通電して基板9をはんだの融点以上にま
で加熱することによりスライド可能に形成されている。
2. Description of the Related Art FIG. 8 shows a conventional method for aligning an LD array 1 and an optical fiber array 3 composed of a plurality of optical fibers 2. The LD array 1 and the optical fiber array 3 can be soldered to each other. The blocks 4 and 5 are adhesively fixed, and each block 4 and 5 is provided with two handles 6 and 7, and is placed on the substrate 9 via the solder layer 8 to energize the heater 10. The substrate 9 is slidably formed by heating the substrate 9 to a temperature above the melting point of the solder.

【0004】こゝで、光ファイバアレイ3はシリコン
(Si) 基板を選択エッチングするか、金属を切削加工す
るか、或いはセラミックスからなり、光ファイバ2を固
定する複数の溝を備え、この溝に複数の光ファイバ2
(この場合は8本)を挿入し、上より同形の蓋を用いて
接着固定してあるが、LDアレイ1を構成する8個のL
Dと光ファイバアレイ3を構成する8本の光ファイバ2
とを正確に位置合わせするのは容易ではなく、基板9を
加熱してはんだ層8を溶融し、ブロック4,5をスライ
ド可能とした状態で実体顕微鏡で観察しながら把手6,
7を用いて微調整して光結合を確認しながら位置合わせ
し、基板9の冷却を行なって固定する方法が採られてい
た。このように、位置合わせには繊細で煩雑な工程を必
要とすることから、低価格化することは困難であった。
Here, the optical fiber array 3 is provided with a plurality of grooves for fixing the optical fiber 2, which are formed by selectively etching a silicon (Si) substrate, cutting a metal, or made of ceramics. Multiple optical fibers 2
(8 pieces in this case) are inserted and fixed by adhesion using a lid of the same shape from above.
Eight optical fibers 2 forming the optical fiber array 3 with D
It is not easy to accurately position and, because the substrate 9 is heated to melt the solder layer 8 and the blocks 4 and 5 can be slid while observing with a stereoscopic microscope.
A method has been adopted in which the substrate 9 is finely adjusted and aligned while confirming optical coupling, and the substrate 9 is cooled and fixed. As described above, since the alignment requires a delicate and complicated process, it is difficult to reduce the cost.

【0005】[0005]

【発明が解決しようとする課題】光素子アレイと光ファ
イバアレイとの位置決めに当たって、従来は各素子の光
結合を確認しながら位置を調整して固定を行なっている
ことから量産には適せず、低価格化することは困難であ
る。そこで、かゝる光軸調整を必要としない位置決め法
を実用化することが課題である。
In the positioning of the optical element array and the optical fiber array, conventionally, the position is adjusted and fixed while confirming the optical coupling of each element, so that it is not suitable for mass production. , It is difficult to reduce the price. Therefore, it is an issue to put into practical use a positioning method that does not require such optical axis adjustment.

【0006】[0006]

【課題を解決するための手段】上記の課題は(100)
を基板面とする第1のシリコン基板と、(110)を基
板面とする第2のシリコン基板の上に形成したシリコン
酸化膜をマスクとして各シリコン基板に異方性エッチン
グを施して第1のシリコン基板には基板面と54.74 度で
交差する(111)面を側壁にもつ雌型または雄型を、
第2のシリコン基板には基板面と35.26 度で交差する
(111)面と90度で交差する(111)面を側壁にも
つ雄型または雌型を作り、また、この基板上に光素子ア
レイを装着するパッドとリード端子をパターン形成する
と共に光ファイバを固定する複数のV溝を設け、パッド
に光素子アレイを装着した後、第1のシリコン基板と第
2のシリコン基板に設けたそれぞれの型の側壁を衝合し
て垂直に嵌合させた後、光ファイバをV溝に装着するこ
とを特徴として光素子アレイと光ファイバとの自動位置
決め方法を構成することにより解決することができる。
[Means for Solving the Problems] [100]
Is used as a mask, and the silicon oxide film formed on the second silicon substrate having (110) as the substrate surface is used as a mask to anisotropically etch each silicon substrate to form the first silicon substrate. For the silicon substrate, a female type or a male type having a (111) surface as a side wall that intersects the substrate surface at 54.74 degrees,
On the second silicon substrate, make a male or female mold having a (111) plane that intersects the substrate plane at 35.26 degrees at 90 degrees and a (111) plane that intersects at 90 degrees on the side wall, and the optical element array on this substrate. A plurality of V-grooves for patterning a pad and lead terminals for mounting the optical fiber and for fixing an optical fiber, mounting an optical element array on the pad, and then mounting the optical element array on the first silicon substrate and the second silicon substrate respectively. This can be solved by configuring an automatic positioning method for the optical element array and the optical fiber, which is characterized by mounting the optical fiber in the V groove after the side walls of the mold are abutted and vertically fitted.

【0007】[0007]

【作用】本発明は写真蝕刻技術(フォトリソグラフィ)
とSi単結晶基板に特有な異方性エッチング技術とを用い
て二つのSi基板を加工し、この基板を噛み合わせると共
に、写真蝕刻技術により決められた位置に光ファイバを
装着するV溝や光素子アレイ装着用のパッドやリード端
子をパターン形成することにより光軸の調整を不要とす
るものである。
The function of the present invention is photolithography (photolithography).
And two Si substrates are processed by using the anisotropic etching technology peculiar to the Si single crystal substrate, and the two substrates are engaged with each other, and the V-groove and the optical fiber for mounting the optical fiber at the position determined by the photo-etching technology are processed. By patterning the pad and the lead terminal for mounting the element array, the adjustment of the optical axis becomes unnecessary.

【0008】すなわち、現在、フォトレジストと紫外線
やエキシマレーザ露光を使用する写真蝕刻技術はμm の
精度でパターン形成が可能であり、また、Siは大気中加
熱により耐薬品性の優れた二酸化シリコン( SiO2)膜を
基板面に形成することができ、この膜は化学エッチング
処理に際してマスクとして使用することができる。
That is, at present, a photo-etching technique using a photoresist and exposure to ultraviolet rays or excimer laser can form a pattern with an accuracy of μm, and Si is a silicon dioxide (Excellent chemical resistance by heating in the atmosphere). A SiO 2 ) film can be formed on the surface of the substrate and this film can be used as a mask during the chemical etching process.

【0009】次に、Si単結晶基板に特有な異方性エッチ
ングは、Si結晶の結晶方位によりエッチング速度が異な
る現象を利用するもので、エッチング液を選択すること
によりエッチング速度の最も遅い結晶面すなわち(11
1)面を表面に出すことができ、このエッチング速度の
結晶方位依存性を利用することにより各種の形状に基板
加工を施すことができる。
Next, the anisotropic etching peculiar to the Si single crystal substrate utilizes the phenomenon that the etching rate varies depending on the crystal orientation of the Si crystal. By selecting an etching solution, the crystal plane with the slowest etching rate can be used. That is (11
1) The surface can be exposed on the surface, and the substrate can be processed into various shapes by utilizing the crystal orientation dependence of the etching rate.

【0010】すなわち、Siのエッチング液としては等方
性エッチング液と異方性エッチング液とがあり、前者の
代表液は弗酸(HF)と硝酸(HNO3)と酢酸(CH3COOH) の混合
液であって強酸を主体として形成してあり、総ての結晶
方位に対して均等な速度をもってエッチングされる。一
方、後者は水酸化カリウム(KOH),水酸化ナトリウム(N
aOH)の各水溶液やエチレンジアミンとパイロカテコール
の混合液のような前者に較べて弱いエッチング液で、こ
の溶液を使用すると結晶方位によりエッチング速度を変
えることができ、(110)面が最も速く、(100)
面では遅く、(111)面では殆どエッチングされなく
することができ、この異方性エッチング現象を利用して
Si基板を精度よく微細に加工することができる。
That is, there are isotropic etching liquids and anisotropic etching liquids as Si etching liquids. The former representative liquids are hydrofluoric acid (HF), nitric acid (HNO 3 ) and acetic acid (CH 3 COOH). It is a mixed solution and is formed mainly of strong acid, and is etched at a uniform rate with respect to all crystal orientations. On the other hand, the latter is potassium hydroxide (KOH) and sodium hydroxide (N
aOH) is a weaker etching solution than the former such as each aqueous solution or a mixed solution of ethylenediamine and pyrocatechol. When this solution is used, the etching rate can be changed depending on the crystal orientation, and the (110) plane is the fastest, 100)
The surface is slow and the (111) surface can be hardly etched.
The Si substrate can be processed precisely and finely.

【0011】そして、この後者の技術を利用して現在、
圧力センサや加速度センサなどのセンサやノズル, コネ
クタなどのマイクロメカニカル・デバイス( 微細機械素
子)が開発されている。本発明はこの技術を利用して光
アレイ素子と光ファイバアレイとの位置決めを光軸調整
を必要とせずに行なうものである。
Now, utilizing the latter technique,
Sensors such as pressure sensors and acceleration sensors, and micromechanical devices (fine mechanical elements) such as nozzles and connectors have been developed. The present invention utilizes this technique to position the optical array element and the optical fiber array without adjusting the optical axis.

【0012】図1〜図4は本発明に係る原理図であっ
て、何れも結晶方位が(100)面と(110)面の二
つの基板を用い、写真蝕刻技術と異方性エッチング技術
とを用いて基板加工を行なって各種の凹部や溝を形成
し、この凹部や溝を利用して二つの基板を垂直に噛み合
わせることにより、極めて精度の高い位置決めを行なう
ものである。
1 to 4 are principle diagrams according to the present invention. In each case, two substrates having crystal orientations of (100) plane and (110) plane are used, and a photo-etching technique and an anisotropic etching technique are used. The substrate is processed by using to form various recesses and grooves, and the recesses and grooves are used to vertically engage the two substrates to perform positioning with extremely high accuracy.

【0013】以下、各図について、その方法を説明す
る。図1において、同図(A)は(100)を表面とす
るSi基板12[ 以下略して(100)Si基板〕、また、同
図(B)は(110)を表面とするSi基板13〔以下略し
て(110)Si基板〕である。まず、同図(A)に示す
(100)Si基板12の上にレジストを被覆し、中央部に
T字型の凸部が残るようにSiO2膜を窓開けして後、所定
の深さまで異方性エッチングを行なうと、(100)を
底面14とし、側壁15を(111)面とする凹部か形成さ
れるが、この場合、側壁15は6面(図でA,B,C,
D,E,F)よりなり底面(14)とは何れも54.74 度で交
差しているが、結晶面の方位はA,B,D,Fの4種類
からなっている。(A,C,Eは同一) 一方、(110)Si基板13の全面にレジストを被覆し、
端部に同図(A)のT字型の凸部に等しい幅をもつ楔状
にレジストを窓開けし、また、裏面の端部のレジストも
窓開けし、両者のSiO2膜を除いた後、端部が所定の深さ
に達するまで異方性エッチングを行なうと、同図(B)
で示すよう(111)面を底面および側面とする凹部が
形成されるが、この場合、底面(GとJ)は(110)
基板面と35.26 度で交差しており、また、H面とI面は
(110)基板面と90度で交差している。
The method for each drawing will be described below. In FIG. 1, FIG. 1A shows a Si substrate 12 having a (100) surface [abbreviated as (100) Si substrate], and FIG. 1B shows a Si substrate 13 having a (110) surface. Hereinafter, (110) Si substrate]. First, a resist is coated on a (100) Si substrate 12 shown in FIG. 3A, a SiO 2 film is opened so that a T-shaped convex portion remains in the central portion, and then a predetermined depth is reached. When anisotropic etching is performed, a recess having (100) as the bottom surface 14 and the side wall 15 as the (111) surface is formed. In this case, the side wall 15 has six surfaces (A, B, C in the figure,
D, E, F) and intersects the bottom surface (14) at 54.74 degrees, but the orientations of the crystal planes are A, B, D, and F. (A, C, E are the same) On the other hand, the entire surface of the (110) Si substrate 13 is coated with a resist,
After forming a wedge-shaped resist window having a width equal to that of the T-shaped convex portion of FIG. 9A at the end portion, and also opening the resist at the end portion on the back surface to remove both SiO 2 films. When anisotropic etching is performed until the end reaches a predetermined depth, the same figure (B)
As shown in, a concave portion having a (111) plane as a bottom surface and a side surface is formed. In this case, the bottom surface (G and J) is (110).
It intersects the substrate plane at 35.26 degrees, and the H and I planes intersect the (110) substrate plane at 90 degrees.

【0014】次に、かゝる二つの基板(12,13)を接合す
ると、同図(C)のように両基板は精度良く垂直に噛み
合わせることができ、この両基板の上に光デバイスを形
成しておけば両者の位置合わせは不要となる。なお、同
図(D)は(100)Si基板12と(110)Si基板13と
の接合状態を示す正面図である。
Next, when the two substrates (12, 13) are joined together, the two substrates can be accurately vertically engaged with each other as shown in FIG. 11C, and the optical device is placed on both substrates. If it is formed, the alignment of the two becomes unnecessary. Note that FIG. 3D is a front view showing a bonded state of the (100) Si substrate 12 and the (110) Si substrate 13.

【0015】図2は別の組合せ方法を示すもので、同様
な方法で(100)Si基板16と(110)Si基板17に異
方性エッチングを施した結果、現れる結晶面は何れも
(111)面であるが、同図(A)において現れるK,
L,M,N,O,Pの6面は何れも(100)面よりな
る底面と54.74 度で交差しているが、結晶面の方位は
K,L,N,Pの4種類からなっている。(K,M,O
は同一) また、同図(B)の(110)Si基板17に現れるエッチ
ング面のうち、Q,T,Uの3面は(110)基板面と
35.26 度で交差し、結晶面方位はQとUの2種類であ
り、また、R面とS面は(110)基板面と90度で交差
し、結晶方位はそれぞれ異なっている。そして、(10
0)Si基板16に(110)Si基板17を接合すると同図
(C)のように垂直に噛み合わせることができ、この両
基板の上に光デバイスを形成しておけば両者の位置合わ
せは不要となる。
FIG. 2 shows another combination method. As a result of anisotropically etching the (100) Si substrate 16 and the (110) Si substrate 17 by the same method, both of the crystal planes (111) appear. ) Surface, but K, which appears in FIG.
The 6 planes of L, M, N, O, and P all intersect with the bottom plane consisting of (100) planes at 54.74 degrees, but the orientation of the crystal planes consists of K, L, N, and P types. There is. (K, M, O
Are the same) In addition, among the etching surfaces that appear on the (110) Si substrate 17 in FIG. 1B, three surfaces Q, T, and U are the (110) substrate surface.
They intersect at 35.26 degrees, and there are two types of crystal plane orientations, Q and U, and the R and S planes intersect with the (110) substrate plane at 90 degrees, and the crystal orientations are different. And (10
When (0) Si substrate 16 and (110) Si substrate 17 are joined together, they can be vertically engaged as shown in FIG. 2C, and if optical devices are formed on both substrates, they will be aligned with each other. It becomes unnecessary.

【0016】また、図3は別の組合せ方法を示すもの
で、同様な方法で(100)Si基板18と(110)Si基
板19に異方性エッチングを施すもので、同図(A)にお
いて現れるa,b,c,d,e,fの6面は(100)
面よりなる底面と54.74 度で交差しているが、結晶面の
方位はa,b,d,fの4種類からなっている。(a,
c,eは同一) また、同図(B)の(110)Si基板19に現れるエッチ
ング面のうち、g ,j,k の3面は(110)基板面と
35.26 度で交差し、結晶面方位はgとkの2種類であ
り、また、h面とi面は(110)基板面と90度で交差
し、結晶方位はそれぞれ異なっている。そして、(10
0)Si基板18に(110)Si基板19を接合すると同図
(C)のように垂直に噛み合わせることができ、この両
基板の上に光デバイスを形成しておけば両者の位置合わ
せは不要となる。
FIG. 3 shows another combination method, in which the (100) Si substrate 18 and the (110) Si substrate 19 are anisotropically etched by the same method. In FIG. 6 faces of a, b, c, d, e, f that appear are (100)
It intersects with the bottom consisting of planes at 54.74 degrees, but the orientation of the crystal plane consists of four types: a, b, d, and f. (A,
(c and e are the same) In addition, among the etching surfaces appearing on the (110) Si substrate 19 in FIG. 2B, three surfaces g, j, and k are the (110) substrate surface.
They intersect at 35.26 degrees, and there are two types of crystal plane orientations, g and k, and the h plane and the i plane intersect with the (110) substrate plane at 90 degrees, and the crystal orientations are different. And (10
(0) When the (110) Si substrate 19 is joined to the Si substrate 18, they can be vertically engaged with each other as shown in (C) of the figure. If optical devices are formed on both substrates, they can be aligned with each other. It becomes unnecessary.

【0017】また、図4は別の組合せ方法を示すもの
で、同様な方法で(100)Si基板20と(110)Si基
板21に異方性エッチングを施すもので、(100)Si基
板20を表裏の両面から異方性エッチングを行なうことに
より同図(A)現れるl,m,n,o,p,q,r,
s,t,uの10面は(100)面よりなる基板面と54.7
4度で交差しているが、結晶面の方位はl ,m ,n ,o
で代表される4種類からなっている。
FIG. 4 shows another combination method, in which the (100) Si substrate 20 and the (110) Si substrate 21 are anisotropically etched by the same method. Is anisotropically etched from both front and back sides, and l, m, n, o, p, q, r, which appear in FIG.
10 planes of s, t, and u are the substrate plane consisting of (100) plane and 54.7
Although they intersect at 4 degrees, the crystal plane orientations are l, m, n, and o.
It consists of four types.

【0018】また、同図(B)の(110)Si基板21に
現れるエッチング面のうち、vとxは(110)基板面
と35.26 度で交差し、また、w,y,z,αの各面は
(110)基板面と90度で交差し、結晶方位はv,x,
w,zで代表される4種類からなっている。(wとα,
zとyは同一)そして、(100)Si基板20に(11
0)Si基板21を接合すると同図(C)のように垂直に噛
み合わせることができ、この両基板の上に光デバイスを
形成しておけば両者の位置合わせは不要となる。
In the etching surface appearing on the (110) Si substrate 21 in FIG. 2B, v and x intersect the (110) substrate surface at 35.26 degrees, and w, y, z, and α. Each plane intersects the (110) substrate plane at 90 degrees, and the crystal orientation is v, x,
It consists of four types represented by w and z. (W and α,
(z and y are the same) and (11) on the (100) Si substrate 20.
0) When the Si substrates 21 are joined, they can be vertically engaged with each other as shown in FIG. 7C, and if optical devices are formed on both substrates, the alignment of the two becomes unnecessary.

【0019】本発明はこのように(100)Si基板と
(110)Si基板に異方性エッチングを行なって加工
し、両者を噛み合わせる方法をとることにより光軸調整
を不要とする光デバイスを形成するものである。
The present invention provides an optical device which does not require optical axis adjustment by adopting a method of anisotropically etching and processing a (100) Si substrate and a (110) Si substrate, and engaging them with each other. To form.

【0020】[0020]

【実施例】実施例1:(LDアレイと光ファイバとの接
合,図5対応) 厚さが1 mm の(100)Si基板22と(110)Si基板
23を大気中で1000℃に加熱し、この基板の表面に厚さが
約1μm のSiO2皮膜24を形成した後、ポジ型レジスト
(品名OFPR, 東京応化製) と紫外線の選択露光を行なう
写真蝕刻技術を用いて異方性エッチングを行なう領域の
レジストを窓開けし、この基板をリアクティブ・イオン
・エッチング(RIE)装置にセットし、四弗化炭素(C
F4) と水素(H2)の混合ガスをエッチャントとしてエッチ
ングを行い、異方性エッチングを行なう領域のSiO2膜24
を除き、その部分のSi基板を露出させた。なお、この
際、(110)Si基板24裏面の対称位置のSiO2膜も除い
ておく。(以上図4のAとa) 次に、異方性エッチングを行なうエッチャントとしては
水酸化カリウム(KOH)とイソプロピルアルコール( 略称
IPA)と水(H2O)よりなる液を使用し、この液に(1
00)Si基板22と(110)Si基板23を浸漬することに
より、(100)Si基板22の上には同図(B)に示すよ
うに噛み合せ用の凹部25を少なくとも3個とこの凹部25
より直角に光ファイバ固定用のV溝26を4個づつ形成し
た。こゝで、これらの凹部25とV溝26の側壁は何れも
(100)基板面と54.74 度で交差している。
EXAMPLE Example 1 (bonding of LD array and optical fiber, corresponding to FIG. 5) (100) Si substrate 22 and (110) Si substrate having a thickness of 1 mm
Photograph of 23 is heated to 1000 ° C in the atmosphere, a SiO 2 film 24 with a thickness of about 1 μm is formed on the surface of this substrate, and then a positive resist (product name OFPR, made by Tokyo Ohka) and selective exposure of ultraviolet rays are performed. A window is opened in the resist in the region where anisotropic etching is to be performed using the etching technique, and this substrate is set in a reactive ion etching (RIE) device, and carbon tetrafluoride (C
Etching is performed with a mixed gas of F 4 ) and hydrogen (H 2 ) as an etchant, and the SiO 2 film 24 in the region where anisotropic etching is performed is performed.
Except for that, the Si substrate in that portion was exposed. At this time, the SiO 2 film at the symmetrical position on the back surface of the (110) Si substrate 24 is also removed. (A and a in FIG. 4 above) Next, as an etchant for anisotropic etching, a solution of potassium hydroxide (KOH), isopropyl alcohol (abbreviated as IPA) and water (H 2 O) is used. To (1
By immersing the (00) Si substrate 22 and the (110) Si substrate 23, at least three recesses 25 for engagement are formed on the (100) Si substrate 22 as shown in FIG.
Four V-grooves 26 for fixing the optical fiber were formed at a right angle. Here, both the recess 25 and the side wall of the V groove 26 intersect the (100) substrate surface at 54.74 degrees.

【0021】一方、(110)Si基板23に設けた凹部29
には(110)基板面と35.26 度で交差する(111)
面と90度で交差する(111)面とから構成されてい
る。(以上同図Bとb) 次に、(100)Si基板22の中央の凹部25に隣接してリ
ード端子27を4個とはんだパッド28を4個づつ形成し
た。こゝで、リード端子27は(100)Si基板22の上に
電子ビーム蒸着法により金(Au)の薄膜を形成した後に写
真蝕刻してパターン形成し、また、はんだパッド28はレ
ジストを被覆した後、この位置の窓開けを行い、抵抗加
熱蒸着法により金・錫(Au-Sn) はんだ膜を形成した後、
リフトオフすることにより形成した。
On the other hand, the recess 29 provided in the (110) Si substrate 23.
Intersects the (110) substrate surface at 35.26 degrees (111)
It is composed of a (111) plane that intersects the plane at 90 degrees. Next, four lead terminals 27 and four solder pads 28 were formed adjacent to the central recess 25 of the (100) Si substrate 22. Here, the lead terminal 27 is patterned by photolithography after forming a thin film of gold (Au) on the (100) Si substrate 22 by the electron beam evaporation method, and the solder pad 28 is coated with a resist. After that, a window is opened at this position, and after forming a gold / tin (Au-Sn) solder film by the resistance heating vapor deposition method,
It was formed by lift-off.

【0022】また、(110)Si基板23については二つ
の凹部29の中間位置には以後に装着するLDアレイ用の
マイクロレンズアレイ30を形成したが、この形成方法は
4個のレンズ形成位置と凹部29にレジストを残し、熱処
理を行なってレンズ形成位置のレジストを凸状に凝縮さ
せた状態で(110)Si基板23をイオンビームエッチン
グすることにより形成した。(以上同図Cとc) 次に、両基板を破線31の位置で切断して同図Dとdに示
すように素子化した後、両基板22,23 を噛み合わせ、は
んだパッド28の位置に正しくLDアレイ32を装着し、ま
た、光ファイバ33をV溝26に挿入し固定すれば、LDア
レイ32と複数(この場合4個)の光ファイバ33とはマイ
クロレンズアレイ30を介して位置合わせされる。 実施例2:(LDアレイと光ファイバとの接合,図6対
応) 実施例1と同様に(100)Si基板35と(110)Si基
板36に異方性エッチングを行い、図6の(A)と(B)
に示すように加工し、(100)Si基板35には噛み合わ
せ用の凹部37と4個のV溝38を形成し、また、(11
0)Si基板36の表面には実施例1と同様にリード端子39
とはんだパッド40を4個づつ形成し、所定の大きさに切
断した。また、同図(B)に示す(110)Si基板36か
らなる単位素子では配線接続が困難なことから、同図
(C)に示すように引出し電極41がパターン形成れさて
いるセラミック製の補助部品42を設けた。
On the (110) Si substrate 23, a microlens array 30 for an LD array to be mounted later is formed at an intermediate position between the two recesses 29. This forming method has four lens forming positions. The (110) Si substrate 23 was formed by ion beam etching while leaving the resist in the concave portion 29 and performing heat treatment to condense the resist at the lens forming position into a convex shape. (The above C and c in the same figure) Next, after cutting both boards at the position of the broken line 31 to make them into elements as shown in D and d in the same figure, both boards 22 and 23 are meshed, and the position of solder pad 28 If the LD array 32 is correctly mounted on the optical fiber 33 and the optical fiber 33 is inserted into the V groove 26 and fixed, the LD array 32 and the plurality (four in this case) of optical fibers 33 are positioned via the microlens array 30. Be matched. Example 2 (Joining LD Array and Optical Fiber, Corresponding to FIG. 6) Similarly to Example 1, the (100) Si substrate 35 and the (110) Si substrate 36 were subjected to anisotropic etching, and as shown in FIG. ) And (B)
Processed as shown in (1), a (37) Si substrate 35 was formed with a recess 37 for engagement and four V grooves 38, and (11)
0) Lead terminals 39 are formed on the surface of the Si substrate 36 as in the first embodiment.
Four solder pads 40 and four solder pads were formed and cut into a predetermined size. Further, since wiring connection is difficult in the unit element composed of the (110) Si substrate 36 shown in FIG. 6B, the auxiliary electrode made of ceramics in which the extraction electrode 41 is patterned as shown in FIG. The part 42 is provided.

【0023】そして、まず、同図(B)に示す(11
0)Si基板36のはんだパッド40の位置にLDアレイ43を
装着した後、(100)Si基板35と噛み合わせて接合
し、(100)Si基板35のV溝38に光ファイバ44を挿入
し、また、(110)Si基板36のリード端子39と補助部
品42の引出し電極41をワイヤボンディング接合すること
により同図(D)示すように無調整の接合を行なうこと
ができた。 実施例3:(LDアレイと光ファイバとの接合,図7対
応) 実施例1と同様に(100)Si基板46の表面と裏面に異
方性エッチングを行い、表面には図7の(A)に示すよ
うに台形をした大きな凸部47と小さな凸部48,49を形成
した。こゝで、凸部の側壁は何れも(100)基板面に
対して54.74 度で交差している。なお、大きな凸部47は
マイクロレンズアレイの形成位置であって、マイクロレ
ンズの形成位置の背後には同図(B)に示すように4個
の穴50を形成したが、この穴の形成面は何れも(10
0)基板面と54.74 度で交差している。次に、この4個
の穴に対応する基板表面の大きな凸部47の上に実施例1
と全く同様な方法で4個のレンズよりなるマイクロレン
ズアレイ52を形成した( 以上同図C) 次に、(110)Si基板54については、従来と同様に異
方性エッチングを行い、表面には大きな凹部55を、ま
た、裏面には小さな凹部56,57を形成した。こゝで三個
の凹部の底面は(110)基板面と35.26 度で交差して
おり、また、側壁は90度で交差している。次に、この
(110)Si基板54の表面にLDアレイ装着用のリード
端子58とはんだパッド59を実施例1と同様な方法で形成
した。(以上同図a) 次に、(100)基板46と(110)Si基板54との組合
せは、(100)基板46の大きな凸部47と小さな凸部4
8,49の向い合う側壁の部分それぞれに(110)Si基
板54の大きな凹部55および小さな凹部56,57が嵌合する
ことに両基板が固定される。同図(D)はこれにLDア
レイ43を装着した状態を示すもので、(100)基板46
の裏面にある穴50に光ファイバ44を挿入すれば、LDア
レイ43と無調整で位置決めされる。同図(E)は向きを
変えてこの状態を示している。
First, as shown in FIG.
0) After mounting the LD array 43 at the position of the solder pad 40 of the Si substrate 36, the LD array 43 is engaged with the (100) Si substrate 35 to be joined, and the optical fiber 44 is inserted into the V groove 38 of the (100) Si substrate 35. Further, by wire-bonding the lead terminal 39 of the (110) Si substrate 36 and the lead-out electrode 41 of the auxiliary component 42 to each other, unadjusted bonding could be performed as shown in FIG. Example 3: (Joining of LD array and optical fiber, corresponding to FIG. 7) Anisotropic etching was performed on the front and back surfaces of the (100) Si substrate 46 in the same manner as in Example 1, and the surface of FIG. As shown in (), a large trapezoidal convex portion 47 and small convex portions 48 and 49 are formed. Here, all the sidewalls of the protrusion intersect with the (100) substrate surface at 54.74 degrees. The large convex portion 47 is the position where the microlens array is formed, and four holes 50 are formed behind the position where the microlens is formed, as shown in FIG. Are both (10
0) It intersects with the board surface at 54.74 degrees. Next, the first embodiment is formed on the large convex portion 47 on the substrate surface corresponding to these four holes.
A microlens array 52 consisting of four lenses was formed by the same method as above (C in the same figure). Next, the (110) Si substrate 54 was anisotropically etched in the same manner as in the conventional method, and the surface was Has a large recess 55 and small recesses 56, 57 on the back surface. Here, the bottoms of the three recesses intersect the (110) substrate surface at 35.26 degrees and the sidewalls intersect at 90 degrees. Next, the lead terminals 58 for mounting the LD array and the solder pads 59 were formed on the surface of the (110) Si substrate 54 by the same method as in the first embodiment. (A in the same figure) Next, the combination of the (100) substrate 46 and the (110) Si substrate 54 is the same as the large convex portion 47 and the small convex portion 4 of the (100) substrate 46.
Both substrates are fixed by fitting the large concave portion 55 and the small concave portions 56 and 57 of the (110) Si substrate 54 into the side wall portions 8 and 49 facing each other. FIG. 3D shows a state in which the LD array 43 is mounted on the (100) substrate 46.
If the optical fiber 44 is inserted into the hole 50 on the back surface of the LD array 43, the LD array 43 is positioned without adjustment. FIG. 6E shows this state by changing the direction.

【0024】[0024]

【発明の効果】本発明の実施により光素子アレイと光フ
ァイバとの高精度の位置合わせを無調整で行なうことが
できる。
By implementing the present invention, highly accurate alignment between the optical element array and the optical fiber can be performed without adjustment.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明に係る噛み合わせ原理図(その1)で
ある。
FIG. 1 is a diagram (1) of a meshing principle according to the present invention.

【図2】 本発明に係る噛み合わせ原理図(その2)で
ある。
FIG. 2 is a diagram (part 2) of the principle of engagement according to the present invention.

【図3】 本発明に係る噛み合わせ原理図(その3)で
ある。
FIG. 3 is a diagram (Part 3) of the principle of engagement according to the present invention.

【図4】 本発明に係る噛み合わせ原理図(その4)で
ある。
FIG. 4 is a principle diagram (Part 4) of the engagement according to the present invention.

【図5】 本発明の実施例(その1)の説明図である。FIG. 5 is an explanatory diagram of an embodiment (No. 1) of the present invention.

【図6】 本発明の実施例(その2)の説明図である。FIG. 6 is an explanatory diagram of an embodiment (2) of the present invention.

【図7】 本発明の実施例(その3)の説明図である。FIG. 7 is an explanatory diagram of an embodiment (3) of the present invention.

【図8】 従来の位置合わせ方法を示す斜視図である。FIG. 8 is a perspective view showing a conventional alignment method.

【符号の説明】[Explanation of symbols]

1,32,43, LDアレイ 2,33,44, 光ファイバ 3 光ファイバアレイ 12,16,18,20,22,35,46, (100)Si基板 13,17,19,21,23,36,54, (110)Si基板 24 SiO2膜 25,29, 凹部 27,39, リード端子 28,40, はんだパッド 30,52, マイクロレンズアレ
1, 32, 43, LD array 2, 33, 44, optical fiber 3 Optical fiber array 12, 16, 18, 20, 22, 35, 46, (100) Si substrate 13, 17, 19, 21, 23, 36 , 54, (110) Si substrate 24 SiO 2 film 25, 29, recesses 27, 39, lead terminals 28, 40, solder pads 30, 52, microlens array

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 31/0232 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display location H01L 31/0232

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 (100)を基板面とする第1のシリコ
ン基板と、(110)を基板面とする第2のシリコン基
板の上に形成したシリコン酸化膜をマスクとして各シリ
コン基板に異方性エッチングを施して第1のシリコン基
板には基板面と54.74 度で交差する(111)面を側壁
にもつ雌型または雄型を、 第2のシリコン基板には基板面と35.26 度で交差する
(111)面と90度で交差する(111)面を側壁にも
つ雄型または雌型を作り、 また、該基板上に光素子アレイを装着するパッドとリー
ド端子をパターン形成すると共に光ファイバを固定する
複数のV溝を設け、 該パッドに光素子アレイを装着した後、前記第1のシリ
コン基板と第2のシリコン基板に設けたそれぞれの型の
側壁を衝合して垂直に嵌合させた後、光ファイバを前記
V溝に装着することを特徴とする光素子アレイと光ファ
イバとの自動位置決め方法。
1. Anisotropic silicon substrates using a silicon oxide film formed on a first silicon substrate having (100) as a substrate surface and a second silicon substrate having (110) as a substrate surface as a mask. Of the first or second silicon substrate, which has a (111) face on its side wall, which intersects the substrate surface at 54.74 degrees, and the second silicon substrate, intersects the substrate surface at 35.26 degrees. A male mold or a female mold having a (111) plane that intersects the (111) plane at 90 degrees on a side wall is formed, and a pad for mounting an optical element array and a lead terminal are formed on the substrate and an optical fiber is formed. After providing a plurality of V-grooves for fixing and mounting the optical element array on the pads, the side walls of the respective molds provided on the first silicon substrate and the second silicon substrate are abutted and vertically fitted. And then insert the optical fiber into the V groove. Automatic positioning method of the optical element array and the optical fiber, characterized in that the wear.
JP5303166A 1993-12-03 1993-12-03 Method for automatically positioning optical device array to optical fiber Withdrawn JPH07162098A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5303166A JPH07162098A (en) 1993-12-03 1993-12-03 Method for automatically positioning optical device array to optical fiber

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5303166A JPH07162098A (en) 1993-12-03 1993-12-03 Method for automatically positioning optical device array to optical fiber

Publications (1)

Publication Number Publication Date
JPH07162098A true JPH07162098A (en) 1995-06-23

Family

ID=17917686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5303166A Withdrawn JPH07162098A (en) 1993-12-03 1993-12-03 Method for automatically positioning optical device array to optical fiber

Country Status (1)

Country Link
JP (1) JPH07162098A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998038539A2 (en) * 1997-02-28 1998-09-03 Siemens Aktiengesellschaft Electro optical coupling assembly
US6293711B1 (en) 1998-03-18 2001-09-25 Fujitsu Limited Optical transmission module
EP1279982A2 (en) * 2001-07-17 2003-01-29 Harting Elektro-optische Bauteile GmbH & Co. KG. Substrate for an opto-electronic device
JP2008503734A (en) * 2004-06-21 2008-02-07 カプレス・アクティーゼルスカブ How to align the probe

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998038539A2 (en) * 1997-02-28 1998-09-03 Siemens Aktiengesellschaft Electro optical coupling assembly
WO1998038539A3 (en) * 1997-02-28 1998-12-17 Siemens Ag Electro optical coupling assembly
US6293711B1 (en) 1998-03-18 2001-09-25 Fujitsu Limited Optical transmission module
EP1279982A2 (en) * 2001-07-17 2003-01-29 Harting Elektro-optische Bauteile GmbH & Co. KG. Substrate for an opto-electronic device
EP1279982A3 (en) * 2001-07-17 2004-05-19 Harting Elektro-optische Bauteile GmbH & Co. KG. Substrate for an opto-electronic device
JP2008503734A (en) * 2004-06-21 2008-02-07 カプレス・アクティーゼルスカブ How to align the probe

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