JPH02120868U - - Google Patents
Info
- Publication number
- JPH02120868U JPH02120868U JP1989029222U JP2922289U JPH02120868U JP H02120868 U JPH02120868 U JP H02120868U JP 1989029222 U JP1989029222 U JP 1989029222U JP 2922289 U JP2922289 U JP 2922289U JP H02120868 U JPH02120868 U JP H02120868U
- Authority
- JP
- Japan
- Prior art keywords
- multilayer circuit
- semiconductor device
- conductive foil
- circuit board
- bond pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989029222U JPH02120868U (enExample) | 1989-03-15 | 1989-03-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989029222U JPH02120868U (enExample) | 1989-03-15 | 1989-03-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02120868U true JPH02120868U (enExample) | 1990-09-28 |
Family
ID=31253248
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989029222U Pending JPH02120868U (enExample) | 1989-03-15 | 1989-03-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02120868U (enExample) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS616834A (ja) * | 1984-06-21 | 1986-01-13 | Fujitsu Ltd | 半導体装置の製造方法 |
-
1989
- 1989-03-15 JP JP1989029222U patent/JPH02120868U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS616834A (ja) * | 1984-06-21 | 1986-01-13 | Fujitsu Ltd | 半導体装置の製造方法 |