JPH02103918U - - Google Patents
Info
- Publication number
- JPH02103918U JPH02103918U JP1150989U JP1150989U JPH02103918U JP H02103918 U JPH02103918 U JP H02103918U JP 1150989 U JP1150989 U JP 1150989U JP 1150989 U JP1150989 U JP 1150989U JP H02103918 U JPH02103918 U JP H02103918U
- Authority
- JP
- Japan
- Prior art keywords
- transmission line
- whose
- signal transmission
- potential point
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000008054 signal transmission Effects 0.000 claims 3
- 238000007493 shaping process Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は第１図の動作説明図、第３図はダイオードの
順方向電圧・電流特性例図、第４図は本考案の他
の実施例を示す回路図、第５図は従来の回路の一
例を示す回路図、第６図は第５図の動作説明図、
第７図はＦＥＴの動作説明図、第８図は従来の他
の回路の一例を示す回路図、第９図は第８図の動
作説明図である。
１…ＦＥＴ、３，５…伝送線路、４，８，１０
…抵抗、７，９…ダイオード。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is an explanatory diagram of the operation of Figure 1, Figure 3 is an example of the forward voltage and current characteristics of a diode, Figure 4 is a circuit diagram showing another embodiment of the present invention, and Figure 5 is an example of a conventional circuit. A circuit diagram showing FIG. 6 is an operation explanatory diagram of FIG. 5,
FIG. 7 is an explanatory diagram of the operation of the FET, FIG. 8 is a circuit diagram showing an example of another conventional circuit, and FIG. 9 is an explanatory diagram of the operation of FIG. 1...FET, 3, 5...Transmission line, 4, 8, 10
...Resistor, 7,9...Diode.
Claims (1)
もに電源線が接続され、ソースが第１の電位点に
接続されたＦＥＴと、 アノードが前記ＦＥＴのゲートに接続されると
ともに入力伝送線路の特性インピーダンスにほぼ
等しい抵抗値の第１の抵抗を介して第２の電位点
に接続され、カソードが入力信号伝送線路の端部
に接続された第１のダイオードと、 アノードが前記入力信号伝送線路の端部に接続
され、カソードが前記入力伝送線路の特性インピ
ーダンスにほぼ等しい抵抗値の第２の抵抗を介し
て第３の電位点に接続された第２のダイオード、
とで構成されたことを特徴とする波形整形回路。[Claims for Utility Model Registration] An FET whose drain is connected to an output signal transmission line and a power supply line, whose source is connected to a first potential point, and whose anode is connected to the gate of the FET. a first diode connected to the second potential point via a first resistor having a resistance value approximately equal to the characteristic impedance of the input transmission line, and having a cathode connected to the end of the input signal transmission line; a second diode connected to an end of the input signal transmission line, the cathode of which is connected to a third potential point via a second resistor whose resistance value is approximately equal to the characteristic impedance of the input transmission line;
A waveform shaping circuit comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1150989U JPH02103918U (en) | 1989-02-02 | 1989-02-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1150989U JPH02103918U (en) | 1989-02-02 | 1989-02-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02103918U true JPH02103918U (en) | 1990-08-17 |
Family
ID=31220127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1150989U Pending JPH02103918U (en) | 1989-02-02 | 1989-02-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02103918U (en) |
-
1989
- 1989-02-02 JP JP1150989U patent/JPH02103918U/ja active Pending